8.1Revision History ................................................................................................................. 8-1
1-2SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
1.1SAM3U Evaluation Kit
The SAM3U Evaluation Kit (SAM3U-EK) allows the evaluation of the SAM3U series devices. It has
enough features to demonstrate most of the product’s capabilities to the users. The SAM3U-EK also features extension connectors to allow the users to add new interfaces in case they are not on-board.
1.2User Guide
This guide gives details on how the SAM3U-EK has been designed. It is made up of 6 sections:
Section 1 includes references, applicable documents
Section 2 describes the kit contents, its main features
Section 3 provides instructions to power up the SAM3U-EK and describes how to use it.
Section 4 describes the hardware resources, and includes default jumper and switch settings, and the
The Atmel® SAM3U-EK toolkit contains the following items:
a SAM3U-EK board
power supply
universal input AC/DC power supply with US, Europe and UK plug adapters
one 3V Lithium Battery type CR1225
one USB cable
one serial RS232 cable
A Welcome Letter
Figure 2-1. Unpacked SAM3U-EK
Section 2
Kit Contents
Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues concerning the contents of the kit.
SAM3U-EK Evaluation Kit User Guide2-1
6478E–ATARM–30-Mar-11
Kit Contents
2.2Electrostatic Warning
The SAM3U-EK board is shipped in a protective anti-static package. The board must not be subjected to
high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the components or any other metallic element of the board.
2-2SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
3.1Power up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the
screen and enjoy the demo.
3.2Battery
The SAM3U-EK ships with a 3V coin battery.
This battery is not required for the board to start up.
The coin battery is provided for user convenience in case the user would like to exercise the date and
time backup function of the SAM3U series devices when the board is switched off.
Section 3
Power Up
3.3DevStart
The on-board NAND Flash contains “SAM3U-EK DevStart”.
It is stored in the “SAM3U-EK DevStart” folder on the USB Flash disk available when the SAM3U-EK is
connected to a host computer and you click on the Flash Disk icon of the on-board demo.
Click the file “welcome.html” in this folder to launch SAM3U-EK DevStart.
SAM3U-EK DevStart guides you through installation processes of IAR
toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and how
to program it into the SAM3U-EK. Optionally, if you have a SAM-ICE
how to debug the code.
We recommend that you backup the “SAM3U-EK DevStart” folder on your computer before
launching it.
3.4Recovery Procedure
The DevStart ends by giving step-by-step instructions on how to recover the SAM3U-EK to the state as it
was when shipped by Atmel.
Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want
to recover from this situation.
™
EWARM, Keil MDK and GNU
™
, instructions are also given about
SAM3U-EK Evaluation Kit User Guide3-1
6478E–ATARM–30-Mar-11
Power Up
3.5Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
download sample code and get technical support from Atmel website
This section introduces the Atmel SAM3U Evaluation Kit design. It introduces system-level concepts,
such as power distribution, memory, and interface assignments.
The SAM3U-EK board is based on the integration of an ARM
PSRAM (pseudo-static RAM), NAND Flash and a set of popular peripherals. It is designed to provide a
high performance processor evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM3U-EK Block Diagram
Section 4
Evaluation Kit Hardware
®
Cortex®-M3 processor with on-board fast
SAM3U-EK Evaluation Kit User Guide4-1
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
4.2Features List
Here is the list of the main board components and interfaces:
SAM3U4E QFP chip with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector, for external system clock input
PSRAM
NAND Flash
Backup Battery
2.8 inch TFT color LCD display with touch-panel and backlight
UART port with level shifter IC
USART port with level shifter IC
Audio codec with input and output jacks: stereo headphone out, stereo line in, mono microphone in
SD/MMC interface
3-D accelerometer sensor
Temperature sensor
Reset and Wake-Up buttons: NRST, NRSTB, FWUP
User buttons: Left and Right
High Speed USB device port
JTAG port
On-board power regulation with shutdown control (by the SAM3 chip)
Two user LEDs
Power LED
BNC connectors for ADC input
User potentiometer connected to the ADC input
ZigBee
3x32 bit PIO connection interfaces (PIOA, PIOB, PIOC)
®
connector
4.3Function Blocks
4.3.1Processor
The SAM3U-EK is equipped with a SAM3U4E in LQFP144 package.
4.3.2Memory
The SAM3U4E chip embeds:
256 Kbytes of embedded Flash
48 Kbytes of embedded SRAM with dual bank
16 Kbytes of ROM with embedded bootloader routines (UART, USB) and IAP (In-Application
Programming functions) routines.
4-2SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
The SAM3U4E features an External Bus Interface (EBI) that permits interfacing to a broad range of
D0
D1
D2
D3
D4
D5
D
6
D7
D
8
D9
D10
D
11
D12
D13
D14
D15
A1
A
2
A
3
A4
A5
A
6
A
7
A8
A9
A10
A11
A1
2
A
13
A1
4
A15
A16
A17
A
18
A19
NBS0
NBS1
NCS0
NRD
NW
E
PB9
PB10
PB11
PB12
PB16
PB13
PB1
5
PB14
PB2
8
PB25
PB27
PB6
PB29
P
B26
PB30
P
B31
PC2
PC2
0
PC1
PC6
PC3
PC0
PC2
1
PC4
PC8
PC1
0
PC22
PC5
PC11
PC7
PC9
PC2
5
PC24
PC2
3
PB19
PB23
PC1
5
PB8
P
B7
P
B19
PB20
P
B23
PB
7
PB2
0
+3V3
+3V3
+3V3
DGND
PB[31:0]
PC[31:0
]
R
11
4
7K
R
11
4
7K
JP1
2
J
P
JP1
2
J
P
C28
100nF
C28
100nF
C29
1uF
C29
1uF
R10
47K
R10
47K
MN2
PSRAM 512K x16
MN2
PSRAM 512K x16
A0
3
A1
4
A2
5
A3
9
A4
10
A5
1
5
A
6
16
A
7
2
2
A8
4
4
A
9
45
A1
0
4
6
A11
47
A12
3
9
A13
4
0
A14
33
A1
5
3
4
A16
28
A17
2
1
A18
4
3
DQ0
12
DQ1
17
DQ2
18
DQ3
23
DQ4
29
DQ5
3
5
DQ6
36
D
Q7
42
DQ8
7
D
Q9
13
D
Q10
1
4
DQ1
1
20
D
Q12
26
DQ13
32
DQ
14
31
D
Q15
3
7
LB
#
1
UB#
8
CE#
1
1
OE
#
2
WE#
4
1
NC1
27
N
C2
38
NC3
48
VCC
24
VCCQ
25
VSS
3
0
VSSQ
19
ZZ#
6
external memories and virtually to any parallel peripheral. The SAM3U-EK board is equipped with two
kinds of memory devices connected to the SAM3U4E EBI:
One 512K x16 PSRAM device
One NAND Flash MT29F2G16ABD.
Figure 4-2. PSRAM
Evaluation Kit Hardware
(1)
Note:1. Brand and reference may vary. Check the bill of materiel (BOM) corresponding to your
kit version to get precise information regarding that matter.
SAM3U-EK Evaluation Kit User Guide4-3
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
PB21
PB22
PB18
PB1
7
PB24
PB6
PB31
PB30
PB16
PB15
PB14
PB13
P
B29
PB28
PB12
PB11
P
B10
PB9
PB27
PB26
PB25
PC12
+3V 3
+
3V3
+3V 3
D
GND
+3V 3
DGND
+3V 3
PB[31:0]
PC[31:0]
NANDRD
Y
N
ANDOE
NANDC
LE
NANDAL E
NANDWE
NCS
1
R18
DNP
R18
DNP
C30
100nF
C30
100nF
C33
100nF
C33
100nF
C31
100nF
C31
100nF
R
1747K
R
1747K
R13
4
7K
R13
4
7K
R12
47K
R12
47K
C32
1
00nF
C32
1
00nF
R
140R
R
140R
JP13JPJP13
JP
MN3
MT29F 2G16AADW P
MN3
MT29F 2G16AADW P
NC1
1
NC2
2
NC3
3
NC4
4
NC5
5
NC6
6
R/B#
7
RE#
8
CE#
9
NC
7
10
NC8
11
VCC1
12
VSS 1
13
NC9
14
NC10
15
CLE
16
ALE
17
WE#
18
WP#
19
NC11
20
NC12
21
NC13
22
NC14
23
NC15
24
VSS 2
25
IO8
26
IO9
27
IO10
28
IO0
29
IO1
30
IO2
31
IO3
32
IO11
33
VCC2
34
NC16
35
VSS 3
36
VCC3
37
NC17
38
VCC4
39
IO12
40
IO4
41
IO5
42
IO6
43
IO7
44
IO13
45
IO14
46
IO15
47
VSS 4
48
Figure 4-3. NAND Flash
The chip select signals NCS0 and NCS1 are used for PSRAM and NAND Flash chips selection, respectively. Furthermore, a dedicated jumper can disconnect these from the memories, to let NCS0 and NCS1
be used for other custom purpose.
4.3.3Clock Circuitry
The clock generator of a SAM3U4E microcontroller is made up of:
A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4, 8 or
12 MHz (default value is 4 MHz).
A 480 MHz UTMI PLL providing a clock for the USB High Speed Device Controller
A 96 to 192 MHz programmable PLL (input from 8 to 16 MHz), capable of providing the clock MCK to
the processor and to the peripherals.
The SAM3U-EK board is equipped with one 12 MHz crystal, one 32,768 Hz crystal and an external clock
input connector (optional, not populated by default).
4-4SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-4. External Clock Source
XIN32
X
IN1
XOUT32
XOUT1
X
OUT1
XIN
1
XOUT32
XIN32
DGN
D
DGND
DGND
D
GND
XIN
XOUT
XIN3
2
X
OUT32
C2
6
20pF
C2
6
20pF
R7
0
RR7
0
R
Y1
12.000MHz
Y1
12.000MHz
C25
20pF
C25
20pF
MN1B
SAM3U
MN1B
SAM3U
XIN32
144
XOUT32
143
XIN
36
XOUT
35
GND1
18
GNDPL
L
33
GNDUTMI
43
GND2
52
GND
3
6
0
GNDAN
A
75
GND4
9
0
GND
5
1
26
GNDBU
140
C27
20pF
C27
20pF
R
60
RR
60
R
Y2
32.768KHz
Y2
32.768KHz
12
3
C24
20pF
C24
20pF
J1J
1
1
23
5
4
R8
DN
PR8
DN
P
D
GND
VBU
NRST
NRSTB
FWUP
WAKE_UP#
BP2BP2
1
42
3
BP1BP1
1
42
3
BP3BP3
1
42
3
R
65
100K
R
65
100K
4.3.4Reset and Wake-Up Circuitry
The on-board NRST button BP1 and NRSTB button BP2 provide the SAM3U4E with external reset control. The on-board WAKE-UP button BP3 can be used to wake up the chip from low power modes.
Evaluation Kit Hardware
Figure 4-5. System Buttons
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide
a reset signal out to the external components. Conversely, it can be asserted low from the outside to
reset the microcontroller, its core and peripherals, Backup region (RTC, RTT and Supply Controller)
6478E–ATARM–30-Mar-11
excepted. The NRST pin integrates a permanent pull-up resistor of about 100 kOhm to VDDIO.
On the SAM3U-EK board, the NRST signal is connected to the LCD module and JTAG port.
The NRSTB pin is an input-only signal that enables the asynchronous reset of the SAM3U4E series
when asserted low. The NRSTB pin integrates a permanent pull-up resistor of about 15 kOhm. This
allows the connection of a simple push button for implementing a system-user reset. Whatever the
mode, this pin will reset the chip including the Backup region (RTC, RTT and Supply Controller). It
makes the chip behave as for a Power-on reset. An external capacitor (10 nF) is connected between
NRSTB and VDDIO to enforce the signal stability on this pin.
SAM3U-EK Evaluation Kit User Guide4-5
Evaluation Kit Hardware
PWR_CN
PWR_CN
DGND
+5V+5V
DGND
+3V 3
+5V
DGND
DGN
D
+3V3+5V
DGN
D
DGND
SHD
N
D12B
VRE F
ADVRE
F
+3
V3
+3V 3
+2V5
+
2V5
C92
100nF
C92
100nF
C104
100nF
C104
100nF
MN13
ZEN056V130A24LS
MN13
ZEN056V130A24LS
1
2
3
+
C95
100uF
+
C95
100uF
R90
4.7K
R90
4.7K
MN12
MIC29152W U
Micrel's 1.5A L DO, TO263-5
MN12
MIC29152W U
Micrel's 1.5A L DO, TO263-5
VIN
2
VOUT
4
SD
1
GND1
3
ADJ
5
GND2
6
C96
100nF
C96
100nF
TP3
+3V 3
TP3
+3V 3
R
80
10
K
R
80
10
K
Q2
I
RLML2502
Q2
I
RLML2502
1
3
2
J
P20
JUMP_3
J
P20
JUMP_3
1
2
3
R7
7
200R 1%
R7
7
200R 1%
JP1
7
J
P
JP1
7
J
P
C9
4
15p
F
C9
4
15p
F
TP4
+5V
TP4
+5V
MN14
BNX002-01
MN14
BNX002-01
SV
1
SG
2
C
V
3
CG1
4
C
G2
5
CG3
6
+
C93
22uF
+
C93
22uF
R79
100K
R79
100K
C103
100
nF
C103
100
nF
R78
100K
R78
100K
JP
5
JUMP_
3
JP
5
JUMP_
3
1
2
3
J11
MP179P 2.1m
m
J11
MP179P 2.1m
m
1
2
3
R76
330R 1%
R76
330R 1%
MN15
LM4040-2.5
MN15
LM4040-2.5
Q1
IRLML6401
Q1
IRLML6401
1
3
2
The FWUP pin is Force Wake-Up active low input. It is enabled as a wake-up source with external pullup. If the FWUP pin is asserted for a time longer than the debouncing period (configurable for 100 µs,
1 ms, 16 ms, 128 ms or 1 second), a core power supply wake-up is initiated.
4.3.5Power Supply and Management
The SAM3U-EK board is supplied with an external 5V DC block through input J11. Protection circuitry is
obtained by a PolyZen diode MN13 and an LC combinatory filter MN14.
The adjustable LDO regulator MN12 is employed for the main supply of the 3.3V rail. It powers all the
3.3V board components. The shut down control of this LDO is made by MOSFETs Q1, Q2 piloted by the
SAM3U4E SHDN pin. When SAM3U4E is in backup mode, SHDN pin outputs a low level signal, which
shuts down the LDO. When the device is running (not in backup mode), SHDN pin output a high level
signal, which enables the LDO.
By closing the “FORCE POWER ON” jumper JP17, the P-channel MOSFET Q1 will be forced on, no
matter the level present on the SHDN pin, and the LDO 3.3V output will thereby be forced active.
Figure 4-6. Power Block
The SAM3U-EK board uses the 3.3V LDO output as its main supply source. VDDUTMI, VDDANA,
VDDIO, VDDIN are powered directly from that source.
The internal 1.8V regulator output feeds VDDCORE and VDDPLL.
VDDCORE and VDDPLL can also be powered by an external supply. (Refer to the SAM3U datasheet for
more details).
4-6SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
VDDBU pin is powered from the 3.3V rail and a backup battery BT1 via a dual Schottky diode D6.
Figure 4-7. Backup Battery
+3V 3
D
GND
VBU
DGND
D6
BAT54C
D6
BAT54C
3
2
1
MN1B
SAM3U
MN1B
SAM3U
VDDBU
139
CR1225
3V
BT1
KY001
CR1225
3V
BT1
KY001
+
1
-
2
3
3
4
4
C21
1uF
C21
1uF
JP4JPJP4
JP
P
A12
PA1
1
DGND
+3V
3
DGND
+3V3+3V3
PA[31:0]
UTXD
URX D
C45
100nF
C45
100nF
C
44
100nF
C
44
100nF
C46
100nF
C46
100nF
R330RR330R
MN6
MAX3 232CS E
MN6
MAX3 232CS E
T1IN
11
T
2IN
10
R1OUT
1
2
R2OUT
9
T1OUT
14
T2OUT
7
R1IN
13
R2IN
8
V+
2
C1+
1
C1-
3
C2+
4
C2-
5
V-
6
VCC
16
GND
15
C48
100nF
C48
100nF
R3
1
100K
R3
1
100K
J3
MALE R IG HT ANGL ED
J3
MALE R IG HT ANGL ED
5
4
3
2
1
9
8
7
6
10
11
C47
100nF
C47
100nF
R1030RR1030R
TP1
7
SM
D
TP1
7
SM
D
TP1
8
SMD
TP1
8
SMD
R32
100K
R32
100K
4.3.6UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J3.
Figure 4-8. UART
Evaluation Kit Hardware
4.3.7USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
There are 3 USARTs on the SAM3U4E device, SAM3U-EK connects the USART1 bus (including TXD,
RXD, RTS, CTS handshake signals control) to the DB9 male connector J4 through the RS232 Transceiver MN7.
6478E–ATARM–30-Mar-11
SAM3U-EK Evaluation Kit User Guide4-7
Evaluation Kit Hardware
Figure 4-9. USART
PA[31:0]
TXD1
RXD1
R
TS1
CTS1
P
A20
PA2
PA2
PA23
4.3.8LEDs
There are three LEDs on the SAM3U-EK board:
D2 and D3 green LEDs are user defined and controlled by the GPIO.
D4 red LED is a power LED indicating that the 3.3V rail is enabled. It can also be controlled by the
GPIO (by default, the GPIO is disabled and an on-board pull-up to 3.3V lights the LED).
+3V3+3V3
R3
R3
1
1
00K
00K
1
2
T
T
P19
P19
SMD
SMD
4
4
3
+3V
R3
R3
5
5
100K
100K
R1040RR1040R
R1050RR105
C5
C5
1
1
100nF
100nF
0R
TP2
TP2
SM
SM
MN7
MN7
MAX3232C SE
MAX3232C SE
16
VCC
C49
C49
F
F
100n
100n
C
C
100nF
100nF
GND
D
0
0
D
D
2
V
+
6
V
52
52
-
15
GND
1
1
T1IN
2
1
R1OUT
0
1
T2IN
9
R2OUT
C1+
C1-
C2+
C
T1OUT
R1IN
2OUT
T
R2IN
1
C50
C50
100nF
3
4
5
2-
14
13
7
8
100nF
C53
C53
100nF
100nF
DGND
J4
J4
MALE R IG HT ANGL ED
MALE R IG HT ANGL ED
1
6
2
7
3
8
4
9
5
10
11
Figure 4-10. LEDs
PB[31:0]
USR_LED1#
USR_LED2#
POWER_LE D#
4.3.9LCD, Backlight Control and Touch Panel
SAM3U-EK carries one TFT/Transmissive LCD module with touch screen, FTM280C12D, with integrated driver IC HX8347. The LCD display size is 2.8 inches, with a native resolution of 240 x 320 pixels.
IRLML
IRLML
DGN
D
Q3
Q3
2502
2502
B4
P
B5
P
PB0
PB1
PB2
R8
R8
220R
220R
R8
R8
220R
220R
5
5
7
7
D2green-led
D2green-led
0603
0603
D3green-led
D3green-led
0603
0603
89100K
89100K
R
R
+3V 3
1
R92
R92
2
2
20R
20R
32
D4red-led
D4red-led
0603
0603
4-8SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Table 4-1. LCD Module Pin Out
PinSymbolFunction
1GNDGround
2CSChip Select
3RSRegister select signal
4WRWrite operation signal
5RDRead operation signal
6~21DB0~DB15Data bus
22~23NCNo connection
24RESETReset signal
25GNDGround
26X+Touch panel X_RIGHT
27Y+Touch panel Y_UP
28X-Touch panel X_LEFT
29Y-Touch panel Y_DOWN
30GNDGround
Evaluation Kit Hardware
31VDD1Power supply for digital IO Pad
32VDD2Power supply for analog circuit
33~36A1~A4Power supply for backlight
37~38NCNo connection
39KBacklight ground
The LCD module gets its reset from NRST. As explained previously, this NRST is shared with the JTAG
port and the push button BP1. The LCD chip select signal is connected to NCS2 (a dedicated jumper can
disable it, making NCS2 available for other custom usage).
The SAM3U4E communicates with the LCD through PIOB where a 16-bit parallel “8080-like” protocol
data bus has to be implemented by software.
SAM3U-EK Evaluation Kit User Guide4-9
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
PB10
PB28
P
B31
PB6
X_LE
FT
PB13
PB19
PB15
Y_DOWN
P
B26
PB11
PB23
PB16
PB29
PB30
P
B9
PB8
P
B14
CS#
PB27
PB25
X_RIGHT
Y_UP
PB12
P
C16
LED_A2
PC19
LED_A1
LED_A4
LED_A3
LED_A1
LED_A2
LED_A3
L
ED_A4
LED_A1
LED_A2
LED_A3
LED_A4
X_RIGHT
X_LEFT
Y_UP
Y_DOWN
DGND
D
GND
+3V3
DGND
VLED
+3V 3
DGND
+3V 3
DGND
PB[31:0]
NRST
NOT P OPUL AT E D
C34
1uF
C34
1uF
TP14
SMD
TP14
SMD
TP13
SMD
TP13
SMD
TP16
SMD
TP16
SMD
R
940
RR
940
R
B7
BN03K 314S300R
B7
BN03K 314S300R
D5
PAC DN044Y5R
TVS, SOT23-5
D5
PAC DN044Y5R
TVS, SOT23-5
1
2
3
4
5
MN4
AAT3194IT P
MN4
AAT3194IT P
C1+
4
C1-
3
EN/SET
9
C2+
1
C2-
12
OUT
2
IN
10
GND
11
D1
8
D2
7
D3
6
D4
5
R950RR950R
R19
47K
R19
47K
R200RR20
0R
C35
1uF
C35
1uF
C39
100nF
C39
100nF
J2
FH 26-39S-0. 3SH W
J2
FH 26-39S-0. 3SH W
GN
D1
1
CS
2
RS
3
WR
4
RD
5
DB0
6
DB1
7
DB2
8
DB3
9
DB4
10
DB5
11
DB6
12
DB7
1
3
DB8
14
DB9
1
5
DB1
0
16
DB11
17
DB1
2
18
DB13
19
DB1
4
2
0
DB1
5
21
NC1
22
N
C2
23
RESET
24
GN
D2
2
5
X
+
26
Y+
27
X
-
28
Y-
29
GN
D3
3
0
VDD1
31
VDD2
32
A
1
33
A2
34
A
3
3
5
A4
36
NC3
37
N
C4
38
K
39
shelled
1
4
0
shelled2
41
JP1
4
JP
JP1
4
JP
R930RR930R
R960RR960R
TP15
SMD
TP15
SMD
+
C38
10u
F
+
C38
10u
F
C37
1uF
C37
1uF
C36
4.7uF
C36
4.7uF
Figure 4-11. LCD Block
LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 charge pump, MN4. The
AAT3194 is controlled by the SAM3U4E through a single line Simple Serial Control (S2Cwire) interface,
which permits to enable, disable, and set the LED drive current (LED brightness control) from a 32-level
logarithmic scale. Four 0-Ohm resistors R93/R94/R95/R96 are implemented for optional current limitation (replace 0 Ohm with the required resistor value).
The LCD module integrates a 4-wire touch screen panel controlled by MN5, ADS7843, which is a slave
device on the SAM3U4E SPI bus.
The ADS7843 touch ADC auxiliary inputs IN3/IN4 are connected to test points for optional function
extension.
4-10SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-12. Touch Screen Controller
X_RI
GHT
X_RI
GHT
Y_UP
X_LEFT
Y_DOWN
PA
13
PA14
PA15
PA
2
PA24
PC14
PC14
DGN
D
+3V3
+3V 3+3V 3
AGND
1
PA[31:0]
PC[31:0
]
S
PCK
MOS
I
MISO
NP CS 2
BUY_TSC
IRQ_TSC
C43
4.7uF
C43
4.7uF
C4
0
100nF
C4
0
100nF
R28
100K
R28
100K
TP2
S
MD
TP2
S
MD
TP1
SMD
TP1
SMD
R2
70
RR2
70
R
R2
60
RR2
60
R
C4
1
100nF
C4
1
100nF
R25
0
RR25
0
R
R2
9
100K
R2
9
100K
R2
40
RR2
40
R
R22
100
K
R22
100
K
R3
0
0R
R3
0
0R
C42
100nF
C42
100nF
R21
100
K
R21
100
K
MN5
ADS 7843E
MN5
ADS 7843E
XP
2
Y
P
3
XM
4
YM
5
DCLK
1
6
DIN
1
4
D
OUT
12
C
S
15
BUS
Y
1
3
P
ENIRQ
1
1
VRE F
9
VCC
1
1
VCC
2
1
0
GND
6
IN3
7
I
N4
8
L1
10uH/100mA
L1
10uH/100mA
R911RR91
1R
X_LEFT
Y_DOWN
Y_UP
J2
FH26-39S-0.3S HW
J2
FH26-39S-0.3S HW
X
+
26
Y+
27
X-
2
8
Y-
2
9
Evaluation Kit Hardware
4.3.10JTAG
A standard 20-pin JTAG connector is implemented on the SAM3U-EK for any ARM JTAG emulator connection, such as SAM-ICE.
Note that the NRST net is connected to the system button BP1, and is also used to reset the LCD module. 0-Ohm resistor R75 may be removed in order to isolate the JTAG port from the system reset signal.
Figure 4-13. JTAG Connector
+3V
3
R72
R72
R73
100K
100K
R750
R750
R73
100K
100K
R74
R74
K
K
100
100
R
R
J10
J10
IDC20-2.54mm
IDC20-2.54mm
1
VTref
3
nT RS T
5
TDI
7
TMS
9
TCK
11
RTCK
13
TDO
15
RST
nS
DBG R Q17GND8
19
DBG ACK
Vsupply
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND9
2
4
6
8
10
12
14
6
1
18
20
DGND
C90
C90
100nF
100nF
6478E–ATARM–30-Mar-11
R7
R7
R70
R70
100K
100K
TDI
TMS
TCK
DO
T
NR S T
4.3.11Audio Codec
SAM3U-EK Evaluation Kit User Guide4-11
The SAM3U-EK includes a WOLFSON codec WM8731 for digital sound input and output. This interface
includes audio jacks for:
microphone input,
line audio input, and
headphone output.
1
1
100
100
K
K
DG
+
+
ND
C91
C91
10uF
10uF
Evaluation Kit Hardware
BCLK
ADCLRC
DACLRC
ADCDAT
DACDAT
WM8731
CODEC
SAM3U4E
Note: The ADC and DAC can run at different rates
BCLK
PA 31
PA 30
PA27
PA26
The SAM3U4E programmable clock output is used to generate the WM8731 master clock (MCLK). The
SAM3U4E ODT (On-Die Termination) feature guarantees a signal integrity on this clock line without the
need for external discrete components.
WM8731 pin 21 MODE is pulled down by default; this configures the device as a TWI device for internal
register access.
Pin15 CSB is pulled up, which sets its TWI address as 33 [0x0011011].
The WM8731 digital interface works in slave mode on the SAM3U4E Synchronous Serial Controller
(SSC) interface, which means that Codec digital audio bit clock and ADC/DAC left/right control clock are
to be generated by the SAM3U4E.
Figure 4-14. Codec Slave Mode
The WM8731 ADC and DAC have separated left/right control clocks to run at different rates.
The bit clock is shared; it can be the SSC transmitter clock (TK) or the receiver clock (RK). The default
setting on SAM3U-EK is TK and RK shorted together through R97/R99. Please note that trying different
ADC/DAC rates would mean different RK/TK rates; this default setting can be modified.
The 0-Ohm resistors R46/R47/R97/R99 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
4-12SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-15. Codec Block
T
PA
0
DGND
DGNDDGND
DGND
D
HSDM
D
HSDP
PA[31:
0]
V
BUS_USB
NOT POPULATED
R
69
68K
R
69
68K
C89
100nF
C89
100nF
J9
USB TYPE B PORT
J9
USB TYPE B PORT
VBUS
1
D-
2
D+
3
GND
4
E_GND0
5
E_GND1
6
B6
BN03K 314S300R
B6
BN03K 314S300R
MN11
TPD
3E 001DR LR
MN11
TPD
3E 001DR LR
IO1
1
IO2
2
GND3I
O3
4
VCC
5
C
88
10p
F
C
88
10p
F
R6847
K
R6847
K
+3V 3
+
+
C5
TWD
TWCK0
CK0
P
D
F
T
D
R
F
R
C5
10uF
10uF
DGND
0
PA9
PA10
P
A21
BCLK
PA26
P
A30
P
A27
PA3
1
A[31:0]
+
4
4
AGND
3V3
D
+
+
C61
C61
10uF
10uF
+3V3+3V
R
R
38
38
100K
100K
R460RR460R
R470RR470R
R4910
R4910
GND
C5
C5
1
1
00nF
00nF
R39
R39
4.7K
4.7K
C5
C5
5
5
6
6
00nF
00nF
1
1
C62
C62
00nF
00nF
1
1
3
0
0
R4
R4
4.7K
4.7K
K
K
PA9
PA1
PA2
PA26
PA27
PA28
PA29
PA30
PA31
8
8
MN
MN
XWM8731E DS
XWM8731E DS
1
DBVDD
27
DCVD
2
8
D
GND
26
XTO
2
CLKOUT
16
VMID
1
2
L
OUT
13
ROU
22
CSB
23
SDIN
2
4
SCLK
2
5
XTI/MCLK
3
BCLK
4
DACDAT
5
DACLRC
6
ADCDAT
7
ADCLR C
21
MODE
0
1
70
70
R9
R990RR990R
Evaluation Kit Hardware
C68
C68
220pF
220pF
C77
C77
100nF
100nF
AVDD
C58
C58
100nF
100nF
AGND
R36
R36
47K
47K
AGND
C69
C69
220pF
220pF
C72 1uFC721uF
L2
L2
1
1
0uH/100mA
0uH/100mA
R5
R5
R
R
0
0
+
+
C59
C59
10uF
10uF
B1
B1
BN03K314S600R
BN03K314S600R
B2
B2
BN03K 314S600R
R415.6KR415.6K
R425.6KR425.6K
R44
R44
5.6K
5.6K
AGND
R52
R52
47K
47K
AGND
AVDD+3V 3
+
+
C7
C7
47uF
47uF
AGND
BN03K 314S600R
8
8
B3
B3
BN03K 314S600R
BN03K 314S600R
B4
B4
BN03K 314S600R
BN03K 314S600R
B5
B5
BN03K 314S600R
BN03K 314S600R
C64
C64
470pF
470pF
C70
C70
470pF
470pF
C74
C74
470pF
470pF
R540RR54
0R
C65
C65
470pF
470pF
FGND
C71
C71
470pF
470pF
FGND
1
1
R5
R5
0R
0R
75
75
C
C
DNP
DNP
R37
R37
47K
47K
R43
R43
5.6K
5.6K
C73
C73
220pF
220pF
5
5
J5
J5
EARJACK
EARJACK
1
2
3
4
5
HEADPHONE
T
LI NE-OU
J
J
6
6
K
K
EARJAC
EARJAC
1
2
3
4
5
LI NE- IN
J
J
7
7
K
K
EARJAC
EARJAC
1
2
3
4
5
MON O / S T E R E O
MI C R O I NP U T
R530RR53
0R
AGNDFGND
1
4
AVD
D
8
BCL
K
HPVDD
AGND
HPGND
LHPOUT
RHPOUT
LLINEIN
RLINEI
MIC BIAS
M
ICIN
C57
C57
100nF
+
+
60220uF
60220uF
C
C
+
+
C63220uF
C63220uF
C661uFC661uF
C67 1uFC671uF
R48680RR48680R
R
R
50330R
50330R
+
+
C76
C76
10uF
10uF
DGND
100nF
15
11
9
1
0
2
0
1
9
N
17
18
D
T
RR9
R
4.3.12USB
The SAM3U4E UDPHS port is compliant with the Universal Serial Bus (USB) rev 2.0 High Speed device
specification. J9 is a B-type receptacle for USB device.
Both R2 and R3 39-Ohm resistors build up a 90-Ohm differential impedance together with the 5-Ohm
output impedance of the Hi-speed channel drivers.
R68 and R69 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets lowered to a PIO compatible 3.3V level) through PA0. Note that PA0 is also shared with ZigBee signal IRQ0.
Figure 4-16. USB Slave Block
SAM3U-EK Evaluation Kit User Guide4-13
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
4.3.13 ADC Input
There are 8 multiplexed analog channel inputs on the 12-bit ADC, and 8 multiplexed analog channel
inputs on the 10-bit ADC. SAM3U-EK optionally connects the two ADC channels to BNC header (check
for your actual components implementation, schematics and BOM, on http://www.atmel.com/products/).
One is 12-bit ADC channel 3, shared with PIO pin PB4. The other one is 10-bit ADC channel 0, shared
with PIO PB5.
A potentiometer is also connected to these two channels to implement an easy access to ADC programming and debugging (or implement an analog user control such as display brightness, volume, etc.).
Please note that SAM3U-EK default setting connects both AD12BAD3 and AD0 to the potentiometer so
that AD12BAD3 and AD0 are actually shorted. If these two ports need to work separately, R82 and/or
R84 should be removed.
There is another ADC application capability on SAM3U-EK (See “G-Sensor” on page 4-15.)
Figure 4-17. ADC Input
CN1
CN1
BNC
BNC
R81
R81
DNP
JP18JPJP18
JP
R83
R83
49.9R
49.9R
DNP
C97
C97
10nF
10nF
5
1
2
3
4
R820RR82
0R
PB4
ADC
AD12BAD3
4.3.14User Buttons
2 user buttons on the SAM3U-EK are connected to PIO lines, and are defined as left and right buttons by
default.
CN2
CN2
BNC
BNC
R840RR84
4
5
+3V 3
13
DGND
0R
C99
C99
1
1
0nF
0nF
AD0
ADC
PB5
2
DGND
R86
R86
DNP
JP19JPJP19
JP
R88
R88
49.9R
49.9R
DNP
Po
tent iomet er
C98
C98
10nF
10nF
VR1
VR1
10K
10K
5
1
2
3
4
DGND
4-14SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-18. User Buttons
4.3.15G-Sensor
The SAM3U-EK board is equipped with a three axis accelerometer MMA7341. Basically, it is an acceleration to analog voltage converter. Converted data on corresponding directions are read by 3 SAM3U4E
12-bit ADC channels.
Table 4-2. Direction
1
2
C8610nFC8610nF
1
2
C
8710n
8710n
DGND
BP4BP4
BP5BP5
Evaluation Kit Hardware
3
4
R66
R66
100R
100R
3
4
R6
R6
10
10
FC
F
PA18
PA19
7
7
0R
0R
BP_L EF T#
BP_RI GHT #
DirectionPIO usageADC channel
XOUTPB3AD2
YOUTPC17AD6
ZOUTPC18AD7
PC13 controls the device sleep mode. A low level on PC13 will place the MMA7341 into sleep mode to
reduce the current; conversely, a high PC13 level will wake it up from sleep mode.
Jumper JP15 controls the device g-select function, which allows the selection between two sensitivity
levels. Depending on the logic input placed on pin 10, the device internal gain will be changed, operating
within a 3g or 11g range with different sensitivities.
Table 4-3. g-Select
g-selectg-rangeSensitivity
03g440mV/g
111g117.5mV/g
Jumper JP16 provides control of the device self-test function. When the self-test function is initiated, an
electrostatic force is applied to each axis to cause it to deflect. The x- and y-axis are deflected slightly
while the z-axis is trimmed to deflect 1g. This procedure assures that both mechanical (g-cell) and electronic sections of the accelerometer are functioning.
Note that the 0-Ohm resistors R61/R62/R63 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
SAM3U-EK Evaluation Kit User Guide4-15
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
Figure 4-19. G-Sensor
PB[31:0]
PC[31:0]
AXS _SLEEP
3
ADC0_ AD2
ADC0_AD6
ADC0_AD7
#
PC1
PB3
PC17
PC18
+3V 3
+3V 3
R60
R60
R59
R59
10K
10K
10K
10K
JP15JPJP15JP
DGND
3
JP16J PJP16J P
R
610
610
R
620
620
R6
R6
RR
R
RR
R
30R
30R
C
C
3.3n
3.3n
82
F
F
3.3n
3.3n
3.3nF
3.3nF
F
F
C84
C84
C83
C83
82
MN9
MN9
MMA7341L
MMA7341L
10
13
7
2
3
4
1
14
g-S ele ct
Self Test
Sleep
XOUT
YOUT
ZOUT
NC1
NC6
VDD
VSS
NC2
NC
NC4
NC5
6
5
8
9
3
11
12
+3V 3
DGND
C81
C81
100nF
100nF
4.3.16Temperature Sensor
A temperature sensor MCP9800 is connected to the SAM3U4E TWI bus. This device also features an
open-drain output ALERT pin. The device outputs an alert signal when the ambient temperature goes
beyond the user-programmed temperature limit.
Note that the 0-Ohm resistors R15 and R16 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
Figure 4-20. Temperature Sensor
PA[31:0]
TWD0
TWCK0
TEMP_ALAR
M
P
A9
P
A10
PA17
PA18
P
A19
R150RR15
0R
R16
R16
0
0
R
R
DGNDDGND
+3V 3
R64
R64
47K
47K
DGND
MN10
MN10
MC P 9800
MC P 9800
5
4
SDA
SCLK
VDD
GND
ALE R T
1
2
3
+3V 3
DGND
C85
C85
100nF
100nF
4.3.17SD Card
The SAM3U-EK has an MMC/MMCPlus high-speed 8-bit multimedia interface. This interface is used as
a 4/8-bit interface, connected to an 8-bit SD/MMC card slot with card detection.
4-16SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-21. SD Card Socket
PC3
1
PA25
PA6
PA3
PA
7
PA
4
PC30
PC28
PA5
PA8
PC2
9
DGND
D
GND
+3V 3
DGND
+3V 3
PA[31:0]
PC[31:0]
CK
CDA
DA
2
DA3
DA
0
DA1
WKUP12
DA4
DA5
D
A6
DA
7
RA1
47KX 4
RA1
47KX 4
123
45
678
C80
100
nF
C80
100
nF
J8
7SDMM-B0B2211
J8
7SDMM-B0B2211
DAT2
1
RSV/DAT3
2
DAT4
3
CMD
4
DAT5
5
GND
6
VCC
7
CLK
8
DAT6
9
C
D
10
DAT7
11
DAT0
12
DAT1
13
SD_WP
14
GROUND1
15
GROUND
16
SHE LLE D1
17
SHELLED2
18
RA2
47KX 4
RA2
47KX 4
123
45
678
R57
10K
R57
10K
R5
6
10K
R5
6
10K
+
C79
10uF
+
C79
10uF
R5
8
10K
R5
8
10K
Evaluation Kit Hardware
4.3.18ZigBee
Table 4-4. Pin Card Detection Scheme
StatusDetection
WITHOUT CARD
SD Card inserted with write protection lock
SD Card inserted with write protection unlock, or other card inserted
The SAM3U4E product features 3 PIO controllers, PIOA, PIOB and PIOC, which multiplex the I/O lines
of the peripheral set. Each PIO controller controls up to 32 lines. Expansion ports J13, J14, J15 provide
a way for customers to define any PIO channels.
All the expansion port pins are directly connected to the SAM3U4E chip, except PB4 and PB5, which are
assigned as AD12BAD3 and AD0 by default on the board. Solder drops have been implemented on the
board to avoid signal conflicts from traces routing to expansion ports. If PB4 and PB5 need to be connected to the J14 connector, solder drops SD3 and SD4 should be shorted.
Figure 4-24. SD3 Location
Figure 4-25. SD4 Location
4-18SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
4.4Configuration
This section describes the PIO usage, the jumpers, the test points and the solder drops of a SAM3U-EK
board.
The SAM3U-EK board jumpers are used for many purposes such as internal Flash Memory reinitialization, power current measurement and other configurations.
Table 4-8. Jumpers Setting
DesignationLabelDefault SettingFeature
Close it to reinitialize the Flash content and
some of its NVM bits.
JP1ERASEOpen
JP2 (DNP)TESTNot populated (open)reserved
JP3VINCloseMeasure current feed into VDDIN pin
This jumper must be closed for more than
220 ms at power-up to perform the reinitialization.
JP5AD12BVREF
JP6VIOCloseMeasure current feed into VDDIO pins
JP7VUTMICloseMeasure current feed into VDDUTMI pin
JP8VANACloseMeasure current feed into VDDANA pin
JP9VCORECloseMeasure current feed into VDDCORE pins
JP10VPLLCloseMeasure current feed into VDDPLL pin
JP11VOUTCloseMeasure current out of VDDOUT pin
JP12NCS0CloseDisconnection possibility on NCS0
JP13NCS1CloseDisconnection possibility on NCS1
JP14NCS2CloseDisconnection possibility on NCS2
JP153AXSClose
JP163AXSClose
JP17FORCE POWER ONCloseForce +3V3 LDO output valid
JP18 (DNP)-Not populated (open)
JP19 (DNP)-Not populated (open)
Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 12-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
G-select feature, sensitivity level switch.
Close as 440mv/g, open as 117.5mV/g
Open to cause a slight deflect on each axis
output, which is device self test
Close to enable 50-Ohm terminal resistor for
AD12BAD3 BNC port
Close to enable 50-Ohm terminal resistor for
AD0 BNC port
JP20ADVREF
JP21-OpenMeasure current feed into ZigBee module
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6478E–ATARM–30-Mar-11
Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 10-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
4.4.3Test Points
Some test points have been placed on the SAM3U-EK board for the verification of important signals.
Table 4-9. Test Points
DesignationPartDescription
TP1PadAux ADC input IN3 for touch screen control
TP2PadAux ADC input IN4 for touch screen control
TP3Ring Hook+3V3
TP4Ring Hook+5V
TP5Ring HookGND
TP6Ring HookGND
TP7Ring HookGND
TP8Ring HookGND
TP9PadFWUP
TP10PadSHDN
TP11PadADVREF
TP12PadAD12BVREF
TP13PadLED_A1
TP14PadLED_A2
Evaluation Kit Hardware
TP15PadLED_A3
TP16PadLED_A4
TP17PadUTXD
TP18PadURXD
TP19PadTXD1
TP20PadRXD1
4.4.4Solder Drops
Two solder drops have been designed on the SAM3U-EK for isolation puposes.
Table 4-10. Solder Drops
DesignationDefault SettingFeature
SD3OpenIsolation of AD12BAD3 input from PIO expansion socket
SD4OpenIsolation of AD0 input from PIO expansion socket
4.4.5Assigned PIO Lines, Disconnection Possibility
As pointed out in previous interface descriptions, 0-Ohm resistors have been inserted on the PIO lines
receiver path of the SAM3U-EK. Some PIO lines are connected to an external driver on the board. The
0-Ohm resistors allow disconnecting each of these for custom usage (through PIO expansion connec-
SAM3U-EK Evaluation Kit User Guide4-23
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
tors, for example). This feature gives the user an added level of versatility for prototyping a system of his
own. See the table below.
Table 4-11. Disconnecting Possibility
DesignationDefault Assignment PIO
R14NANDRDYPB24
R15NANDOEPB17
R16NANDWEPB18
R20BL_ENPC19
R24NPCS2PC14
R25BUY_TSCPA2
R26IRQ_TSCPA24
R46RDPA27
R47RFPA31
R61AD12BAD2PB3
R62AD12BAD6PC17
R63AD12BAD7PC18
R97TKPA28
R99RKPA29
R100IRQ0_ZBEEPA0
R103URXDPA11
R104RXD1PA21
R105CTS1PA23
4-24SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
5.1Schematics
This section contains the following schematics:
Block Diagram
Design Notes
SAM3U PIO
SAM3U CPU
EBI Memory 1MB PSRAM
EBI Memory II 2GB NAND Flash
TFT LCD and TSC
UART and COM1 RS232
Audio DAC
SD/MMC Interface
Accelerometer, Temp, Buttons
USB and JTAG
Power Supply, ADC and LED
SAM3U Socket
User Interface and ZigBee
Section 5
Schematics
SAM3U-EK Evaluation Kit User Guide5-1
6478E–ATARM–30-Mar-11
5
4
3
2
1
SAM3U-EK RevB Block Diagram
DD
ATMEL Cortex M3 Processor SAM3U (LQFP144)
Reset,Debug Logic
CC
Audio DAC
Accelerometer
BB
Temperature sense
USB & UART
Power Manage
SD/MMC Card
PSRAM
Nand Flash
2.8 Inch TFT-LCD
AA
User Interface (PIO PortA,B,C)
B19-MAY-09ZXLPP 20-JAN-10
B19-MAY-09ZXLPP 20-JAN-10
B19-MAY-09ZXLPP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Block Diagram
Block Diagram
Block Diagram
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXLXXX
XX-XXX-XXZXLXXX
XX-XXX-XXZXLXXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
1
1
1
B
B
B
15
15
15
5
DD
4
3
2
1
1. SAM3U-EK Revision HISTORY
Rev: A
SCH: SAM3U-EK RevA Data: 2008/12
Note: Original Released
CC
SCH: SAM3U-EK RevB Data: 2009/04
Note: Final Released
2. Explain of Schematics
(1) Resistance Unit: "K" is
"K¦¸"
Rev: B
BB
"R" is "¦¸"
(2) "DNP" means the component is not populated by default
AA
B19-MAY-09ZXLPP 20-JAN-10
B19-MAY-09ZXLPP 20-JAN-10
B19-MAY-09ZXLPP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Design notes
Design notes
Design notes
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXLXXX
XX-XXX-XXZXLXXX
XX-XXX-XXZXLXXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
15
15
15
B
B
B
15
15
15
6.1Self-Test
A test package software is available to implement a functional test for each section of the board. Refer to
the SAM3U-EK page on www.atmel.com.
6.2Board Recovery
The SAM3U-EK is delivered with an on-board recovery procedure allowing to reprogram the board as it
was when shipped. This procedure is accessible from the Flash disk mounted on a PC when the board is
connected to this PC through the USB as described in Section 3.
Section 6
Troubleshooting
SAM3U-EK Evaluation Kit User Guide6-1
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Troubleshooting
6-2SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
7.1JTAG/ICE: Missing Pull-up Resistor on TDO Pin
The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M3 is not in debug
mode.
Problem Fix/Workaround
To avoid current consumption on VDDIO and/or VDDCORE due to floating input, an external pull-up
resistor (100 kΩ) corresponding to this PIO line must be added.
Section 7
Errata
SAM3U-EK Evaluation Kit User Guide7-1
6478E–ATARM–30-Mar-11
8.1Revision History
Table 8-1.
DocumentComments
Section 8
Revision History
Change Request
Ref.
6478EErratum added as a
6478D
6478C
6478B
6478AFirst issue.
Table 4-5, “PIO Port A Assignment” , first row edited.7387
Vendor name and reference removed from PSRAM in
Figure 4-2, ” PSRAM”
Table 4-8, JP15 and JP16 Default Settings changed from ‘Open’ to ‘Close’; JP16 Feature
edited.
Table 4-8, JP17 Default Setting changed from ‘Open’ to ‘Close’; JP17 Feature edited.6727
Section 7.1 in a newly created Section 7 “Errata” .7638
Section 4.3.2, ” Memory” and
6975
6445
SAM3U-EK Evaluation Kit User Guide8-1
6478E–ATARM–30-Mar-11
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