Atmel SAM3U-EK User guide

SAM3U-EK Evaluation Kit
....................................................................................................................
User Guide
6478E–ATARM–30-Mar-11
Section 1
Introduction.................................................................................................................1-1
1.2 User Guide ......................................................................................................................... 1-1
1.3 References and Applicable Documents ............................................................................. 1-1
Section 2
Kit Contents ................................................................................................................2-1
2.1 Deliverables ....................................................................................................................... 2-1
2.2 Electrostatic Warning ......................................................................................................... 2-2
Section 3
Power Up....................................................................................................................3-1
3.1 Power up the Board ...........................................................................................................3-1
3.2 Battery................................................................................................................................ 3-1
3.3 DevStart ............................................................................................................................. 3-1
3.5 Sample Code and Technical Support ................................................................................ 3-2
Section 4
Evaluation Kit Hardware .............................................................................................4-1
4.1 Board Overview.................................................................................................................. 4-1
4.2 Features List ...................................................................................................................... 4-2
4.3 Function Blocks.................................................................................................................. 4-2
4.3.1 Processor............................................................................................................. 4-2
4.3.2 Memory................................................................................................................ 4-2
4.3.3 Clock Circuitry...................................................................................................... 4-4
4.3.4 Reset and Wake-Up Circuitry .............................................................................. 4-5
4.3.5 Power Supply and Management.......................................................................... 4-6
4.3.6 UART ................................................................................................................... 4-7
4.3.7 USART................................................................................................................. 4-7
4.3.8 LEDs .................................................................................................................... 4-8
4.3.9 LCD, Backlight Control and Touch Panel ............................................................ 4-8
4.3.10 JTAG.................................................................................................................. 4-11
4.3.11 Audio Codec ...................................................................................................... 4-11
4.3.12 USB ................................................................................................................... 4-13
4.3.13 ADC Input ........................................................................................................ 4-14
4.3.14 User Buttons ...................................................................................................... 4-14
4.3.15 G-Sensor ........................................................................................................... 4-15
4.3.16 Temperature Sensor .......................................................................................... 4-16
4.3.17 SD Card ............................................................................................................. 4-16
SAM3U-EK Evaluation Kit User Guide 1-1
6478E–ATARM–30-Mar-11
4.3.18 ZigBee ............................................................................................................... 4-17
4.3.19 PIO Expansion ................................................................................................... 4-18
4.4 Configuration.................................................................................................................... 4-19
4.4.1 PIO Usage ......................................................................................................... 4-19
4.4.2 Jumpers ............................................................................................................. 4-22
4.4.3 Test Points ......................................................................................................... 4-23
4.4.4 Solder Drops ...................................................................................................... 4-23
4.4.5 Assigned PIO Lines, Disconnection Possibility.................................................. 4-23
Section 5
Schematics .................................................................................................................5-1
5.1 Schematics......................................................................................................................... 5-1
Section 6
Troubleshooting..........................................................................................................6-1
6.1 Self-Test............................................................................................................................. 6-1
6.2 Board Recovery ................................................................................................................. 6-1
Section 7
Errata..........................................................................................................................7-1
7.1 JTAG/ICE: Missing Pull-up Resistor on TDO Pin............................................................... 7-1
Section 8
Revision History..........................................................................................................8-1
8.1 Revision History ................................................................................................................. 8-1
1-2 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11

1.1 SAM3U Evaluation Kit

The SAM3U Evaluation Kit (SAM3U-EK) allows the evaluation of the SAM3U series devices. It has enough features to demonstrate most of the product’s capabilities to the users. The SAM3U-EK also fea­tures extension connectors to allow the users to add new interfaces in case they are not on-board.

1.2 User Guide

This guide gives details on how the SAM3U-EK has been designed. It is made up of 6 sections:
Section 1 includes references, applicable documents
Section 2 describes the kit contents, its main features
Section 3 provides instructions to power up the SAM3U-EK and describes how to use it.
Section 4 describes the hardware resources, and includes default jumper and switch settings, and the
schematics.
Section 5 provides all the board schematics
Section 6 give troubleshooting recommendations

Section 1

Introduction

1.3 References and Applicable Documents

Table 1-1. References and Applicable Documents
Title Comment
SAM3U Datasheet http://www.atmel.com/dyn/products/product_card.asp?part_id=4562
SAM3U-EK Evaluation Kit User Guide 1-1
6478E–ATARM–30-Mar-11

2.1 Deliverables

The Atmel® SAM3U-EK toolkit contains the following items:
a SAM3U-EK board
power supply
universal input AC/DC power supply with US, Europe and UK plug adapters
one 3V Lithium Battery type CR1225
one USB cable
one serial RS232 cable
A Welcome Letter
Figure 2-1. Unpacked SAM3U-EK

Section 2

Kit Contents

Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues con­cerning the contents of the kit.
SAM3U-EK Evaluation Kit User Guide 2-1
6478E–ATARM–30-Mar-11
Kit Contents

2.2 Electrostatic Warning

The SAM3U-EK board is shipped in a protective anti-static package. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when han­dling the board. Avoid touching the components or any other metallic element of the board.
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6478E–ATARM–30-Mar-11

3.1 Power up the Board

Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the screen and enjoy the demo.

3.2 Battery

The SAM3U-EK ships with a 3V coin battery.
This battery is not required for the board to start up.
The coin battery is provided for user convenience in case the user would like to exercise the date and time backup function of the SAM3U series devices when the board is switched off.

Section 3

Power Up

3.3 DevStart

The on-board NAND Flash contains “SAM3U-EK DevStart”.
It is stored in the “SAM3U-EK DevStart” folder on the USB Flash disk available when the SAM3U-EK is connected to a host computer and you click on the Flash Disk icon of the on-board demo.
Click the file “welcome.html” in this folder to launch SAM3U-EK DevStart.
SAM3U-EK DevStart guides you through installation processes of IAR toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and how to program it into the SAM3U-EK. Optionally, if you have a SAM-ICE how to debug the code.
We recommend that you backup the “SAM3U-EK DevStart” folder on your computer before launching it.

3.4 Recovery Procedure

The DevStart ends by giving step-by-step instructions on how to recover the SAM3U-EK to the state as it was when shipped by Atmel.
Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want to recover from this situation.
EWARM, Keil MDK and GNU
, instructions are also given about
SAM3U-EK Evaluation Kit User Guide 3-1
6478E–ATARM–30-Mar-11
Power Up

3.5 Sample Code and Technical Support

After boot up, you can run some sample code or your own application on the development kit. You can download sample code and get technical support from Atmel website
http://www.atmel.com/products/at91/sam3landing.asp?family_id=605
Figure 3-1. Atmel Website for SAM3U Series
3-2 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11

4.1 Board Overview

PIO
SAM3U-LQFP144
SAM3U
SWJ-DPUART
System Controller
System Controller
External Memory
External Memory
EBI / 3.3v
EBI / 3.3v
PSRAM
NAND
FLASH
Multimédia Cards Interface
Multimedia Cards Interface
MCI
MCI
USART
USART
USB
USB
Device
Device
PIO
PIO
TWI
TWI
oooooooo oooooooo
4/8 bits interface SD/MMC
Micro
Line In
HeadPh
oooooooo oooooooo
LCD TFT
240 * 320
LCD TFT
240 * 320
PWM
PWM
RS232
Codec
WM8731
Led
User I/OAudioMultimedia CardTFT LCDMain Memory
Touch
Screen
Touch
Screen
BNC * 2VCC 5V JTAGRS232USB Device
High / Full
RS232ZIGBEE
Power /
Shdn
Push Btn
ADS7843
ADS7843
HX8347
HX8347
SPI
SPI
CD
SSC
SSC
ooooo ooooo
ZIGBEE
ZIGBEE
Analog
Analog
TWI
TWI
MCP9800
Back Light
AAT3194
RS232
This section introduces the Atmel SAM3U Evaluation Kit design. It introduces system-level concepts, such as power distribution, memory, and interface assignments.
The SAM3U-EK board is based on the integration of an ARM PSRAM (pseudo-static RAM), NAND Flash and a set of popular peripherals. It is designed to provide a high performance processor evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM3U-EK Block Diagram

Section 4

Evaluation Kit Hardware

®
Cortex®-M3 processor with on-board fast
SAM3U-EK Evaluation Kit User Guide 4-1
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware

4.2 Features List

Here is the list of the main board components and interfaces:
SAM3U4E QFP chip with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector, for external system clock input
PSRAM
NAND Flash
Backup Battery
2.8 inch TFT color LCD display with touch-panel and backlight
UART port with level shifter IC
USART port with level shifter IC
Audio codec with input and output jacks: stereo headphone out, stereo line in, mono microphone in
SD/MMC interface
3-D accelerometer sensor
Temperature sensor
Reset and Wake-Up buttons: NRST, NRSTB, FWUP
User buttons: Left and Right
High Speed USB device port
JTAG port
On-board power regulation with shutdown control (by the SAM3 chip)
Two user LEDs
Power LED
BNC connectors for ADC input
User potentiometer connected to the ADC input
ZigBee
3x32 bit PIO connection interfaces (PIOA, PIOB, PIOC)
®
connector

4.3 Function Blocks

4.3.1 Processor
The SAM3U-EK is equipped with a SAM3U4E in LQFP144 package.
4.3.2 Memory
The SAM3U4E chip embeds:
256 Kbytes of embedded Flash
48 Kbytes of embedded SRAM with dual bank
16 Kbytes of ROM with embedded bootloader routines (UART, USB) and IAP (In-Application
Programming functions) routines.
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6478E–ATARM–30-Mar-11
The SAM3U4E features an External Bus Interface (EBI) that permits interfacing to a broad range of
D0 D1 D2
D3 D4 D5 D
6 D7 D
8 D9 D10 D
11 D12 D13 D14 D15
A1 A
2
A
3 A4 A5 A
6 A
7 A8 A9 A10 A11 A1
2
A
13 A1
4 A15 A16 A17 A
18
A19
NBS0 NBS1
NCS0 NRD NW
E
PB9 PB10 PB11 PB12
PB16
PB13
PB1
5
PB14
PB2
8
PB25
PB27
PB6
PB29
P
B26
PB30 P
B31
PC2
PC2
0
PC1
PC6
PC3
PC0
PC2
1
PC4
PC8
PC1
0
PC22
PC5
PC11
PC7
PC9
PC2
5
PC24
PC2
3
PB19 PB23
PC1
5
PB8
P
B7
P
B19 PB20 P
B23
PB
7
PB2
0
+3V3
+3V3
+3V3
DGND
PB[31:0]
PC[31:0
]
R
11
4
7K
R
11
4
7K
JP1
2
J
P
JP1
2
J
P
C28 100nF
C28 100nF
C29 1uF
C29 1uF
R10 47K
R10 47K
MN2 PSRAM 512K x16
MN2 PSRAM 512K x16
A0
3
A1
4
A2
5
A3
9
A4
10
A5
1
5
A
6
16
A
7
2
2
A8
4
4
A
9
45
A1
0
4
6
A11
47
A12
3
9
A13
4
0
A14
33
A1
5
3
4
A16
28
A17
2
1
A18
4
3
DQ0
12
DQ1
17
DQ2
18
DQ3
23
DQ4
29
DQ5
3
5
DQ6
36
D
Q7
42
DQ8
7
D
Q9
13
D
Q10
1
4
DQ1
1
20
D
Q12
26
DQ13
32
DQ
14
31
D
Q15
3
7
LB
#
1
UB#
8
CE#
1
1
OE
#
2
WE#
4
1
NC1
27
N
C2
38
NC3
48
VCC
24
VCCQ
25
VSS
3
0
VSSQ
19
ZZ#
6
external memories and virtually to any parallel peripheral. The SAM3U-EK board is equipped with two kinds of memory devices connected to the SAM3U4E EBI:
One 512K x16 PSRAM device
One NAND Flash MT29F2G16ABD.
Figure 4-2. PSRAM
Evaluation Kit Hardware
(1)
Note: 1. Brand and reference may vary. Check the bill of materiel (BOM) corresponding to your
kit version to get precise information regarding that matter.
SAM3U-EK Evaluation Kit User Guide 4-3
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
PB21
PB22
PB18
PB1
7
PB24
PB6 PB31 PB30 PB16 PB15 PB14 PB13 P
B29
PB28 PB12 PB11 P
B10 PB9 PB27 PB26 PB25
PC12
+3V 3
+
3V3
+3V 3
D
GND
+3V 3
DGND
+3V 3
PB[31:0]
PC[31:0]
NANDRD
Y
N
ANDOE
NANDC
LE NANDAL E NANDWE
NCS
1
R18 DNP
R18 DNP
C30 100nF
C30 100nF
C33 100nF
C33 100nF
C31 100nF
C31 100nF
R
17 47K
R
17 47K
R13 4
7K
R13 4
7K
R12 47K
R12 47K
C32 1
00nF
C32 1
00nF
R
14 0R
R
14 0R
JP13JPJP13 JP
MN3 MT29F 2G16AADW P
MN3 MT29F 2G16AADW P
NC1
1
NC2
2
NC3
3
NC4
4
NC5
5
NC6
6
R/B#
7
RE#
8
CE#
9
NC
7
10
NC8
11
VCC1
12
VSS 1
13
NC9
14
NC10
15
CLE
16
ALE
17
WE#
18
WP#
19
NC11
20
NC12
21
NC13
22
NC14
23
NC15
24
VSS 2
25
IO8
26
IO9
27
IO10
28
IO0
29
IO1
30
IO2
31
IO3
32
IO11
33
VCC2
34
NC16
35
VSS 3
36
VCC3
37
NC17
38
VCC4
39
IO12
40
IO4
41
IO5
42
IO6
43
IO7
44
IO13
45
IO14
46
IO15
47
VSS 4
48
Figure 4-3. NAND Flash
The chip select signals NCS0 and NCS1 are used for PSRAM and NAND Flash chips selection, respec­tively. Furthermore, a dedicated jumper can disconnect these from the memories, to let NCS0 and NCS1 be used for other custom purpose.
4.3.3 Clock Circuitry
The clock generator of a SAM3U4E microcontroller is made up of:
A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4, 8 or
12 MHz (default value is 4 MHz).
A 480 MHz UTMI PLL providing a clock for the USB High Speed Device Controller
A 96 to 192 MHz programmable PLL (input from 8 to 16 MHz), capable of providing the clock MCK to
the processor and to the peripherals.
The SAM3U-EK board is equipped with one 12 MHz crystal, one 32,768 Hz crystal and an external clock input connector (optional, not populated by default).
4-4 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-4. External Clock Source
XIN32
X
IN1
XOUT32
XOUT1
X
OUT1
XIN
1
XOUT32
XIN32
DGN
D
DGND
DGND
D
GND
XIN XOUT
XIN3
2
X
OUT32
C2
6
20pF
C2
6
20pF
R7
0
RR7
0
R
Y1
12.000MHz
Y1
12.000MHz
C25 20pF
C25 20pF
MN1B SAM3U
MN1B SAM3U
XIN32
144
XOUT32
143
XIN
36
XOUT
35
GND1
18
GNDPL
L
33
GNDUTMI
43
GND2
52
GND
3
6
0
GNDAN
A
75
GND4
9
0
GND
5
1
26
GNDBU
140
C27 20pF
C27 20pF
R
60
RR
60
R
Y2
32.768KHz
Y2
32.768KHz
1 2
3
C24 20pF
C24 20pF
J1J
1
1
2 3
5
4
R8
DN
PR8
DN
P
D
GND
VBU
NRST
NRSTB
FWUP
WAKE_UP#
BP2BP2
1
42
3
BP1BP1
1
42
3
BP3BP3
1
42
3
R
65
100K
R
65
100K
4.3.4 Reset and Wake-Up Circuitry
The on-board NRST button BP1 and NRSTB button BP2 provide the SAM3U4E with external reset con­trol. The on-board WAKE-UP button BP3 can be used to wake up the chip from low power modes.
Evaluation Kit Hardware
Figure 4-5. System Buttons
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide a reset signal out to the external components. Conversely, it can be asserted low from the outside to reset the microcontroller, its core and peripherals, Backup region (RTC, RTT and Supply Controller)
6478E–ATARM–30-Mar-11
excepted. The NRST pin integrates a permanent pull-up resistor of about 100 kOhm to VDDIO.
On the SAM3U-EK board, the NRST signal is connected to the LCD module and JTAG port.
The NRSTB pin is an input-only signal that enables the asynchronous reset of the SAM3U4E series when asserted low. The NRSTB pin integrates a permanent pull-up resistor of about 15 kOhm. This allows the connection of a simple push button for implementing a system-user reset. Whatever the mode, this pin will reset the chip including the Backup region (RTC, RTT and Supply Controller). It makes the chip behave as for a Power-on reset. An external capacitor (10 nF) is connected between NRSTB and VDDIO to enforce the signal stability on this pin.
SAM3U-EK Evaluation Kit User Guide 4-5
Evaluation Kit Hardware
PWR_CN
PWR_CN
DGND
+5V +5V
DGND
+3V 3
+5V
DGND
DGN
D
+3V3 +5V
DGN
D
DGND
SHD
N
D12B
VRE F
ADVRE
F
+3
V3
+3V 3
+2V5
+
2V5
C92 100nF
C92 100nF
C104 100nF
C104 100nF
MN13 ZEN056V130A24LS
MN13 ZEN056V130A24LS
1
2
3
+
C95 100uF
+
C95 100uF
R90
4.7K
R90
4.7K
MN12 MIC29152W U
Micrel's 1.5A L DO, TO263-5
MN12 MIC29152W U
Micrel's 1.5A L DO, TO263-5
VIN
2
VOUT
4
SD
1
GND1
3
ADJ
5
GND2
6
C96 100nF
C96 100nF
TP3 +3V 3
TP3 +3V 3
R
80
10
K
R
80
10
K
Q2
I
RLML2502
Q2
I
RLML2502
1
3
2
J
P20
JUMP_3
J
P20
JUMP_3
1
2
3
R7
7
200R 1%
R7
7
200R 1%
JP1
7
J
P
JP1
7
J
P
C9
4
15p
F
C9
4
15p
F
TP4 +5V
TP4 +5V
MN14 BNX002-01
MN14 BNX002-01
SV
1
SG
2
C
V
3
CG1
4
C
G2
5
CG3
6
+
C93 22uF
+
C93 22uF
R79 100K
R79 100K
C103 100
nF
C103 100
nF
R78 100K
R78 100K
JP
5
JUMP_
3
JP
5
JUMP_
3
1
2
3
J11
MP179P 2.1m
m
J11
MP179P 2.1m
m 1 2
3
R76 330R 1%
R76 330R 1%
MN15
LM4040-2.5
MN15
LM4040-2.5
Q1 IRLML6401
Q1 IRLML6401
1
3
2
The FWUP pin is Force Wake-Up active low input. It is enabled as a wake-up source with external pull­up. If the FWUP pin is asserted for a time longer than the debouncing period (configurable for 100 µs, 1 ms, 16 ms, 128 ms or 1 second), a core power supply wake-up is initiated.
4.3.5 Power Supply and Management
The SAM3U-EK board is supplied with an external 5V DC block through input J11. Protection circuitry is obtained by a PolyZen diode MN13 and an LC combinatory filter MN14.
The adjustable LDO regulator MN12 is employed for the main supply of the 3.3V rail. It powers all the
3.3V board components. The shut down control of this LDO is made by MOSFETs Q1, Q2 piloted by the SAM3U4E SHDN pin. When SAM3U4E is in backup mode, SHDN pin outputs a low level signal, which shuts down the LDO. When the device is running (not in backup mode), SHDN pin output a high level signal, which enables the LDO.
By closing the “FORCE POWER ON” jumper JP17, the P-channel MOSFET Q1 will be forced on, no matter the level present on the SHDN pin, and the LDO 3.3V output will thereby be forced active.
Figure 4-6. Power Block
The SAM3U-EK board uses the 3.3V LDO output as its main supply source. VDDUTMI, VDDANA, VDDIO, VDDIN are powered directly from that source.
The internal 1.8V regulator output feeds VDDCORE and VDDPLL.
VDDCORE and VDDPLL can also be powered by an external supply. (Refer to the SAM3U datasheet for more details).
4-6 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
VDDBU pin is powered from the 3.3V rail and a backup battery BT1 via a dual Schottky diode D6.
Figure 4-7. Backup Battery
+3V 3
D
GND
VBU
DGND
D6 BAT54C
D6 BAT54C
3
2
1
MN1B SAM3U
MN1B SAM3U
VDDBU
139
CR1225
3V
BT1 KY001
CR1225
3V
BT1 KY001
+
1
-
2
3
3
4
4
C21 1uF
C21 1uF
JP4JPJP4 JP
P
A12
PA1
1
DGND
+3V
3
DGND
+3V3+3V3
PA[31:0]
UTXD URX D
C45 100nF
C45 100nF
C
44
100nF
C
44
100nF
C46 100nF
C46 100nF
R330RR330R
MN6 MAX3 232CS E
MN6 MAX3 232CS E
T1IN
11
T
2IN
10
R1OUT
1
2
R2OUT
9
T1OUT
14
T2OUT
7
R1IN
13
R2IN
8
V+
2
C1+
1
C1-
3
C2+
4
C2-
5
V-
6
VCC
16
GND
15
C48 100nF
C48 100nF
R3
1
100K
R3
1
100K
J3
MALE R IG HT ANGL ED
J3
MALE R IG HT ANGL ED
5
4
3
2
1
9
8
7
6
10
11
C47 100nF
C47 100nF
R1030RR1030R
TP1
7
SM
D
TP1
7
SM
D
TP1
8
SMD
TP1
8
SMD
R32 100K
R32 100K
4.3.6 UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for com­munication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to the DB9 male connector J3.
Figure 4-8. UART
Evaluation Kit Hardware
4.3.7 USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex uni­versal synchronous/asynchronous serial link. The data frame format is extensively configurable (data length, parity, number of stop bits) to support a broad range of serial communication standards. The USART is also associated with PDC channels for TX/RX data access.
There are 3 USARTs on the SAM3U4E device, SAM3U-EK connects the USART1 bus (including TXD, RXD, RTS, CTS handshake signals control) to the DB9 male connector J4 through the RS232 Trans­ceiver MN7.
6478E–ATARM–30-Mar-11
SAM3U-EK Evaluation Kit User Guide 4-7
Evaluation Kit Hardware
Figure 4-9. USART
PA[31:0]
TXD1 RXD1 R
TS1
CTS1
P
A20 PA2 PA2 PA23
4.3.8 LEDs
There are three LEDs on the SAM3U-EK board:
D2 and D3 green LEDs are user defined and controlled by the GPIO.
D4 red LED is a power LED indicating that the 3.3V rail is enabled. It can also be controlled by the
GPIO (by default, the GPIO is disabled and an on-board pull-up to 3.3V lights the LED).
+3V3+3V3
R3
R3 1
1
00K
00K
1 2
T
T
P19
P19
SMD
SMD
4
4
3
+3V
R3
R3
5
5
100K
100K
R104 0RR104 0R
R1050RR105
C5
C5
1
1
100nF
100nF
0R
TP2
TP2 SM
SM
MN7
MN7 MAX3232C SE
MAX3232C SE
16
VCC
C49
C49
F
F
100n
100n
C
C 100nF
100nF
GND
D
0
0
D
D
2
V
+
6
V
52
52
-
15
GND
1
1
T1IN
2
1
R1OUT
0
1
T2IN
9
R2OUT
C1+
C1-
C2+
C
T1OUT
R1IN
2OUT
T
R2IN
1
C50
C50 100nF
3
4
5
2-
14 13 7 8
100nF
C53
C53 100nF
100nF
DGND
J4
J4
MALE R IG HT ANGL ED
MALE R IG HT ANGL ED
1 6 2 7 3 8 4 9 5
10
11
Figure 4-10. LEDs
PB[31:0]
USR_LED1#
USR_LED2#
POWER_LE D#
4.3.9 LCD, Backlight Control and Touch Panel
SAM3U-EK carries one TFT/Transmissive LCD module with touch screen, FTM280C12D, with inte­grated driver IC HX8347. The LCD display size is 2.8 inches, with a native resolution of 240 x 320 pixels.
IRLML
IRLML
DGN
D
Q3
Q3
2502
2502
B4
P
B5
P
PB0
PB1
PB2
R8
R8 220R
220R
R8
R8 220R
220R
5
5
7
7
D2 green-led
D2 green-led
0603
0603
D3 green-led
D3 green-led
0603
0603
89 100K
89 100K
R
R
+3V 3
1
R92
R92 2
2
20R
20R
32
D4 red-led
D4 red-led
0603
0603
4-8 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Table 4-1. LCD Module Pin Out
Pin Symbol Function
1 GND Ground
2CS Chip Select
3 RS Register select signal
4 WR Write operation signal
5 RD Read operation signal
6~21 DB0~DB15 Data bus
22~23 NC No connection
24 RESET Reset signal
25 GND Ground
26 X+ Touch panel X_RIGHT
27 Y+ Touch panel Y_UP
28 X- Touch panel X_LEFT
29 Y- Touch panel Y_DOWN
30 GND Ground
Evaluation Kit Hardware
31 VDD1 Power supply for digital IO Pad
32 VDD2 Power supply for analog circuit
33~36 A1~A4 Power supply for backlight
37~38 NC No connection
39 K Backlight ground
The LCD module gets its reset from NRST. As explained previously, this NRST is shared with the JTAG port and the push button BP1. The LCD chip select signal is connected to NCS2 (a dedicated jumper can disable it, making NCS2 available for other custom usage).
The SAM3U4E communicates with the LCD through PIOB where a 16-bit parallel “8080-like” protocol data bus has to be implemented by software.
SAM3U-EK Evaluation Kit User Guide 4-9
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
PB10
PB28
P
B31
PB6
X_LE
FT
PB13
PB19
PB15
Y_DOWN
P
B26
PB11
PB23
PB16
PB29 PB30
P
B9
PB8
P
B14
CS#
PB27
PB25
X_RIGHT Y_UP
PB12
P
C16
LED_A2
PC19
LED_A1
LED_A4
LED_A3
LED_A1
LED_A2
LED_A3
L
ED_A4
LED_A1 LED_A2 LED_A3 LED_A4
X_RIGHT
X_LEFT
Y_UP
Y_DOWN
DGND
D
GND
+3V3
DGND
VLED
+3V 3
DGND
+3V 3
DGND
PB[31:0]
NRST
NOT P OPUL AT E D
C34 1uF
C34 1uF
TP14 SMD
TP14 SMD
TP13 SMD
TP13 SMD
TP16 SMD
TP16 SMD
R
94 0
RR
94 0
R
B7 BN03K 314S300R
B7 BN03K 314S300R
D5 PAC DN044Y5R
TVS, SOT23-5
D5 PAC DN044Y5R
TVS, SOT23-5
1
2
3
4
5
MN4 AAT3194IT P
MN4 AAT3194IT P
C1+
4
C1-
3
EN/SET
9
C2+
1
C2-
12
OUT
2
IN
10
GND
11
D1
8
D2
7
D3
6
D4
5
R95 0RR95 0R
R19 47K
R19 47K
R200RR20 0R
C35 1uF
C35 1uF
C39 100nF
C39 100nF
J2 FH 26-39S-0. 3SH W
J2 FH 26-39S-0. 3SH W
GN
D1
1
CS
2
RS
3
WR
4
RD
5
DB0
6
DB1
7
DB2
8
DB3
9
DB4
10
DB5
11
DB6
12
DB7
1
3
DB8
14
DB9
1
5
DB1
0
16
DB11
17
DB1
2
18
DB13
19
DB1
4
2
0
DB1
5
21
NC1
22
N
C2
23
RESET
24
GN
D2
2
5
X
+
26
Y+
27
X
-
28
Y-
29
GN
D3
3
0
VDD1
31
VDD2
32
A
1
33
A2
34
A
3
3
5
A4
36
NC3
37
N
C4
38
K
39
shelled
1
4
0
shelled2
41
JP1
4
JP
JP1
4
JP
R93 0RR93 0R
R96 0RR96 0R
TP15 SMD
TP15 SMD
+
C38 10u
F
+
C38 10u
F
C37 1uF
C37 1uF
C36
4.7uF
C36
4.7uF
Figure 4-11. LCD Block
LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 charge pump, MN4. The AAT3194 is controlled by the SAM3U4E through a single line Simple Serial Control (S2Cwire) interface, which permits to enable, disable, and set the LED drive current (LED brightness control) from a 32-level logarithmic scale. Four 0-Ohm resistors R93/R94/R95/R96 are implemented for optional current limita­tion (replace 0 Ohm with the required resistor value).
The LCD module integrates a 4-wire touch screen panel controlled by MN5, ADS7843, which is a slave device on the SAM3U4E SPI bus.
The ADS7843 touch ADC auxiliary inputs IN3/IN4 are connected to test points for optional function extension.
4-10 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-12. Touch Screen Controller
X_RI
GHT
X_RI
GHT
Y_UP X_LEFT Y_DOWN
PA
13
PA14
PA15
PA
2
PA24
PC14
PC14
DGN
D
+3V3
+3V 3 +3V 3
AGND
1
PA[31:0]
PC[31:0
]
S
PCK
MOS
I MISO NP CS 2
BUY_TSC IRQ_TSC
C43
4.7uF
C43
4.7uF
C4
0
100nF
C4
0
100nF
R28 100K
R28 100K
TP2 S
MD
TP2 S
MD
TP1 SMD
TP1 SMD
R2
70
RR2
70
R
R2
60
RR2
60
R
C4
1
100nF
C4
1
100nF
R25
0
RR25
0
R
R2
9
100K
R2
9
100K
R2
40
RR2
40
R
R22 100
K
R22 100
K
R3
0
0R
R3
0
0R
C42 100nF
C42 100nF
R21 100
K
R21 100
K
MN5 ADS 7843E
MN5 ADS 7843E
XP
2
Y
P
3
XM
4
YM
5
DCLK
1
6
DIN
1
4
D
OUT
12
C
S
15
BUS
Y
1
3
P
ENIRQ
1
1
VRE F
9
VCC
1
1
VCC
2
1
0
GND
6
IN3
7
I
N4
8
L1 10uH/100mA
L1 10uH/100mA
R911RR91 1R
X_LEFT Y_DOWN
Y_UP
J2 FH26-39S-0.3S HW
J2 FH26-39S-0.3S HW
X
+
26
Y+
27
X-
2
8
Y-
2
9
Evaluation Kit Hardware
4.3.10 JTAG
A standard 20-pin JTAG connector is implemented on the SAM3U-EK for any ARM JTAG emulator con­nection, such as SAM-ICE.
Note that the NRST net is connected to the system button BP1, and is also used to reset the LCD mod­ule. 0-Ohm resistor R75 may be removed in order to isolate the JTAG port from the system reset signal.
Figure 4-13. JTAG Connector
+3V
3
R72
R72
R73
100K
100K
R75 0
R75 0
R73 100K
100K
R74
R74
K
K
100
100
R
R
J10
J10 IDC20-2.54mm
IDC20-2.54mm
1
VTref
3
nT RS T
5
TDI
7
TMS
9
TCK
11
RTCK
13
TDO
15
RST
nS DBG R Q17GND8
19
DBG ACK
Vsupply
GND1 GND2 GND3 GND4 GND5 GND6 GND7
GND9
2 4 6 8 10 12 14
6
1 18 20
DGND
C90
C90 100nF
100nF
6478E–ATARM–30-Mar-11
R7
R7
R70
R70 100K
100K
TDI TMS TCK
DO
T
NR S T
4.3.11 Audio Codec
SAM3U-EK Evaluation Kit User Guide 4-11
The SAM3U-EK includes a WOLFSON codec WM8731 for digital sound input and output. This interface includes audio jacks for:
microphone input,
line audio input, and
headphone output.
1
1
100
100
K
K
DG
+
+
ND
C91
C91 10uF
10uF
Evaluation Kit Hardware
BCLK
ADCLRC
DACLRC ADCDAT
DACDAT
WM8731
CODEC
SAM3U4E
Note: The ADC and DAC can run at different rates
BCLK PA 31 PA 30 PA27 PA26
The SAM3U4E programmable clock output is used to generate the WM8731 master clock (MCLK). The SAM3U4E ODT (On-Die Termination) feature guarantees a signal integrity on this clock line without the need for external discrete components.
WM8731 pin 21 MODE is pulled down by default; this configures the device as a TWI device for internal register access.
Pin15 CSB is pulled up, which sets its TWI address as 33 [0x0011011].
The WM8731 digital interface works in slave mode on the SAM3U4E Synchronous Serial Controller (SSC) interface, which means that Codec digital audio bit clock and ADC/DAC left/right control clock are to be generated by the SAM3U4E.
Figure 4-14. Codec Slave Mode
The WM8731 ADC and DAC have separated left/right control clocks to run at different rates.
The bit clock is shared; it can be the SSC transmitter clock (TK) or the receiver clock (RK). The default setting on SAM3U-EK is TK and RK shorted together through R97/R99. Please note that trying different ADC/DAC rates would mean different RK/TK rates; this default setting can be modified.
The 0-Ohm resistors R46/R47/R97/R99 have been implemented to offer a disconnection possibility (freeing these dedicated PIO lines for other custom usage).
4-12 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-15. Codec Block
T
PA
0
DGND
DGNDDGND
DGND
D
HSDM
D
HSDP
PA[31:
0]
V
BUS_USB
NOT POPULATED
R
69
68K
R
69
68K
C89
100nF
C89
100nF
J9 USB TYPE B PORT
J9 USB TYPE B PORT
VBUS
1
D-
2
D+
3
GND
4
E_GND0
5
E_GND1
6
B6 BN03K 314S300R
B6 BN03K 314S300R
MN11 TPD
3E 001DR LR
MN11 TPD
3E 001DR LR
IO1
1
IO2
2
GND3I
O3
4
VCC
5
C
88
10p
F
C
88
10p
F
R68 47
K
R68 47
K
+3V 3
+
+
C5
TWD TWCK0
CK0
P
D F
T
D
R
F
R
C5 10uF
10uF
DGND
0
PA9 PA10
P
A21 BCLK PA26 P
A30 P
A27 PA3
1
A[31:0]
+
4
4
AGND
3V3
D
+
+
C61
C61 10uF
10uF
+3V3+3V
R
R
38
38
100K
100K
R46 0RR46 0R R47 0RR47 0R
R4910
R4910
GND
C5
C5 1
1
00nF
00nF
R39
R39
4.7K
4.7K
C5
C5
5
5
6
6
00nF
00nF
1
1
C62
C62
00nF
00nF
1
1
3
0
0
R4
R4
4.7K
4.7K
K
K
PA9 PA1 PA2 PA26 PA27 PA28 PA29 PA30 PA31
8
8
MN
MN XWM8731E DS
XWM8731E DS
1
DBVDD
27
DCVD
2
8
D
GND
26
XTO
2
CLKOUT
16
VMID
1
2
L
OUT
13
ROU
22
CSB
23
SDIN
2
4
SCLK
2
5
XTI/MCLK
3
BCLK
4
DACDAT
5
DACLRC
6
ADCDAT
7
ADCLR C
21
MODE
0 1
70
70
R9 R990RR990R
Evaluation Kit Hardware
C68
C68 220pF
220pF
C77
C77 100nF
100nF
AVDD
C58
C58 100nF
100nF
AGND
R36
R36 47K
47K
AGND
C69
C69 220pF
220pF
C72 1uFC72 1uF
L2
L2 1
1
0uH/100mA
0uH/100mA
R5
R5
R
R
0
0
+
+
C59
C59 10uF
10uF
B1
B1 BN03K314S600R
BN03K314S600R
B2
B2 BN03K 314S600R
R41 5.6KR41 5.6K
R42 5.6KR42 5.6K
R44
R44
5.6K
5.6K
AGND
R52
R52 47K
47K
AGND
AVDD+3V 3
+
+
C7
C7 47uF
47uF
AGND
BN03K 314S600R
8
8
B3
B3 BN03K 314S600R
BN03K 314S600R
B4
B4
BN03K 314S600R
BN03K 314S600R
B5
B5 BN03K 314S600R
BN03K 314S600R
C64
C64 470pF
470pF
C70
C70 470pF
470pF
C74
C74 470pF
470pF
R540RR54 0R
C65
C65 470pF
470pF
FGND
C71
C71 470pF
470pF
FGND
1
1
R5
R5 0R
0R
75
75
C
C DNP
DNP
R37
R37 47K
47K
R43
R43
5.6K
5.6K
C73
C73 220pF
220pF
5
5
J5
J5 EARJACK
EARJACK
1 2 3 4 5
HEADPHONE
T
LI NE-OU
J
J
6
6
K
K
EARJAC
EARJAC
1 2 3 4 5
LI NE- IN
J
J
7
7
K
K
EARJAC
EARJAC
1 2 3 4 5
MON O / S T E R E O MI C R O I NP U T
R530RR53 0R
AGNDFGND
1
4
AVD
D
8
BCL
K
HPVDD
AGND
HPGND
LHPOUT
RHPOUT
LLINEIN
RLINEI
MIC BIAS
M
ICIN
C57
C57 100nF
+
+
60 220uF
60 220uF
C
C
+
+
C63 220uF
C63 220uF
C661uFC661uF
C67 1uFC67 1uF
R48680RR48680R
R
R
50 330R
50 330R
+
+
C76
C76 10uF
10uF
DGND
100nF
15 11
9
1
0
2
0
1
9
N
17
18
D
T
RR9
R
4.3.12 USB
The SAM3U4E UDPHS port is compliant with the Universal Serial Bus (USB) rev 2.0 High Speed device specification. J9 is a B-type receptacle for USB device.
Both R2 and R3 39-Ohm resistors build up a 90-Ohm differential impedance together with the 5-Ohm output impedance of the Hi-speed channel drivers.
R68 and R69 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets low­ered to a PIO compatible 3.3V level) through PA0. Note that PA0 is also shared with ZigBee signal IRQ0.
Figure 4-16. USB Slave Block
SAM3U-EK Evaluation Kit User Guide 4-13
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
4.3.13 ADC Input
There are 8 multiplexed analog channel inputs on the 12-bit ADC, and 8 multiplexed analog channel inputs on the 10-bit ADC. SAM3U-EK optionally connects the two ADC channels to BNC header (check for your actual components implementation, schematics and BOM, on http://www.atmel.com/products/). One is 12-bit ADC channel 3, shared with PIO pin PB4. The other one is 10-bit ADC channel 0, shared with PIO PB5.
A potentiometer is also connected to these two channels to implement an easy access to ADC program­ming and debugging (or implement an analog user control such as display brightness, volume, etc.). Please note that SAM3U-EK default setting connects both AD12BAD3 and AD0 to the potentiometer so that AD12BAD3 and AD0 are actually shorted. If these two ports need to work separately, R82 and/or R84 should be removed.
There is another ADC application capability on SAM3U-EK (See “G-Sensor” on page 4-15.)
Figure 4-17. ADC Input
CN1
CN1 BNC
BNC
R81
R81 DNP
JP18JPJP18
JP
R83
R83
49.9R
49.9R
DNP
C97
C97 10nF
10nF
5
1 2 3 4
R820RR82 0R
PB4
ADC
AD12BAD3
4.3.14 User Buttons
2 user buttons on the SAM3U-EK are connected to PIO lines, and are defined as left and right buttons by default.
CN2
CN2 BNC
BNC
R840RR84
4
5
+3V 3
13
DGND
0R
C99
C99 1
1
0nF
0nF
AD0
ADC
PB5
2
DGND
R86
R86 DNP
JP19JPJP19 JP
R88
R88
49.9R
49.9R
DNP
Po
tent iomet er
C98
C98 10nF
10nF
VR1
VR1 10K
10K
5
1 2 3 4
DGND
4-14 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-18. User Buttons
4.3.15 G-Sensor
The SAM3U-EK board is equipped with a three axis accelerometer MMA7341. Basically, it is an acceler­ation to analog voltage converter. Converted data on corresponding directions are read by 3 SAM3U4E 12-bit ADC channels.
Table 4-2. Direction
1 2
C86 10nFC86 10nF
1 2
C
87 10n
87 10n
DGND
BP4BP4
BP5BP5
Evaluation Kit Hardware
3 4
R66
R66 100R
100R
3 4
R6
R6 10
10
FC
F
PA18
PA19
7
7
0R
0R
BP_L EF T#
BP_RI GHT #
Direction PIO usage ADC channel
XOUT PB3 AD2
YOUT PC17 AD6
ZOUT PC18 AD7
PC13 controls the device sleep mode. A low level on PC13 will place the MMA7341 into sleep mode to reduce the current; conversely, a high PC13 level will wake it up from sleep mode.
Jumper JP15 controls the device g-select function, which allows the selection between two sensitivity levels. Depending on the logic input placed on pin 10, the device internal gain will be changed, operating within a 3g or 11g range with different sensitivities.
Table 4-3. g-Select
g-select g-range Sensitivity
0 3g 440mV/g
1 11g 117.5mV/g
Jumper JP16 provides control of the device self-test function. When the self-test function is initiated, an electrostatic force is applied to each axis to cause it to deflect. The x- and y-axis are deflected slightly while the z-axis is trimmed to deflect 1g. This procedure assures that both mechanical (g-cell) and elec­tronic sections of the accelerometer are functioning.
Note that the 0-Ohm resistors R61/R62/R63 have been implemented to offer a disconnection possibility (freeing these dedicated PIO lines for other custom usage).
SAM3U-EK Evaluation Kit User Guide 4-15
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
Figure 4-19. G-Sensor
PB[31:0]
PC[31:0]
AXS _SLEEP
3
ADC0_ AD2 ADC0_AD6 ADC0_AD7
#
PC1
PB3 PC17 PC18
+3V 3
+3V 3
R60
R60
R59
R59 10K
10K
10K
10K
JP15 JPJP15 JP
DGND
3
JP16 J PJP16 J P
R
61 0
61 0
R
62 0
62 0
R6
R6
RR
R RR
R
30R
30R
C
C
3.3n
3.3n
82
F
F
3.3n
3.3n
3.3nF
3.3nF
F
F
C84
C84
C83
C83
82
MN9
MN9 MMA7341L
MMA7341L
10 13
7
2 3 4 1
14
g-S ele ct Self Test Sleep
XOUT YOUT ZOUT NC1 NC6
VDD
VSS
NC2 NC NC4 NC5
6
5
8 9
3
11 12
+3V 3
DGND
C81
C81 100nF
100nF
4.3.16 Temperature Sensor
A temperature sensor MCP9800 is connected to the SAM3U4E TWI bus. This device also features an open-drain output ALERT pin. The device outputs an alert signal when the ambient temperature goes beyond the user-programmed temperature limit.
Note that the 0-Ohm resistors R15 and R16 have been implemented to offer a disconnection possibility (freeing these dedicated PIO lines for other custom usage).
Figure 4-20. Temperature Sensor
PA[31:0]
TWD0
TWCK0
TEMP_ALAR
M
P
A9
P
A10
PA17 PA18 P
A19
R150RR15 0R
R16
R16 0
0
R
R
DGNDDGND
+3V 3
R64
R64 47K
47K
DGND
MN10
MN10 MC P 9800
MC P 9800
5
4
SDA
SCLK
VDD
GND
ALE R T
1
2
3
+3V 3
DGND
C85
C85 100nF
100nF
4.3.17 SD Card
The SAM3U-EK has an MMC/MMCPlus high-speed 8-bit multimedia interface. This interface is used as a 4/8-bit interface, connected to an 8-bit SD/MMC card slot with card detection.
4-16 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Figure 4-21. SD Card Socket
PC3
1
PA25
PA6
PA3
PA
7
PA
4
PC30
PC28
PA5
PA8
PC2
9
DGND
D
GND
+3V 3
DGND
+3V 3
PA[31:0]
PC[31:0]
CK
CDA
DA
2
DA3
DA
0
DA1
WKUP12
DA4
DA5
D
A6
DA
7
RA1 47KX 4
RA1 47KX 4
123
45
678
C80 100
nF
C80 100
nF
J8 7SDMM-B0B2211
J8 7SDMM-B0B2211
DAT2
1
RSV/DAT3
2
DAT4
3
CMD
4
DAT5
5
GND
6
VCC
7
CLK
8
DAT6
9
C
D
10
DAT7
11
DAT0
12
DAT1
13
SD_WP
14
GROUND1
15
GROUND
16
SHE LLE D1
17
SHELLED2
18
RA2 47KX 4
RA2 47KX 4
123
45
678
R57 10K
R57 10K
R5
6
10K
R5
6
10K
+
C79 10uF
+
C79 10uF
R5
8
10K
R5
8
10K
Evaluation Kit Hardware
4.3.18 ZigBee
Table 4-4. Pin Card Detection Scheme
Status Detection
WITHOUT CARD
SD Card inserted with write protection lock
SD Card inserted with write protection unlock, or other card inserted
SAM3U4E has a 10-pin male connector for the
Figure 4-22. ZigBee
ZB_RS
TN
IRQ1_ZBE
E SPIO_NPCS0# MI S O
PC27 PA1 PA16 PA13
J16J16
1 2 3 4 5 7 9 10
RZ600 ZigBee module.
R100
6 8
C100
C100 18pF
18pF
RR100
R
0
0
PA0 PC26 PA14 PA15
C101
C101
2.2nF
2.2nF
DGND
C102
C102
2.2uF
2.2uF
IRQ0_ZBEE SLP_TR MOS I SPCK
SD_WP: OPEN CD: OPEN
SD_WP: OPEN CD: GND
SD_WP: GND CD: GND
JP21JPJP21 JP
+3V 3
SAM3U-EK Evaluation Kit User Guide 4-17
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
PB
6
PB
1
PB
3
P
B7
PB13
PB11
PB14
P
B9
BB
4
PB
0
PB
8
BB
5
PB15
PB10
P
B2
P
B12
PB2
2
PB1
7
PB1
9
PB23
PB2
9
PB2
7
PB30
PB25
PB20
PB16
PB2
4
PB21
PB31
PB26
PB18
PB28
PC29
PC2
5
PC1
2
PC9
PC31
PC14
PC8
PC2
3
PC3
PC0
PC11
PC21
PC3
0
PC19
PC2
PC7
PC16
PC24
PC22
PC5
PC17PC1
PC27
PC6
PC2
0
PC2
8
PC15
PC1
3
PC10 PC26
PC4
PC1
8
PB4 PB5
BB4 BB5
P
A21
PA9
PA27
PA23
PA28
P
A5
PA22
PA17
PA11
PA24
PA29
PA1
PA14
PA8
PA18
PA12 PA13
PA2
PA7
PA6
PA30
PA0
P
A10
P
A16
P
A26
P
A3
PA25
P
A31
PA20PA4
P
A15
PA19
DGN
D
DGND DGND DGND DGND
DGND
+3V3 +3V
3
+3V3
+3V
3
+3V
3
+3V
3
+5V
+5V +5V +5V +5V +5V
PC[31: 0]
PB[31:0]
SOLDER DROP 2 pi ns open. Nor mal
SOLDER DROP 2 pi ns open. Nor mal
J15 048
J15 048
1
2 3 4 5 6 7 8 9 10
11
1
2 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
J14 048
J14 048
1 2 3
4 5 6 7
8 9
10
1
1
1
2
1
3
14
15 16 1
7
18
19 20 2
1
22
2
3
24
25 26 2
7
28
29 30 3
1
32
3
3
34
35 36 3
7
38
39 40
SD4SD4
J13 048
J13 048
1
2
3
4 5 6 7
8 9
1
0
1
1
1
2
13
1
4 15 16 1
7
1
8 1
9
2
0 2
1
22
23
2
4 25
2
6 2
7
2
8 2
9
3
0 3
1
32
3
3
3
4 3
5
3
6 3
7
3
8 3
9
4
0
SD3SD3
4.3.19 PIO Expansion
Figure 4-23. PIO Expansion Ports
The SAM3U4E product features 3 PIO controllers, PIOA, PIOB and PIOC, which multiplex the I/O lines of the peripheral set. Each PIO controller controls up to 32 lines. Expansion ports J13, J14, J15 provide a way for customers to define any PIO channels.
All the expansion port pins are directly connected to the SAM3U4E chip, except PB4 and PB5, which are assigned as AD12BAD3 and AD0 by default on the board. Solder drops have been implemented on the board to avoid signal conflicts from traces routing to expansion ports. If PB4 and PB5 need to be con­nected to the J14 connector, solder drops SD3 and SD4 should be shorted.
Figure 4-24. SD3 Location
Figure 4-25. SD4 Location
4-18 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware

4.4 Configuration

This section describes the PIO usage, the jumpers, the test points and the solder drops of a SAM3U-EK board.
4.4.1 PIO Usage
Table 4-5. PIO Port A Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PA0 TIOB0 NPCS1 WKUP0
PA1 TIOA0 NPCS2 WKUP1 IRQ0_ZBEE ZigBee
PA2 TCLK0 AD12BTRG WKUP2 BUSY_TSC Touch Screen
PA3 MCCK PCK1 MCCK SD/MMC
PA4 MCCDA PWMH0 MCCDA SD/MMC
PA5 MCDA0 PWMH1 MCDA0 SD/MMC
PA6 MCDA1 PWMH2 MCDA1 SD/MMC
PA7 MCDA2 PWML0 MCDA2 SD/MMC
PA8 MCDA3 PWML1 MCDA3 SD/MMC
IRQ0_ZBEE/
VBUS_USB
ZigBee, USB
PA9 TWD0 PWML2 WKUP3 TWD0 Codec, Temp sensor
PA10 TWCK0 PWML3 WKUP4 TWCK0 Codec, Temp sensor
PA11 URXD PWMFI0 URXD UART
PA12 UTXD PWMFI1 URXD UART
PA13 MISO MISO Touch panel, ZigBee
PA14 MOSI MOSI Touch panel, ZigBee
PA15 SPCK PWMH2 SPCK Touch panel, ZigBee
PA16 NPCS0 NCS1 WKUP5 SPIO_NPCS0# ZigBee
PA17 SCK0 ADTRG WKUP6 TEMP_ALARM Temp sensor
PA18 TXD0 PWMFI2 WKUP7 BP_LEFT# User Button
PA19 RXD0 NPCS3 WKUP8 BP_RIGHT# User Button
PA20 TXD1 PWMH3 WKUP9 TXD1 USART
PA21 RXD1 PCK0 WKUP10 RXD1 USART
PA22 TXD2 RTS1 AD12B0 RTS1 USART
PA23 RXD2 CTS1 CTS1 USART
PA24 TWD1 SCK1 WKUP11 IRQ_TSC Touch Screen
PA25 TWCK1 SCK2 WKUP12 MCI_CD SD/MMC
PA26 TD TCLK2 TD Audio codec
PA27 RD PCK0 RD Audio codec
PA28 TK PWMH0 TK Audio codec
SAM3U-EK Evaluation Kit User Guide 4-19
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
Table 4-5. PIO Port A Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PA29 RK PWMH1 RK Audio codec
PA30 TF TIOA2 AD12B1 TF Audio codec
PA31 RF TIOB2 RF Audio codec
Table 4-6. PIO Port B Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PB0 PWMH0 A2 WKUP13 USR_LED1# USER_LED
PB1 PWMH1 A3 WKUP14 USR_LED2# USER_LED
PB2 PWMH2 A4 WKUP15 POWER_LED POWER_LED
PB3 PWMH3 A5 AD12BAD2 3AXS_XOUT Accelerometer
PB4 TCLK1 A6 AD12BAD3 BNC1 Analog input
PB5 TIOA1 A7 AD0 BNC2 Analog input
PB6 TIOB1 D15 AD1 D15 PSRAM, NAND Flash, LCD
PB7 RTS0 A0/NBS0 AD2 NBS0 PSRAM,
PB8 CTS0 A1 AD3 A1/RS PSRAM, LCD
PB9 D0 DTR0 D0 PSRAM, NAND Flash, LCD
PB10 D1 DSR0 D1 PSRAM, NAND Flash, LCD
PB11 D2 DCD0 D2 PSRAM, NAND Flash, LCD
PB12 D3 RI0 D3 PSRAM, NAND Flash, LCD
PB13 D4 PWMH0 D4 PSRAM, NAND Flash, LCD
PB14 D5 PWMH1 D5 PSRAM, NAND Flash, LCD
PB15 D6 PWMH2 D6 PSRAM, NAND Flash, LCD
PB16 D7 PWMH3 D7 PSRAM, NAND Flash, LCD
PB17 NANDOE PWML0 NANDOE NAND Flash
PB18 NANDWE PWML1 NANDWE NAND Flash
PB19 NRD PWML2 NRD PSRAM, LCD
PB20 NCS0 PWML3 NCS0 PSRAM
PB21 A21/NANDALE RTS2 NANDALE NAND Flash
PB22 A22/NANDCLE CTS2 NANDCLE NAND Flash
PB23 NWR0/NEW PCK2 NWE PSRAM, LCD
PB24 NANDRDY PCK1 NANDRDY NAND Flash
PB25 D8 PWML0 D8 PSRAM, NAND Flash, LCD
PB26 D9 PWML1 D9 PSRAM, NAND Flash, LCD
PB27 D10 PWML2 D10 PSRAM, NAND Flash, LCD
PB28 D11 PWML3 D11 PSRAM, NAND Flash, LCD
4-20 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
Table 4-6. PIO Port B Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PB29 D12 D12 PSRAM, NAND Flash, LCD
PB30 D13 D13 PSRAM, NAND Flash, LCD
PB31 D14 D14 PSRAM, NAND Flash, LCD
Table 4-7. PIO Port C Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PC0 A2 A2 PSRAM
PC1 A3 A3 PSRAM
PC2 A4 A4 PSRAM
PC3 A5 NPCS1 A5 PSRAM
PC4 A6 NPCS2 A6 PSRAM
PC5 A7 NPCS3 A7 PSRAM
PC6 A8 PWML0 A8 PSRAM
PC7 A8 PWML1 A8 PSRAM
PC8 A10 PWML2 A10 PSRAM
PC9 A11 PWML3 A11 PSRAM
PC10 A12 CTS3 A12 PSRAM
PC11 A13 RTS3 A13 PSRAM
PC12 NCS1 TXD3 NCS1 NAND Flash
PC13 A2 RSD3 3AXS_SLEEP# Accelerometer
PC14 A3 NPCS2 NPCS2 Touch Screen
PC15 NWR1/NBS1 AD12BAD4 NBS1 NAND Flash
PC16 NCS2 PWML3 AD12BAD5 NCS2 LCD
PC17 NCS3 AD12BAD6 3AXS_YOUT Accelerometer
PC18 NWAIT AD12BAD7 3AXS_ZOUT Accelerometer
PC19 SCK3 NPCS1 BL_EN Back Light
PC20 A14 A14 PSRAM
PC21 A15 A15 PSRAM
PC22 A16 A16 PSRAM
PC23 A17 A17 PSRAM
PC24 A18 A18 PSRAM
PC25 A19 PWMH1 A19 PSRAM
PC26 A20 PWMH2 SLP_TR ZigBee
PC27 A23 PWMH3 ZB_RSTN ZigBee
PC28 MCDA4 AD4 MCDA4 SD/MMC
SAM3U-EK Evaluation Kit User Guide 4-21
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
Table 4-7. PIO Port C Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PC29 PWML0 MCDA5 AD5 MCDA5 SD/MMC
PC30 PWML1 MCDA6 AD6 MCDA6 SD/MMC
PC31 PWML2 MCDA7 AD7 MCDA7 SD/MMC
4.4.2 Jumpers
The SAM3U-EK board jumpers are used for many purposes such as internal Flash Memory reinitializa­tion, power current measurement and other configurations.
Table 4-8. Jumpers Setting
Designation Label Default Setting Feature
Close it to reinitialize the Flash content and some of its NVM bits.
JP1 ERASE Open
JP2 (DNP) TEST Not populated (open) reserved
JP3 VIN Close Measure current feed into VDDIN pin
This jumper must be closed for more than 220 ms at power-up to perform the re­initialization.
JP5 AD12BVREF
JP6 VIO Close Measure current feed into VDDIO pins
JP7 VUTMI Close Measure current feed into VDDUTMI pin
JP8 VANA Close Measure current feed into VDDANA pin
JP9 VCORE Close Measure current feed into VDDCORE pins
JP10 VPLL Close Measure current feed into VDDPLL pin
JP11 VOUT Close Measure current out of VDDOUT pin
JP12 NCS0 Close Disconnection possibility on NCS0
JP13 NCS1 Close Disconnection possibility on NCS1
JP14 NCS2 Close Disconnection possibility on NCS2
JP15 3AXS Close
JP16 3AXS Close
JP17 FORCE POWER ON Close Force +3V3 LDO output valid
JP18 (DNP) - Not populated (open)
JP19 (DNP) - Not populated (open)
Pin1 Pin2 close, Switch to +3V3
Select the reference voltage of the 12-bit ADC to be either 3.3V (close 1-2) or 2.5V (close 2-3)
G-select feature, sensitivity level switch. Close as 440mv/g, open as 117.5mV/g
Open to cause a slight deflect on each axis output, which is device self test
Close to enable 50-Ohm terminal resistor for AD12BAD3 BNC port
Close to enable 50-Ohm terminal resistor for AD0 BNC port
JP20 ADVREF
JP21 - Open Measure current feed into ZigBee module
4-22 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11
Pin1 Pin2 close, Switch to +3V3
Select the reference voltage of the 10-bit ADC to be either 3.3V (close 1-2) or 2.5V (close 2-3)
4.4.3 Test Points
Some test points have been placed on the SAM3U-EK board for the verification of important signals.
Table 4-9. Test Points
Designation Part Description
TP1 Pad Aux ADC input IN3 for touch screen control
TP2 Pad Aux ADC input IN4 for touch screen control
TP3 Ring Hook +3V3
TP4 Ring Hook +5V
TP5 Ring Hook GND
TP6 Ring Hook GND
TP7 Ring Hook GND
TP8 Ring Hook GND
TP9 Pad FWUP
TP10 Pad SHDN
TP11 Pad ADVREF
TP12 Pad AD12BVREF
TP13 Pad LED_A1
TP14 Pad LED_A2
Evaluation Kit Hardware
TP15 Pad LED_A3
TP16 Pad LED_A4
TP17 Pad UTXD
TP18 Pad URXD
TP19 Pad TXD1
TP20 Pad RXD1
4.4.4 Solder Drops
Two solder drops have been designed on the SAM3U-EK for isolation puposes.
Table 4-10. Solder Drops
Designation Default Setting Feature
SD3 Open Isolation of AD12BAD3 input from PIO expansion socket
SD4 Open Isolation of AD0 input from PIO expansion socket
4.4.5 Assigned PIO Lines, Disconnection Possibility
As pointed out in previous interface descriptions, 0-Ohm resistors have been inserted on the PIO lines receiver path of the SAM3U-EK. Some PIO lines are connected to an external driver on the board. The 0-Ohm resistors allow disconnecting each of these for custom usage (through PIO expansion connec-
SAM3U-EK Evaluation Kit User Guide 4-23
6478E–ATARM–30-Mar-11
Evaluation Kit Hardware
tors, for example). This feature gives the user an added level of versatility for prototyping a system of his own. See the table below.
Table 4-11. Disconnecting Possibility
Designation Default Assignment PIO
R14 NANDRDY PB24
R15 NANDOE PB17
R16 NANDWE PB18
R20 BL_EN PC19
R24 NPCS2 PC14
R25 BUY_TSC PA2
R26 IRQ_TSC PA24
R46 RD PA27
R47 RF PA31
R61 AD12BAD2 PB3
R62 AD12BAD6 PC17
R63 AD12BAD7 PC18
R97 TK PA28
R99 RK PA29
R100 IRQ0_ZBEE PA0
R103 URXD PA11
R104 RXD1 PA21
R105 CTS1 PA23
4-24 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11

5.1 Schematics

This section contains the following schematics:
Block Diagram
Design Notes
SAM3U PIO
SAM3U CPU
EBI Memory 1MB PSRAM
EBI Memory II 2GB NAND Flash
TFT LCD and TSC
UART and COM1 RS232
Audio DAC
SD/MMC Interface
Accelerometer, Temp, Buttons
USB and JTAG
Power Supply, ADC and LED
SAM3U Socket
User Interface and ZigBee

Section 5

Schematics

SAM3U-EK Evaluation Kit User Guide 5-1
6478E–ATARM–30-Mar-11
5
4
3
2
1
SAM3U-EK RevB Block Diagram
D D
ATMEL Cortex M3 Processor SAM3U (LQFP144)
Reset,Debug Logic
C C
Audio DAC
Accelerometer
B B
Temperature sense
USB & UART
Power Manage
SD/MMC Card
PSRAM
Nand Flash
2.8 Inch TFT-LCD
A A
User Interface (PIO PortA,B,C)
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Block Diagram
Block Diagram
Block Diagram
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
1
1
1
B
B
B
15
15
15
5
D D
4
3
2
1
1. SAM3U-EK Revision HISTORY
Rev: A SCH: SAM3U-EK RevA Data: 2008/12 Note: Original Released
C C
SCH: SAM3U-EK RevB Data: 2009/04 Note: Final Released
2. Explain of Schematics
(1) Resistance Unit: "K" is "K¦¸"
Rev: B
B B
"R" is "¦¸" (2) "DNP" means the component is not populated by default
A A
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Design notes
Design notes
Design notes
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
2
2
2
B
B
B
15
15
15
5
4
3
2
1
PA[31:0]{7,8,9,10,11,12,14,15}
MN1A
109 111 113 115 117 119 121 123 128 130 132 133 134
100 101 102
103 105 106 107
87 88 91 93 95 99
77
64 45 46 78 48
MN1A SAM3U
SAM3U
PA0/WKUP0 PA1/WKUP1 PA2/WKUP2 PA3/CK PA4/CDA PA5/DA0 PA6/DA1 PA7/DA2 PA8/DA3 PA9/TWD0 PA10/TWCK0 PA11/URXD PA12/UTXD PA13/MISO PA14/MOSI PA15/SPCK PA16/NPCS0 PA17/WKUP7 PA18/WKUP8 PA19/WKUP9 PA20/TXD1 PA21/RXD1 PA22/RTS1 PA23/CTS2 PA24/WKUP11 PA25/WKUP12 PA26/TD PA27/PCK0 PA28/TK PA29/PWMH1 PA30/TF PA31/RF
PB0/PWMH0 PB1/PWMH1
PB2/PWMH2 PB3/AD12BAD2 PB4/AD12BAD3
PB5/AD1
PB6/D15
PB7/A0/NBS0
PB8/A1
PB9/D0 PB10/D1 PB11/D2 PB12/D3 PB13/D4 PB14/D5 PB15/D6 PB16/D7
PB17/NANDOE
PB18/NANDWE
PB19/NRD
PB20/NCS0 PB21/A21/NANDALE PB22/A22/NANDCLE
PB23/NWR0/NWE
PB24/NANDRDY
PB25/D8
PB26/D9 PB27/D10 PB28/D11 PB29/D12 PB30/D13 PB31/D14
53 55 57 79 80 65 66 67 68 31 30 59 61 62 29 97 96 26 25 24 23 21 20 19 15 14 13 12 10 8 6 5
PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31
D D
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17
C C
PC[31:0]{5,6,7,10,11,14,15}
PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
PB[31:0] {5,6,7,11,13,14,15}
PC[31:0] {5,6,7,10,11,14,15}
PC0 PC1 PC2
B B
A A
5
PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15
4
110
PC0/A2
112
PC1/A3
114
PC2/A4
116
PC3/A5
118
PC4/A6
120
PC5/A7
122
PC6/A8
124
PC7/A9
129
PC8/A10
131
PC9/A11
89
PC10/A12
92
PC11/A13
94
PC12/NCS1
98
PC13/RXD3
28
PC14/NPCS2
81
PC15/NWR1/NBS1
3
PC16/NCS2 PC17/AD12BAD6 PC18/AD12BAD7
PC19/NPCS1
PC20/A14 PC21/A15 PC22/A16 PC23/A17 PC24/A18 PC25/A19
PC26/PWMH2
PC27/A23 PC28/DA4 PC29/DA5 PC30/DA6 PC31/DA7
82 83 84 32 108 22 47 49 54 56 58 63 69 70 71 72
PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U PIO
SAM3U PIO
SAM3U PIO
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
3
3
3
B
B
B
15
15
15
5
+3V3
VIO
C106
C106 10nF
10nF
ERASE{14} TEST{14}
D D
C C
B B
VUTMI
VANA
A A
JTAGSEL{14}
XIN32{14} XOUT32{14}
JP7JPJP7 JP
JP8JPJP8 JP
FWUP{11,14} SHDN{13,14}
VBG{14}
NRST{7,11,12,14} NRSTB{11,14}
TDI{12,14} TDO{12,14} TMS{12,14} TCK{12,14}
DHSDP{12,14} DHSDM{12,14}
XIN{14} XOUT{14}
DGND
NOT POPULATED
R9
R9
6.8K 1%
6.8K 1%
C107
C107 100nF
100nF
DGND
C109
C109 100nF
100nF
DGND
5
VBG
C19
C19 10pF
10pF
R1011RR101 1R
C108
C108
4.7uF
4.7uF
R1021RR102 1R
C110
C110
4.7uF
4.7uF
J1J1
2 3
DGND
L3
L3
10uH/100mA
10uH/100mA
L4
L4
10uH/100mA
10uH/100mA
VBG
XIN32 XOUT32
XIN1 XOUT1
JP1 JPJP1 JP
JP2 DNPJP2 DNP
R1 DNPR1 DNP
R2 39RR2 39R R3 39RR3 39R
R6 0RR6 0R R7 0RR7 0R
1
R8 DNPR8 DNP
54
+3V3
+
+
C23
C23 10uF
10uF
DGND
VCORE
VPLL
VIO
4
4
DFSDM DFSDP
DGND
JP9JPJP9 JP
JP10JPJP10 JP
JP6JPJP6 JP
MN1B
MN1B SAM3U
SAM3U
137
ERASE
138
TEST
142
JTAGSEL
135
FWUP
136
SHDN
39
VBG
11
NRST
141
NRSTB
1
TDI
4
TDO/TRACESWO
7
TMS/SWDIO
9
TCK/SWCLK
37
DHSDP
38
DHSDM
41
DFSDM
42
DFSDP
144
XIN32
143
XOUT32
36
XIN
35
XOUT
18
GND1
52
GND2
60
GND3
90
GND4
126
GND5
140
GNDBU
33
GNDPLL
43
GNDUTMI
75
GNDANA
12.000MHz
12.000MHz
3
VDDIN
1 2
C25
C25 20pF
20pF
3
C27
C27 20pF
20pF
74 76
3
2
16 27 44 50 86 125
34
17 51 85 104 127
40
73
139
DGNDDGND
ADVREF
AD12BVREF
VDDOUT
VDDCORE1 VDDCORE2 VDDCORE3 VDDCORE4 VDDCORE5 VDDCORE6
VDDPLL
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5
VDDUTMI
VDDANA
VDDBU
C24
C24 20pF
20pF
Y1
Y1
C26
C26 20pF
20pF
JP11JPJP11
VOUT
JP
+3V3
3
XIN32XIN1
Y2
Y2
32.768KHz
32.768KHz
XOUT32XOUT1
2
DFSDM DFSDP
VIN
+
VOUT
C4
C3
4.7uFC44.7uF
100nFC3100nF
DGND
VPLL
DGND
VUTMI
DGND
VBU
DGND
C5 100nFC5100nF
C11
C11 100nF
100nF
C12
C12 100nF
100nF
C18
C18 100nF
100nF
VANA
C20
C20 100nF
100nF
DGND
C21
C21 1uF
1uF
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U CPU
SAM3U CPU
SAM3U CPU
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
C1 100nFC1100nF
C6 100nFC6100nF
C13
C13 100nF
100nF
JP4JPJP4 JP
+
DGND
C2
C2 10uF
10uF
C7 100nFC7100nF
C14
C14 100nF
100nF
JP3JPJP3 JP
C9
C8
100nFC9100nF
100nFC8100nF
C16
C16
C15
C15
100nF
100nF
100nF
100nF
1
2
INIT EDIT
INIT EDIT
INIT EDIT
1/1
1/1
1/1
+3V3
DES.
DES.
DES.
D6
D6 BAT54C
BAT54C
3
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10 A
A
A
REV
REV
REV
SCALE
SCALE
SCALE
1
DFSDM {14} DFSDP {14} ADVREF {13,14} AD12BVREF{13,14}
+3V3
C105
C105 100nF
100nF
VIO
C17
C17
4.7uF
4.7uF
DGND
CR1225
+ 3
BT1
BT1 KY001
KY001
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
CR1225
1 3
VCORE
+
+
C10
C10 10uF
10uF
DGND
3V
3V
VER.
VER.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
B
B
B
2
-
4
4
DGND
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
DATEMODIF.
DATEMODIF.
4
4
4
15
15
15
5
D D
PB[31:0]{3,6,7,11,13,14,15}
PC[31:0]{3,6,7,10,11,14,15}
C C
JP12JPJP12
NCS0 NRD
B B
NWE
PB20 PB19 PB23
JP
4
+3V3 +3V3
R10
R10 47K
47K
R11
R11 47K
47K
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
NBS0 NBS1
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC20 PC21 PC22 PC23 PC24 PC25
PB7 PC15
PB7 PB19 PB20 PB23
PB8
3
MN2
MN2 PSRAM 512K x16
PSRAM 512K x16
3
A0
4
A1
5
A2
9
A3
10
A4
15
A5
16
A6
22
A7
44
A8
45
A9
46
A10
47
A11
39
A12
40
A13
33
A14
34
A15
28
A16
21
A17
43
A18
1
LB#
8
UB#
11
CE#
2
OE#
41
WE#
6
ZZ#
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC2
NC3
VCC
VCCQ
VSS
VSSQ
2
+3V3
C29
C29 1uF
1uF
D0 D1 D2
D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
12 17 18 23 29 35 36 42 7 13 14 20 26 32 31 37
27 38 48
24 25
30 19
PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PB6
C28
C28 100nF
100nF
1
DGND
A A
B 19-MAY-09ZXL
B 19-MAY-09ZXL
B 19-MAY-09ZXL
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
EBI Memory I 1MB PSRAM
EBI Memory I 1MB PSRAM
EBI Memory I 1MB PSRAM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
20-JAN-10
20-JAN-10
20-JAN-10
PP
PP
PP
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
5
5
5
B
B
B
15
15
15
5
D D
PB[31:0]{3,5,7,11,13,14,15}
C C
PC[31:0]{3,5,7,10,11,14,15}
B B
NCS1
NANDRDY NANDOE
NANDCLE NANDALE NANDWE
PC12
4
+3V3
PB24 PB17
PB22 PB21 PB18
R14 0RR14 0R
JP13JPJP13 JP
R17 47KR17 47K
+3V3 +3V3
R12
R12 47K
47K
+3V3
R18
R18 DNP
DNP
DGND
R13
R13 47K
47K
C30
C30 100nF
100nF
3
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
MN3
MN3 MT29F2G16AADWP
MT29F2G16AADWP
NC1 NC2 NC3 NC4 NC5 NC6 R/B# RE# CE# NC7 NC8 VCC1 VSS1 NC9 NC10 CLE ALE WE# WP# NC11 NC12 NC13 NC14 NC15
VSS4
VCC4 NC17 VCC3 VSS3 NC16 VCC2
VSS2
IO15 IO14 IO13
IO7 IO6 IO5 IO4
IO12
IO11
IO3 IO2 IO1 IO0
IO10
IO9 IO8
2
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
DGND
C31
C31 100nF
100nF
+3V3
PB6 PB31 PB30 PB16 PB15 PB14 PB13 PB29
C32
C32 100nF
100nF
PB28 PB12 PB11 PB10 PB9 PB27 PB26 PB25
C33
C33 100nF
100nF
D15 D14 D13 D7 D6 D5 D4 D12
D11 D3
D2 D1 D0
D10 D9 D8
1
A A
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
EBI Memory II NAND FLASH
EBI Memory II NAND FLASH
EBI Memory II NAND FLASH
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
6
6
6
B
B
B
15
15
15
5
PB[31:0]{3,5,6,11,13,14,15}
D D
NRST{4,11,12,14}
C C
+3V3
+
+
C38
C38 10uF
10uF
B B
PC[31:0]{3,5,6,10,11,14,15}
DGND
C39
C39 100nF
100nF
4
LED_A1 LED_A2 LED_A3 LED_A4
PC14 PC16 PC19
JP14JPJP14
JP
PC16 PB8 PB23 PB19 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PB6
X_RIGHT Y_UP X_LEFT Y_DOWN
R93 0RR93 0R R94 0RR94 0R R95 0RR95 0R R96 0RR96 0R
CS#
DGND
3
J2
J2 FH26-39S-0.3SHW
FH26-39S-0.3SHW
1
GND1
2
CS
3
RS
4
WR
5
RD
6
DB0
7
DB1
8
DB2
9
DB3
10
DB4
11
DB5
12
DB6
13
DB7
14
DB8
15
DB9
16
DB10
17
DB11
18
DB12
19
DB13
20
DB14
21
DB15
22
NC1
23
NC2
24
RESET
25
GND2
26
X+
27
Y+
28
X-
29
Y-
30
GND3
31
VDD1
32
VDD2
33
A1
34
A2
35
A3
36
A4
37
NC3
38
NC4
39
K
40
shelled1
41
shelled2
+3V3 +3V3
X_RIGHT Y_UP X_LEFT Y_DOWN
PC19
+3V3
1
4
5
2
NOT POPULATED
DGND
+3V3
R19
R19 47K
R200RR20 0R
B7
B7 BN03K314S300R
BN03K314S300R
47K
2
The part is placed as close as possible to J2
3
D5
D5 PACDN044Y5R
PACDN044Y5R
TVS, SOT23-5
TVS, SOT23-5
4
C34
C34 1uF
1uF
3
C36
C36
4.7uF
4.7uF
9
10
11
VLED
DGND
LED_A1
LED_A2
LED_A3
LED_A4
MN4
MN4 AAT3194ITP
AAT3194ITP
C1+
C1­EN/SET
IN
GND
PA[31:0] {3,8,9,10,11,12,14,15}
C2+
C2-
OUT
D1 D2 D3 D4
1
12
2
8 7 6 5
LED_A1 LED_A2 LED_A3 LED_A4
C35
C35 1uF
1uF
TP13
TP13 SMD
SMD
TP14
TP14 SMD
SMD
TP15
TP15 SMD
SMD
TP16
TP16 SMD
SMD
1
DGND
C37
C37 1uF
1uF
R21
MN5
MN5 ADS7843E
ADS7843E
R29
R29 100K
100K
2
XP
3
YP
4
XM
5
YM
PENIRQ
7
IN3
8
IN4
4
X_RIGHT Y_UP X_LEFT Y_DOWN
TP2
TP2
TP1
TP1
SMD
SMD
SMD
SMD
A A
5
R28
R28 100K
100K
AGND1
DCLK
DIN
DOUT
CS
BUSY
VREF VCC1 VCC2
GND
16 14 12 15
13 11
9 1 10
6
R21 100K
100K
R24 0RR24 0R
R25 0RR25 0R R26 0RR26 0R
R27 0RR27 0R
C40
C40 100nF
100nF
C41
C41 100nF
100nF
3
C42
C42 100nF
100nF
R22
R22 100K
100K
R911RR91 1R
C43
C43
4.7uF
4.7uF
PA15 PA14 PA13 PC14
PA2 PA24
L1
L1 10uH/100mA
10uH/100mA
R300RR30 0R
+3V3
DGND
SPCK MOSI MISO NPCS2
BUY_TSC IRQ_TSC
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
TFT-LCD & TSC
TFT-LCD & TSC
TFT-LCD & TSC
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
7
7
7
B
B
B
15
15
15
5
D D
PA[31:0]{3,7,9,10,11,12,14,15}
UTXD URXD
C C
B B
TXD1 RXD1 RTS1 CTS1
PA12 PA11
PA20 PA21 PA22 PA23
4
+3V3 +3V3
R31
R31 100K
100K
TP17
TP17 SMD
SMD
+3V3 +3V3
R34
R34 100K
100K
+3V3
C46
C46 100nF
100nF
R32
R32 100K
100K
R103 0RR103 0R
R33 0RR33 0R
+3V3
C51
C51 100nF
100nF
R35
R35 100K
100K
R104 0RR104 0R
R105 0RR105 0R
TP18
TP18
SMD
SMD
C44
C44
100nF
100nF
DGND
C49
C49
100nF
100nF
C47
C47 100nF
100nF
C52
C52 100nF
100nF
MN6
MN6 MAX3232CSE
MAX3232CSE
16
VCC
2
V+
6
V-
15
GND
11
T1IN
12
R1OUT
10
T2IN
9
R2OUT
MN7
MN7 MAX3232CSE
MAX3232CSE
16
VCC
2
V+
6
V-
15
GND
11
T1IN
12
R1OUT
10
T2IN
9
R2OUT
3
1
C1+
C45
C45 100nF
100nF
C48
C48 100nF
100nF
C50
C50 100nF
100nF
C53
C53 100nF
100nF
C1-
C2+
C2-
T1OUT
R1IN
T2OUT
R2IN
C1+
C1-
C2+
C2-
T1OUT
R1IN
T2OUT
R2IN
3
4
5
14 13 7 8
1
3
4
5
14 13 7 8
2
DGND
J3
J3
MALE RIGHT ANGLED
MALE RIGHT ANGLED
1 6 2 7 3 8 4 9 5
10
11
J4
J4
MALE RIGHT ANGLED
MALE RIGHT ANGLED
1 6 2 7 3 8 4 9 5
1
DGND
TP19
TP19 SMD
SMD
A A
5
4
TP20
TP20
SMD
SMD
3
DGND
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
UART & COM1 RS232
UART & COM1 RS232
UART & COM1 RS232
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
10
11
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
8
8
8
B
B
B
15
15
15
5
TWD0 TWCK0
PCK0
TD TF RD RF
+3V3
+
+
C54
C54 10uF
10uF
DGND
+3V3 +3V3 +3V3
PA9 PA10
PA21 BCLK PA26 PA30 PA27 PA31
PA[31:0]{3,7,8,10,11,12,14,15}
5
+
+
C61
C61 10uF
10uF
AGND
R38
R38 100K
100K
R46 0RR46 0R R47 0RR47 0R
R49 10KR49 10K
DGND
C55
C55 100nF
100nF
R39
R39
4.7K
4.7K
C56
C56 100nF
100nF
C62
C62 100nF
100nF
R40
R40
4.7K
4.7K
PA9 PA10 PA21 PA26 PA27 PA28 PA29 PA30 PA31
D D
C C
B B
A A
4
MN8
MN8 XWM8731EDS
XWM8731EDS
1
DBVDD
27
DCVDD
28
DGND
26
XTO
2
CLKOUT
16
VMID
12
LOUT
13
ROUT
22
CSB
23
SDIN
24
SCLK
25
XTI/MCLK
3
BCLK
4
DACDAT
5
DACLRC
6
ADCDAT
7
ADCLRC
21
MODE
R97 0RR97 0R R99 0RR99 0R
4
BCLK
AVDD
HPVDD
AGND
HPGND
LHPOUT
RHPOUT
LLINEIN
RLINEIN
MICBIAS
MICIN
14 8
15 11
9
10
20
19
17
18
+
+
C60 220uF
C60 220uF
+
+
C63 220uF
C63 220uF
C66 1uFC66 1uF
C67 1uFC67 1uF
R48 680RR48 680R
R50 330RR50 330R
+
+
C76
C76 10uF
10uF
DGND
3
C57
C57 100nF
100nF
3
C68
C68 220pF
220pF
C77
C77 100nF
100nF
AVDD
C58
C58 100nF
100nF
AGND
R36
R36 47K
47K
AGND
C69
C69 220pF
220pF
C72 1uFC72 1uF
L2
L2
10uH/100mA
10uH/100mA
R550RR55 0R
+
+
C59
C59 10uF
10uF
R37
R37 47K
47K
R43
R43
5.6K
5.6K
C73
C73 220pF
220pF
R41 5.6KR41 5.6K
R42 5.6KR42 5.6K
R44
R44
5.6K
5.6K
AGND
R52
R52 47K
47K
AGND
AVDD+3V3
+
+
C78
C78 47uF
47uF
AGND
2
B1
B1 BN03K314S600R
BN03K314S600R
B2
B2 BN03K314S600R
BN03K314S600R
BN03K314S600R
BN03K314S600R
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Audio DAC
Audio DAC
Audio DAC
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
B3
B3 BN03K314S600R
BN03K314S600R
B4
B4
B5
B5 BN03K314S600R
BN03K314S600R
1
J5
J5 EARJACK
EARJACK
1 2 3 4
AGNDFGND
R530RR53
1/1
1/1
1/1
0R
5
HEADPHONE LINE-OUT
J6
J6 EARJACK
EARJACK
1 2 3 4 5
LINE-IN
J7
J7 EARJACK
EARJACK
1 2 3 4 5
MONO/STEREO MICRO INPUT
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
C65
C65
C64
C64
470pF
470pF
470pF
470pF
FGND
C70
C70
C71
C71
470pF
470pF
470pF
470pF
FGND
R510RR51 0R
C74
C74 470pF
470pF
C75
C75 DNP
DNP
R540RR54 0R
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SCALE
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
9
9
9
B
B
B
15
15
15
5
D D
PA[31:0]{3,7,8,9,11,12,14,15}
PC[31:0]{3,5,6,7,11,14,15}
DA4
C C
DA5
DA6
DA7
DA2
DA3
PC28
CDA
PC29
CK
PC30
WKUP12
PC31
DA0 DA1
PA7
PA8
PA4
PA3
PA25
PA5 PA6
4
45
R58
R57
R57
10K
10K
R58
10K
10K
678
R56
R56
10K
10K
123
3
RA1
RA1 47KX4
47KX4
45
678
123
RA2
RA2 47KX4
47KX4
+3V3
2
J8
J8 7SDMM-B0-2211-A
7SDMM-B0-2211-A
1
DAT2
2
RSV/DAT3
3
DAT4
4
CMD
5
DAT5
6
GND
7
VCC
8
CLK
9
DAT6
10
CD
11
DAT7
12
DAT0
13
DAT1
14
SD_WP
GROUND1
SHELLED1 SHELLED2
GROUND
1
15
17 18
16
DGND
B B
+3V3
+
+
C79
C79 10uF
10uF
DGND
A A
5
4
C80
C80 100nF
100nF
3
DGND
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
SD/MMC interface
SD/MMC interface
SD/MMC interface
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
10
10
10
B
B
B
15
15
15
5
D D
PB[31:0]{3,5,6,7,13,14,15}
PC[31:0]{3,5,6,7,10,14,15}
3AXS_SLEEP#
ADC0_AD2 ADC0_AD6 ADC0_AD7
4
PC13
PB3 PC17 PC18
DGND
R61 0RR61 0R R62 0RR62 0R R63 0RR63 0R
JP15 JPJP15 JP
JP16 JPJP16 JP
C82
C82
3.3nF
3.3nF
+3V3
R59
R59
10K
10K
C83
C83
3.3nF
3.3nF
3
+3V3
R60
R60
10K
10K
C84
C84
3.3nF
3.3nF
MN9
MN9 MMA7341L
MMA7341L
10 13
7
2 3 4 1
14
g-Select Self Test Sleep
XOUT YOUT ZOUT NC1 NC6
VDD
VSS
NC2 NC3 NC4 NC5
2
6
5
8 9 11 12
+3V3
DGND
C81
C81 100nF
100nF
1
1
C86 10nFC86 10nF
1
C87 10nFC87 10nF
DGND
DGND
BP4BP4
BP5BP5
3
MN10
MN10
MCP9800
MCP9800
5
SDA
4
SCLK
3 42
R66
R66 100R
100R
3 42
R67
R67 100R
100R
PA18
PA19
VDD
GND
ALERT
BP_LEFT#
BP_RIGHT#
1
2
3
+3V3
C85
C85 100nF
100nF
DGND
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
B 19-MAY-09ZXL PP 20-JAN-10
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Accelerometer,Temp,Buttons
Accelerometer,Temp,Buttons
Accelerometer,Temp,Buttons
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
11
11
11
B
B
B
15
15
15
DGND DGND
C C
PA[31:0]{3,7,8,9,10,12,14,15}
R150RR15
3 42
3 42
3 42
0R
R160RR16 0R
DGND
TWD0
TWCK0
TEMP_ALARM
B B
NRST{4,7,12,14}
NRSTB{4,14}
FWUP{4,14}
A A
5
WAKE_UP#
VBU
R65
R65 100K
100K
PA9
PA10
PA17 PA18 PA19
4
BP1BP1
1
BP2BP2
1
BP3BP3
1
+3V3
R64
R64 47K
47K
5
D D
DHSDP{4,14} DHSDM{4,14} PA[31:0]{3,7,8,9,10,11,14,15}
VBUS_USB
C C
PA0
4
R68 47KR68 47K
R69
R69 68K
68K
3
B6
B6 BN03K314S300R
BN03K314S300R
C89
C89 100nF
MN11
C88
C88 10pF
10pF
DGNDDGND
MN11 TPD3E001DRLR
TPD3E001DRLR
1 2
DGND
NOT POPULATED
IO1
VCC IO2 GND3IO3
5
4
100nF
DGND
2
J9
J9 USB TYPE B PORT
USB TYPE B PORT
6
E_GND1
5
E_GND0
3
D+
2
D-
4
GND
1
VBUS
1
+3V3
R71
R71
R72
R72
R73
R73
R74
R70
R70
100K
100K
100K
100K
100K
B B
A A
5
TDI{4,14} TMS{4,14} TCK{4,14}
TDO{4,14}
NRST{4,7,11,14}
4
100K
R75 0RR75 0R
100K
100K
R74 100K
100K
J10
J10 IDC20-2.54mm
IDC20-2.54mm
VTref1Vsupply nTRST3GND1
5
TDI TMS7GND3 TCK9GND4 RTCK11GND5 TDO13GND6 nSRST15GND7 DBGRQ17GND8 DBGACK19GND9
3
GND2
2 4 6 8 10 12 14 16 18 20
DGND
C90
C90 100nF
100nF
+
+
C91
C91 10uF
10uF
DGND
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
USB & JTAG
USB & JTAG
USB & JTAG
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
12
12
12
B
B
B
15
15
15
5
J11
J11
MP179P 2.1mm
MP179P 2.1mm
1 2
D D
C C
B B
A A
3
SHDN{4,14}
PB[31:0]{3,5,6,7,11,14,15}
ADVREF{4,14}
AD12BVREF{4,14}
5
MN13
MN13 ZEN056V130A24LS
ZEN056V130A24LS
1
USR_LED1#
USR_LED2#
POWER_LED#
2
R80
R80 10K
10K
IRLML2502
IRLML2502
DGND
Q3
Q3
PB4 PB5
PB0
PB1
PB2
DGND
DGND
3
+5V
IRLML2502
IRLML2502
1
C104
C104 100nF
100nF
C103
C103 100nF
100nF
Q2
Q2
C92
C92 100nF
100nF
R78
R78 100K
100K
1
C94
C94 15pF
15pF
32
4
DGND
R85
R85 220R
220R
R87
R87 220R
220R
R92
R92 220R
220R
+3V3
+2V5
+3V3
+2V5
4
1
3
2
2
2
1
2
32
Q1
Q1 IRLML6401
IRLML6401
JP20
JP20 JUMP_3
JUMP_3
JP5
JP5 JUMP_3
JUMP_3
MN14
MN14 BNX002-01
BNX002-01
SV
SG
R89 100KR89 100K
1
3
1
3
3
PWR_CN
MN15
MN15
LM4040-2.5
LM4040-2.5
+5V
+
+
DGND
+3V3
DGND
C93
C93 22uF
22uF
R90
R90
4.7K
4.7K
TP4
TP4 +5V
+5V
3
3
CV
4
CG1
5
CG2
6
CG3
R79
R79 100K
100K
JP17JPJP17
DGND
JP
D2 green-led
D2 green-led
0603
0603
D3 green-led
D3 green-led
0603
0603
D4 red-led
D4 red-led
0603
0603 TP6
+3V3 +5V
TP5
TP5 GND
GND
CN1
CN1 BNC
BNC
CN2
CN2 BNC
BNC
+5V
PWR_CN
TP6 GND
GND
5
1 2 3 4
5
1 2 3 4
MN12
MN12 MIC29152WU
MIC29152WU
Micrel's 1.5A LDO, TO263-5
Micrel's 1.5A LDO, TO263-5
2
VIN
1
SD
DGND
DGND
DGND
TP8
TP8
TP7
TP7
GND
GND
GND
GND
DGND
2
PB4
ADC
PB5
1/1
1/1
1/1
C99
C99 10nF
10nF
+3V3
+
+
AD12BAD3
AD0
ADC
DES.
DES.
DES.
C95
C95 100uF
100uF
4
VOUT
GND1
GND2
3
6
JP18JPJP18 JP
R83
R83
49.9R 1%
49.9R 1%
JP19JPJP19 JP
R88
R88
49.9R 1%
49.9R 1%
ADJ
R81
R81 DNP
DNP
R86
R86 DNP
DNP
5
C97
C97 10nF
10nF
C98
C98 10nF
10nF
4
VR1
VR1
5
10K
10K
+3V3
13
R820RR82 0R
R840RR84 0R
R76
R76 330R 1%
330R 1%
R77
R77 200R 1%
200R 1%
2
Potentiometer
DGND
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
Power Supply, ADC & Led
Power Supply, ADC & Led
Power Supply, ADC & Led
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
TP3
TP3 +3V3
+3V3
C96
C96 100nF
100nF
VER.
VER.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
B
B
B
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
DATEMODIF.
DATEMODIF.
13
13
13
15
15
15
5
D D
PA[31:0]{3,7,8,9,10,1 1,12,15}
PB[31:0]{3 ,5,6,7,11,13,15}
PC[31:0]{3,5,6,7 ,10,11,15}
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17
C C
B B
PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31
ERASE{4} TEST{4} JTAGSEL{4 } FWU P{4,11} SHDN{4,13 } VBG{4} NRST{4,7,11,12} NRSTB{4,11} TDI{4,12} TDO{4,12} TMS{4,12} TCK{4,12} DHSDP{4,12} DHSDM{4,12} DFSDM{4} DFSDP{4} XIN32{4} XOUT32{4} XIN{4} XOUT{4} ADVREF{4,13}
AD12BVR EF{4,13}
PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31
ERASE TEST JTAGSEL FWU P SHDN VBG NRST NRSTB TDI TDO TMS TCK DHSDP DHSDM DFSDM DFSDP XIN32 XOUT32 XIN XOUT ADVREF AD12BVR EF
4
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
TP9
TP9 SMD
SMD
TP11
TP11 SMD
SMD
TP10
TP10 SMD
SMD
TP12
TP12 SMD
SMD
VOUT
VCORE
VCORE
VPLL
TDI
VIN
TDO PB31 PB30 TMS PB29 TCK PB28 NRST PB27 PB26 PB25 PB24
VIO
PB23 PB22 PB21 PC21 PB20 PB19 PB18 PB17
PC14 PB14 PB10 PB9 PC19
XOUT XIN
3
DGND
VCORE
VIOVBU
JTAGSEL
ERASE
XIN32
XOUT32
142
143
144
J12
J12
143
144
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
3737383839394040414142424343444445454646474748484949505051515252535354545555565657575858595960606161626263636464656566666767686869697070717172
145
SHDN
NRSTB
TEST
FWUP
PA12
PA11
PA10
PC9
PA9
PC8
PA8
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
SAM3U Socket
SAM3U Socket
7020-144-608 ANTARES
PC5
PA6
PC6
PA7
PC7
120
121
122
123
124
125
121
122
123
124
125
126
145
PC23
VBG
DHSDP
DHSDM
VUTMI
PA29
PA31
PA28
PC22
DFSDP
DFSDM
VCORE
PB0
VCORE VIO
PB11
PC24
PB1
PB12
PC26
PC25
PB2
2
PA0
PC0
PA1
PC1
PA2
PC2
PA3
PC3
PA4
PC4
PA5
109
110
111
112
113
114
115
116
117
118
119
146
109
110
111
112
113
114
115
116
117
118
119
120
146
108
108
107
107
106
106
105
105
104
104
103
103
102
102
101
101
100
100
99
99
98
98
97
97
96
96
95
95
94
94
93
93
92
92
91
91
90
90
89
89
88
88
87
87
86
86
85
85
84
84
83
83
82
82
81
81
80
80
79
79
78
78
77
77
76
76
75
75
74
74
73
73
PC20 PA26 PA25 PA24
PA23 PA21 PA20 PA19 PA18 PC13 PB15 PB16 PA17 PC12 PA16 PC11 PA15
PC10 PA14 PA13
PC18 PC17 PC16 PC15 PB4 PB3 PA30 PA22 AD12BVR EF
ADVREF
VIO
VCORE VIO
VANA
1
72
PB13
PC27
PC28
PC29
PB6
PB7
PA27
PB5
PB8
NOT POPULATED
PC31
PC30
A A
B 19 -MAY-09ZXL 20-J AN-10PP
B 19 -MAY-09ZXL 20-J AN-10PP
B 19 -MAY-09ZXL 20-J AN-10PP
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U soc ket
SAM3U soc ket
SAM3U soc ket
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
SCALE
1/1
1/1
1/1
03-FEB-09
03-FEB-09
03-FEB-09
DES.
DATE
DES.
DATE
DES.
DATE
1
XX-XXX-XXZXL X XX
XX-XXX-XXZXL X XX
XX-XXX-XXZXL X XX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
14
14
14
B
B
B
15
15
15
5
D D
PA[31:0]{3,7,8,9,10,11,12,14}
PB[31:0]{3,5,6,7,11,13,14}
PC[31:0]{3,5,6,7,10,11,14}
4
3
SOLDER DROP 2 pins open.Normal
PB4 PB5
SOLDER DROP 2 pins open.Normal
SD3SD3 SD4SD4
BB4 BB5
2
1
+5V +5V +5V +5V +5V +5V
PC0
PC2
C C
B B
PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC26 PC11 PC12 PC13 PC14 PC15
+3V3 +3V3+3V3 +3V3 +3V3+3V3
DGND DGND DGND DGND DGND
ZB_RSTN IRQ1_ZBEE SPIO_NPCS0# MISO
J13
J13 048
048
1 2 3 4 5 6 7 8 9 10
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
PC27 PA1 PA16 PA13
PC16 PC17PC1 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25
PC27 PC28 PC29 PC30 PC31
J16J16
1 2 3 4 5 6 7 8 9 10
R100 0RR100 0R
C100
C100 18pF
18pF
PB0 PB1 PB2 PB3 BB4 BB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15
PA0 PC26 PA14 PA15
C101
C101
2.2nF
2.2nF
J14
J14 048
048
1 2 3 4 5 6 7 8 9 10
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
IRQ0_ZBEE SLP_TR MOSI SPCK
C102
C102
2.2uF
2.2uF
JP21JPJP21 JP
PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31
+3V3
PA0 PA1 PA2 PA3
PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15
J15
J15 048
048
1 2 3 4 5 6 7 8 9 10
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
DGND
PA16 PA17 PA18 PA19 PA20PA4 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31
A A
5
4
DGND
3
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
B 19-MAY-09ZXL 20-JAN-10PP
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SAM3U-EK RevB
SAM3U-EK RevB
SAM3U-EK RevB
User interface & ZigBee
User interface & ZigBee
User interface & ZigBee
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
DES.
DES.
DES.
03-FEB-09
03-FEB-09
03-FEB-09
DATE
DATE
DATE
1
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
XX-XXX-XXZXL XXX
DATEMODIF.
VER.
DATEMODIF.
VER.
DATEMODIF.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
15
15
15
B
B
B
15
15
15

6.1 Self-Test

A test package software is available to implement a functional test for each section of the board. Refer to the SAM3U-EK page on www.atmel.com.

6.2 Board Recovery

The SAM3U-EK is delivered with an on-board recovery procedure allowing to reprogram the board as it was when shipped. This procedure is accessible from the Flash disk mounted on a PC when the board is connected to this PC through the USB as described in Section 3.

Section 6

Troubleshooting

SAM3U-EK Evaluation Kit User Guide 6-1
6478E–ATARM–30-Mar-11
Troubleshooting
6-2 SAM3U-EK Evaluation Kit User Guide
6478E–ATARM–30-Mar-11

7.1 JTAG/ICE: Missing Pull-up Resistor on TDO Pin

The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M3 is not in debug mode.
Problem Fix/Workaround
To avoid current consumption on VDDIO and/or VDDCORE due to floating input, an external pull-up resistor (100 kΩ) corresponding to this PIO line must be added.

Section 7

Errata

SAM3U-EK Evaluation Kit User Guide 7-1
6478E–ATARM–30-Mar-11

8.1 Revision History

Table 8-1.
Document Comments

Section 8

Revision History

Change Request Ref.
6478E Erratum added as a
6478D
6478C
6478B
6478A First issue.
Table 4-5, “PIO Port A Assignment” , first row edited. 7387
Vendor name and reference removed from PSRAM in
Figure 4-2, ” PSRAM”
Table 4-8, JP15 and JP16 Default Settings changed from ‘Open’ to ‘Close’; JP16 Feature
edited.
Table 4-8, JP17 Default Setting changed from ‘Open’ to ‘Close’; JP17 Feature edited. 6727
Section 7.1 in a newly created Section 7 “Errata” .7638
Section 4.3.2, ” Memory” and
6975
6445
SAM3U-EK Evaluation Kit User Guide 8-1
6478E–ATARM–30-Mar-11
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