The Atmel® SAM3S-EK toolkit contains the following items:
Board:
– a SAM3S-EK board
– a universal input AC/DC power supply with US, Europe and UK plug adapters
Cables:
– one USB cable
– one serial RS232 cable
A Welcome Letter
Figure 2-1. Unpacked SAM3S-EK
Section 2
Kit Contents
Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues concerning the contents of the kit.
SAM3S-EK Development Board User Guide2-1
11031C–ATARM–30-Mar-11
Kit Contents
2.2Electrostatic Warning
The SAM3S-EK board is shipped in a protective anti-static package. The board must not be subjected to
high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the components or any other metallic element of the board.
2-2SAM3S-EK Development Board User Guide
11031C–ATARM–30-Mar-11
3.1Power up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the
screen and enjoy the demo.
3.2DevStart
The on-board NAND Flash contains “SAM3S-EK DevStart”.
It is stored in the “SAM3S-EK DevStart” folder on the USB Flash disk available when the SAM3S-EK is
connected to a host computer and you click on the Flash Disk icon of the on-board demo.
Click the file “welcome.html” in this folder to launch SAM3S-EK DevStart.
Section 3
Power Up
SAM3S-EK DevStart guides you through installation processes of IAR™ EWARM, Keil MDK and GNU
toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and how
to program it into the SAM3S-EK. Optionally, if you have a SAM-ICE™, instructions are also given about
how to debug the code.
We recommend that you backup the “SAM3S-EK DevStart” folder on your computer before launching it.
3.3Recovery Procedure
The DevStart ends by giving step-by-step instructions on how to recover the SAM3S-EK to the state as it
was when shipped by Atmel.
Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want
to recover from this situation.
SAM3S-EK Development Board User Guide3-1
11031C–ATARM–30-Mar-11
Power Up
3.4Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
download sample code and get technical support from Atmel website
This section introduces the Atmel SAM3S Evaluation Kit design. It introduces system-level concepts,
such as power distribution, memory, and interface assignments.
The SAM3S-EK board is based on the integration of an ARM
NAND Flash and a set of popular peripherals. It is designed to provide a high performance processor
evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM3S-EK Block Diagram
Section 4
Evaluation Kit Hardware
®
Cortex®-M3 processor with on-board
SAM3S-EK Development Board User Guide4-1
11031C–ATARM–30-Mar-11
Evaluation Kit Hardware
4.2Features List
Here is the list of the main board components and interfaces:
SAM3S4C chip LQFP100 package with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector for external system clock input
NAND Flash
2.8 inch TFT color LCD display with touch panel and backlight
UART port with level shifter circuit
USART port with level shifter circuit multiplexed with RS485 port with level shifter circuit
Microphone input and mono/stereo headphone jack output
SD/MMC interface
Reset button: NRST
User buttons: Left and Right
QTouch
Full Speed USB device port
JTAG/ICE port
On-board power regulation
Two user LEDs
Power LED
BNC connector for ADC input
BNC connector for DAC output
User potentiometer connected to the ADC input
ZigBEE connector
2x32 bit PIO connection interfaces (PIOA, PIOC) and 1x16 bit PIO connection interface (PIOB)
®
buttons: Up, Down, Left, Right, Valid and Slider
4.3Function Blocks
4.3.1Processor
The SAM3S-EK is equipped with a SAM3S4C device in LQFP100 package.
4.3.2Memory
The SAM3S4 chip embeds:
256 Kbytes of embedded Flash
48 Kbytes of embedded SRAM
16 Kbytes of ROM with embedded BootLoader routines (UART, USB) and In-Application Programming
functions (IAP) routines.
4-2SAM3S-EK Development Board User Guide
11031C–ATARM–30-Mar-11
Evaluation Kit Hardware
MT29F2G08AADWP
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PC10
PC9
PC16
PC17
PC1
8
PC1
4
+
3V3
DGND
+3V3
DGND
+3V3
+3
V3
PC[0..31
]{3,5,7
}
MN3MN3
W
E
18
N.C
6
6
VCC
37
CE
9
RE
8
N.C11
20
W
P
1
9
N.C
5
5
N.C1
1
N.C2
2
N.C3
3
N.C
4
4
N.C12
2
1
N.C
13
2
2
N.C14
23
N.C15
24
R
/B
7
N.C17
26
N
.C18
27
N
.C19
28
I/O0
29
N
.C21
34
N
.C22
35
VSS
3
6
PR
E
3
8
N.C2
3
3
9
VCC
12
VSS
1
3
AL
E
17
N.C
8
11
N.C
7
1
0
N.C9
14
N.C10
15
CLE
16
N.C16
25
N
.C20
33
I/O1
30
I/O3
32
I/O2
31
N.C2
7
47
N.C2
6
46
N.C2
5
4
5
I/O7
44
I/O6
4
3
I/O5
42
I/O4
41
N.C2
4
4
0
N
.C28
48
C2
7
100nF
C2
7
100nF
R15
47K
R15
47K
R2147KR2147K
R1
6
47K
R1
6
47K
C29
1uF
C29
1uF
R190
R
R190
R
R22
DN
P
R22
DN
P
JP9J
P9
C
28
100nF
C
28
100nF
NOT POPULATE
D
D
NP
XOUT32
XIN32
XIN
32
XOUT32
PA7
PA8
XIN
XO
UT
PB8
PB9
DGND
DG
ND
DGND
DGND
DGND
R
3DNP
R
3DNP
R6DN
P
R6DN
P
R
9D
NPR
9D
NP
R1DNPR1DNP
C
3
20pF
C
3
20pF
R40RR40R
C4
20pFC420pF
R2
49.9R 1%R249.9R 1%
Y1Y1
12
3
R8DN
P
R8DN
P
R
7DN
PR
7DN
P
AT91SAM3S
MN1
AT91SAM3S
MN1
PA7_RTS0_PWMH3
49
PA8_CTS0_AD
12BTRG
4
8
PB8_XO
U
T
96
PB9_XIN
97
R1
1
0R
R1
1
0R
Y
212MHz
Y
212MHz
C
120pF
C
120pF
R10DNPR10DNP
Y3
32.768KHz
Y3
32.768KHz
12
3
R50
R
R50
R
R12
0
R
R12
0
R
J1J1
1
23
54
C
220pF
C
220pF
The SAM3S features an External Bus Interface (EBI) that permits interfacing to a broad range of external
memories and virtually to any parallel peripheral. The SAM3S-EK board is equipped with a memory
device connected to the SAM3 EBI:
One NAND Flash MT29F2G08AADWP.
Figure 4-2. NAND Flash
NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can
disconnect it from the on-board memories, thereby letting NCS0 free for other custom purpose.
4.3.3Clock Circuitry
The clock generator of a SAM3S microcontroller is made up of:
A Low Power 32.768 Hz Slow Clock Oscillator with bypass mode.
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB).
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4 (default
value), 8 or 12 MHz.
A 60 to 130 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller.
A 60 to 130 MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and
to the peripherals. The input frequency of PLLA is from 7.5 and 20 MHz.
The SAM3S-EK board is equipped with one 12 MHz crystal, optional Piezoelectric Ceramic Resonator
12 Mhz (Murata ref. CSTCE12M0G15L99-R0), one 32.768 Hz crystal and an external clock input connector (optional, not populated by default).
Figure 4-3. External Clock Source
SAM3S-EK Development Board User Guide4-3
11031C–ATARM–30-Mar-11
Evaluation Kit Hardware
DGND
+
5V
+5V+3V3
C75
100uF
+
C75
100uF
C65
22uF
+
C65
22uF
C64
100nF
C64
100nF
MN10
BN
X002-01
MN10
BN
X002-01
SV
1
SG
2
C
V
3
CG
1
4
CG2
5
CG3
6
C76
100nF
C76
100nF
C66
22u
F
+
C66
22u
F
MN9
ZEN056V130A24LS
MN9
ZEN056V130A24LS
1
2
3
R92
102K
1%
R92
102K
1%
MN12
MIC29152WU
Mic
rel's 1.5A LDO, TO263-5
MN12
MIC29152WU
Mic
rel's 1.5A LDO, TO263-5
VI
N
2
VOUT
4
SD
1
GND1
3
ADJ
5
GND2
6
R89
169K 1%
R89
169K 1%
J9
MP179P 2.1mm
J9
MP179P 2.1mm
1
2
3
The SAM3S chip internally generates the following clocks:
SLCK, the Slow Clock, which is the only permanent clock of the system
MAINCK, the output of the Main Clock Oscillator selection: either a Crystal Oscillator or a 4/8/12 MHz
Fast RC Oscillator
PLLACK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLA)
PLLBCK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLB)
4.3.4Reset Circuitry
On-board NRST button BP1 provides an external reset control of the SAM3S.
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide
a reset signal out to the external components. Conversely, it can be asserted low from the outside to
reset the microcontroller Core and the peripherals. The NRST pin integrates a permanent pull-up resistor
of about 100 kOhm to VDDIO.
On the SAM3S-EK board, the NRST signal is connected to the LCD module and JTAG port.
Note:At power-on, the NRST signal is asserted with a default duration of 2 clock cycles. That duration may not be
sufficient to correctly reset any other system or board devices connected to that signal. First, in your custom
application, you need to check for these devices' datasheets about reset duration requirements. Then, you
need to set an appropriate configuration in the NRST Manager. This is done through the ERSTL field in the
RSTC_MR register. The NRST duration is thereby configurable between 60 µs and 2 s, whether it is subsequently activated by a software reset or a user reset. Refer to the SAM3S datasheet for in depth
information.
4.3.5Power Supply and Management
The SAM3S-EK board is supplied with an external 5V DC block through input J9. It is protected by a
PolyZen diode MN9 and an LC combinatory filter MN10. The PolyZen is used in the event of an incorrect
power supply connection.
The adjustable LDO regulator MN12 is used for the 3.3V rail main supply. It powers all the 3.3V components on the board.
Figure 4-4. Power Block
The SAM3S4/2/1 product series has different types of power supply pins:
VDDIN pin:
Power for the internal voltage regulator, ADC, DAC, and analog comparator power supplies.
The voltage ranges from 1.8V to 3.6V.
4-4SAM3S-EK Development Board User Guide
11031C–ATARM–30-Mar-11
4.3.6UART
+3V3
D
GND
DGND
+
3V3
+3V3
FGND
PA10
PA9
C3
9
100nF
C3
9
100nF
C40
100nF
C40
100nF
T
P5
SMD
T
P5
SMD
J7J7
5
4
3
2
1
9
8
7
6
10
11
R46
100
K
R46
100
K
C38
100nF
C38
100nF
TP6
SM
D
TP6
SM
D
C41
100nF
C41
100nF
R470
R
R470
R
R480
R
R480
R
C42
100nF
C42
100nF
MN6
MAX3232CSE
MN6
MAX3232CSE
T1
IN
1
1
T2
IN
1
0
R1O
UT
1
2
R2O
UT
9
T1OUT
1
4
T2OUT
7
R1IN
1
3
R2I
N
8
V+
2
C1+
1
C1-
3
C2+
4
C2-
5
V-
6
VCC
16
GND
1
5
R
45
100K
R
45
100K
Evaluation Kit Hardware
VDDIO pins:
Power for the Peripherals I/O lines.
The voltage ranges from 1.62V to 3.6V.
VDDOUT pin:
Output of the internal voltage regulator.
VDDCORE pins:
Power for the core, including the processor, embedded memories and peripherals.
The voltage ranges from 1.62V to 1.95V.
VDDPLL pin:
Power for the PLL A, PLL B and 12 MHz oscillator.
The voltage ranges from 1.62V to 1.95V.
Note:VDDPLL should be decoupled and filtered from VDDCORE.
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J7.
4.3.7USART
Figure 4-5. UART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
Note:For design optimization purposes, both transmitters have been implemented on the same
PIO lines, that is PA21, 22, 23, 24 25.
To avoid any electrical conflict, the RS485 transceiver is isolated from the receiving line PA21.
SAM3S-EK Development Board User Guide4-5
Should you need to implement an RS485 channel in place of the RS232, follow the procedure below:
1.make sure your software will permanently set PA23 to a high level - this will permanently disable the
2.solder a shunt resistor in place of R25 (a solder drop will do).
RS232 receiver.
11031C–ATARM–30-Mar-11
Evaluation Kit Hardware
PA2
5
PA2
4
PA2
1
PA2
2
PA23
F
GND
DGND
+3V3
DGND
+
3V3
+
3V3
DGND
R360
R
R360
R
C3
4
100nF
C3
4
100nF
C35
100nF
C35
100nF
C36
100nF
C36
100nF
R3
2
47K
R3
2
47K
MN5
ADM3312EAR
U
MN5
ADM3312EAR
U
C1+
6
C1-
2
0
C2+
2
C2-
4
C3
+
24
C3-
22
VC
C
3
V
+
1
V-
2
1
GND
23
SD
19
EN
5
T1I
N
7
T1OU
T
18
R1IN
15
R1OU
T
10
T2I
N
8
T
2OU
T
17
R2IN
14
R2OU
T
11
T3I
N
9
T
3OU
T
16
R3IN
13
R3O
UT
1
2
R380RR380R
C31
4
.7u
F
C31
4
.7u
F
C32
1
00nF
C32
1
00nF
R350
R
R350
R
C37
100nF
C37
100nF
C3
3
100nF
C3
3
100nF
J5J5
5
4
3
2
1
9
8
7
6
10
11
R340
R
R340
R
R330RR330R
R310RR310R
R3747KR3747K
PA2
2
PA2
4
PA2
5
PA2
1
PA2
3
DGND
+3V3
+3V3+3V3
DGND
FGND
MN4
ADM3485AR
Z
MN4
ADM3485AR
Z
R
O
1
R
E
2
D
E
3
D
I
4
VCC
8
G
ND
5
A
6
B
7
R28
0
R
R28
0
R
R3
0
DNP
R3
0
DNP
J4J4
1
2
3
R29
120
R
R29
120
R
C30
100nF
C30
100nF
R26
0
R
R26
0
R
JP11JP11JP12JP12
JP10JP1
0
R27
0
R
R27
0
R
R23
D
N
P
R23
D
N
P
R25
DN
P
R25
DN
P
R24
D
N
P
R24
D
N
P
4.3.7.1RS232
SAM3S-EK connects the USART1 bus (including TXD, RXD, RTS, CTS handshake signal controls and
EN command) to the DB9 male connector J5 through the RS232 Transceiver MN5.
Figure 4-6. USART
4.3.7.2RS485
As noticed above, the USART1 is shared with the RS485 port, connected to the transceiver MN4, connected to the 3-point connector J4. The design includes selectable jumpers for RS485 bus termination
resistors selection (JP10, JP11, JP12).
Figure 4-7. RS485
4.3.8Display Interface
The SAM3S-EK carries a TFT Transmissive LCD module with touch panel, FTM280C34D. Its integrated
driver IC is ILI9325. The LCD display area is 2.8 inches diagonally measured, with a native resolution of
240 x 320 dots.
The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port
and the push-button BP1. The LCD chip select signal is connected to NCS1; the jumper JP13 can disconnect it so that this PIO line is available for other custom usage.
The SAM3S communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol data
bus has to be implemented by software.
The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by
an AAT3155 charge pump, MN8.The AAT3155 is controlled by the SAM3S through a single PIO line
PC13 interface; the 0 Ohm resistor R68 is mounted in series on this line, which permits to use it for other
custom purposes. In that case, the pull-up resistor R64 maintains the charge pump permanently enabled
by default.
On the anode drive line, a 0 Ohm resistor R59 is implemented in series for an optional current limitation.
Figure 4-9. Backlight Control
SAM3S-EK Development Board User Guide4-7
11031C–ATARM–30-Mar-11
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