Page 1
AT91SAM9260-EK Evaluation Board
..............................................................................................
User Guide
Page 2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Page 3
Table of Contents
Section 1
Overview...............................................................................................1-1
1.1 Scope........................................................................................................1-1
1.2 Deliverables ..............................................................................................1-1
1.3 AT91SAM9260-EK Evaluation Board .......................................................1-1
Section 2
Setting Up the AT91SAM9260-EK Board .............................................2-1
2.1 Electrostatic Warning ................................................................................2-1
2.2 Requirements............................................................................................2-1
2.3 Layout .......................................................................................................2-2
2.4 Powering Up the Board .............................................................................2-3
2.5 Backup Power Supply...............................................................................2-3
2.6 Getting Started..........................................................................................2-3
2.7 AT91SAM9260-EK Block Diagram ...........................................................2-4
Section 3
Board Description ................................................................................. 3-1
3.1 AT91SAM9260 Microcontroller .................................................................3-1
3.2 AT91SAM9260 Block Diagram .................................................................3-4
3.3 Microcontroller...........................................................................................3-5
3.4 Memory .....................................................................................................3-5
3.5 Clock Circuitry...........................................................................................3-5
3.6 Reset Circuitry...........................................................................................3-5
3.7 Shutdown Controller..................................................................................3-5
3.8 Power Supply Circuitry..............................................................................3-5
3.9 Remote Communication............................................................................3-5
3.10 Audio Stereo Interface ..............................................................................3-6
3.11 User Interface ...........................................................................................3-6
3.12 Debug Interface ........................................................................................3-6
3.13 Expansion Slot ..........................................................................................3-6
3.14 PIO Usage ................................................................................................3-7
Section 4
Configuration ........................................................................................4-1
4.1 Jumpers ....................................................................................................4-1
4.2 JTAG/ICE..................................................................................................4-2
4.3 Microcontroller Clock.................................................................................4-2
4.4 Memory .....................................................................................................4-2
4.5 Ethernet ....................................................................................................4-3
4.6 Miscellaneous ...........................................................................................4-3
AT91SAM9260-EK Evaluation Board User Guide i
6234C–ATARM–22-Mar-07
Page 4
Table of Contents
Section 5
Schematics ........................................................................................... 5-1
5.1 Schematics ...............................................................................................5-1
Section 6
Errata.................................................................................................... 6-1
6.1 VDD Backup Jumper Selector (J10).........................................................6-1
6.2 JTAGSEL S2 Footprint Selector ...............................................................6-1
6.3 TWI line pullups are too weak for Fast Mode operation............................6-1
Section 7
Revision History....................................................................................7-1
7.1 Revision History ........................................................................................7-1
ii AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 5
Section 1
Overview
1.1 Scope The AT91SAM9260-EK evaluation kit enables the evaluation of and code development
for applications running on an AT91SAM9260 device.
This guide focuses on the AT91SAM9260-EK board as an evaluation platform.
The board supports the AT91SAM9260 in an LFBGA217 package as well as in a
PQFP208 package.
1.2 Deliverables The AT91SAM9260-EK package contains the following items:
! an AT91SAM9260-EK board
! universal input AC/DC power supply with US and Europe plug adapter
! one A/B-type USB cable
! one serial RS232 cable
! one RJ45 crossed Ethernet cable
! one CD-ROM that allows the user to begin evaluating the AT91 ARM
microcontroller quickly.
1.3 AT91SAM9260EK Evaluation
Board
AT91SAM9260-EK Evaluation Board User Guide 1-1
The board is equipped with an AT91SAM9260 (217-ball LFBGA package) together with
the following:
! 64 Mbytes of SDRAM memory
! 256 Mbytes of NANDFlash memory
! one Atmel serial DataFlash
! one Atmel TWI serial EEPROM
! one USB device port interface
! two USB Host port interfaces
! one DBGU serial communication port
! one complete MODEM serial communication port
®
®
Thumb® 32-bit
6234C–ATARM–22-Mar-07
Page 6
Overview
! one additional serial communication port with RTS/CTS handshake control
! JTAG/ICE debug interface
! one PHY Ethernet 100-base TX with three status LEDs
! one Atmel AT73C213 Audio DAC
! one Power LED and one general-purpose LED
! two user input push buttons
! one Wakeup input push button
! one reset push button
! one DataFlash, SD/MMC card slot
! four expansion connectors (PIOA, PIOB, PIOC, IMAGE SENSOR)
! one BGA-like EBI expansion footprint connector
! one Lithium Coin Cell Battery Retainer for 12 mm cell size
1-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 7
Section 2
Setting Up the AT91SAM9260-EK
Board
2.1 Electrostatic Warning
2.2 Requirements In order to set up the AT91SAM9260-EK evaluation board, the following items are
The AT91SAM9260-EK evaluation board is shipped in protective anti-static packaging.
The board must not be subjected to high electrostatic potentials. A grounding strap or
similar protective device should be worn when handling the board. Avoid touching the
component pins or any other metallic element.
needed:
! the AT91SAM9260-EK evaluation board itself.
! AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm
AT91SAM9260-EK Evaluation Board User Guide 2-1
6234C–ATARM–22-Mar-07
Page 8
Setting Up the AT91SAM9260-EK Board
2.3 Layout
Figure 2-1. AT91SAM9260-EK Layout - Top View
2-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 9
Figure 2-2. AT91SAM9260-EK Layout - Bottom View
Setting Up the AT91SAM9260-EK Board
2.4 Powering Up the Board
2.5 Backup Power Supply
The AT91SAM9260-EK requires 5V DC (±5%). DC power is supplied to the board via
the 2.1 mm by 5.5 mm socket J1. Coaxial plug center positive standard.
The user has the possibility to plug a battery (3V Lithium Battery CR1225 or equivalent)
in order to permanently power the backup part of the device. In this case, J10 configuration must be set in position 1, 2.
Refer to Section 4.1.
2.6 Getting Started The AT91SAM9260-EK evaluation board is delivered with a CD-ROM containing all nec-
essary information and step-by-step procedures for working with the most common
development toolchains. Please refer to this CD-ROM, or to the AT91 web site,
http://www.atmel.com/products/AT91/, for the most up-to-date information on getting
started with the AT91SAM9260-EK.
AT91SAM9260-EK Evaluation Board User Guide 2-3
6234C–ATARM–22-Mar-07
Page 10
Setting Up the AT91SAM9260-EK Board
2.7 AT91SAM9260EK Block
Diagram
Figure 2-3. AT91SAM9260-EK Block Diagram
SDRAMNANFLASH
CAS
SDWE
SDCS_NCS1
SDCKE
CFIOR_NBS1_NWR1
SDCK
SDA10
D[0..31]
MEMORY
A[0..14]
RAS
CFIOW_NBS3_NWR3
NANDOE
ALE
CLE
BA0
BA1
NANDWE
RDYBSY
NANDCS
D[0..15]
DAT0
CARD
DAT1
DAT2
DATAFLASH
MCI
READER
CLK
DAT3
CMD
SCK
CS
DATAFLASH
SERIAL
NRST
SCL
EEPROM
SERIAL
SDA
03 - MEMORY
A[0..22]
D[0..31]
CAS
SDWE
SDCS_NCS1
SDA10
RAS
EXPANSION & User's Interfaces
SDCK
SDCKE
NANDOE
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
CFWE_NWE_NWR0
CFOE_NRD
NANDWE
NCS0
NRST
PA[0..31]
PB[0..31]
PC[0..15]
AVDD
VREFP
AGND
06 - EXPANSION CONNECTORS
AT91SAM9260
D[0..31]
A[0..22]
D[0..31]
A[0..14]
A[0..22]
RAS
SHDN
RAS
CAS
SDA10
CAS
SDA10
SDWE
SDCS_NCS1
SDWE
SDCS_NCS1
SDCK
SDCK
SDCKE
SDCKE
NBS1
NBS3
A16
A17
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
D[0..15]
NANDOE
NANDWE
A22
A21
PC14
PIO
NANDOE
NANDWE
PC13
PIO
PA0
PA5
PA4
PA3
PA8
MCCK
MCDB2
MCDB1
SPI0_MISO MCDB0
SPI0_NPCS0 MCDB3
PA1
SPI0_MOSI MCCDB
NRST
PC11
PA2
SPI0_SPCK
SPI0_NPCS1
PA23
TWD
TWCK
DDM
DDP
HDMA
HDPA
HDMB
HDPB
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
NBS1
NBS3
NANDOE
CFOE_NRD
CFWE_NWE_NWR0
NANDWE
PB[0..31]
PA[0..31]
PC[0..15]
NRST
NCS0
NRST
PA[0..31]
PB[0..31]
PC[0..15]
AVDD
VREFP
AGND
02 - AT91SAM9260
PA[0..31]
PIO
PA9
POWER SUPPLY
SHDN
POWERLED
PC[0..15]
5VDC
PCK0
PC1
TD0
PB18
MCLK
TF0
PB17
SDIN
LRFS
TK0
PB16
BCLK
SPI1_NPCS0
SPI1_SPCK
SPI1_MOSI
SPI1_MISO
PB0
PB1
PB2
PB3
CS
DIN
CLK
DOUT
AT73C213
DAC
PB[0..31]
NRST
NRST
PB[0..31]
SERIAL INTERFACES
01 - POWER SUPPLY
DBGU_RXD
DBGU_TXD
PB15
PB14
DTXD
DRXD
DBGU
PC[0..15]
PIO
PB29
CTS1
RTS1
COM1
PC5 PA24
USBCNX
DDP
DDM
DEVICE
PB6
CTS0
PB24
DTR0
PB22
PB23
DSR0
PB25
DCD0
PB7
PB28
RI0
TXD1
RXD1
PB4
PB5
PB26
PB27
RTS0
TXD0
RXD0
COM0
RS232
HDPA
HDMA
HOST A
USB
HDPB
HDMB
HOST B
PA[0..31]
05 - COMMUNICATION
ETXCK/REFCLK
ETX3
PA19
PA11
TX_CLK
RMII_MII ETHERNET
TXD3
ETX2
PA10
TXD2
ETX1
PA13
TXD1
ETX0
PA12
ETXEN
PA16
TXD0
RX_ER
ECOL
PA29
COL
ECRS
PA28
CRS
EMDC
PA20
EMDIO
PA21
MDC
PIO
PA7
MDIO
NRST
NRST
MDINTR
ERX1
ERX0
ERXDV
PA14
RXD1
RXD0
ERXCK
PA17
PA27
RX_CLK
RX_DV
ETXER
PA22
TX_ER
ERXER
PA18
ERX2
ERX3
PA25
PA26
PA15
RXD2
RXD3
TX_EN
10/100 Mbps FAST ETHERNET
03 - RMII_MII ETHERNET
2-4 AT91SAM9260-EK Evaluation Board User Guide
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Page 11
Section 3
Board Description
3.1 AT91SAM9260 Microcontroller
• Incorporates the ARM926EJ-S™ ARM® Thumb® Processor
– DSP Instruction Extensions, ARM Jazelle
– 8-KByte Data Cache, 8-KByte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICE
• Additional Embedded Memories
– One 32-KByte Internal ROM, Single-cycle Access At Maximum Matrix Speed
– Two 4-KByte Internal SRAM, Single-cycle Access At Maximum Matrix Speed
• External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NANDFlash and CompactFlash
• USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
• USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-lead PQFP
Package and Double Port in 217-ball LFBGA Package
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
• Ethernet MAC 10/100 Base T
– Media Independant Interface or Reduced Media Independant Interface
– 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
• Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
• Bus Matrix
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
• Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
• Reset Controller (RSTC)
– Based on a Power-on Reset Cell, Reset Source Identification and Reset Output
™
, Debug Communication Channel Support
®
Technology for Java® Acceleration
®
AT91SAM9260-EK Evaluation Board User Guide 3-1
6234C–ATARM–22-Mar-07
Page 12
Board Description
Control
• Clock Generator (CKGR)
– Selectable 32768Hz Low-power Oscillator or Internal Low Power RC Oscillator on
Battery Backup Power Supply, Providing a Permanent Slow Clock
– 3 to 20 MHz On-chip Oscillator, One up to 240 MHz PLL and One up to 130 MHz
PLL
• Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization
Capabilities
– Two Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
• Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable
ICE Access Prevention
• Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
• Watchdog Timer (WDT)
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at
Slow Clock
• Real-time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
• One 4-channel 10-bit Analog-to-Digital Converter
• Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– High-current Drive I/O Lines, Up to 16 mA Each
• Peripheral DMA Controller Channels (PDC)
• One Two-slot MultiMedia Card Interface (MCI)
– SDCard/SDIO and MultiMediaCard
™
Compliant
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
• One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA
®
Infrared Modulation/Demodulation,
Manchester Encoding/Decoding
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Signal Control on USART0
• Two 2-wire UARTs
• Two Master/Slave Serial Peripheral Interfaces (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Synchronous Communications
• Two Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
3-2 AT91SAM9260-EK Evaluation Board User Guide
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Page 13
Board Description
– High-Drive Capability on Ouputs TIOA0, TIOA1, TIOA2
• One Two-wire Interface (TWI)
– Master, Multi-master and Slave Mode Operation
– General Call Supported in Slave Mode
– Connection to PDC Channel To Optimize Data Transfers in Master Mode Only
• IEEE
®
1149.1 JTAG Boundary Scan on All Digital Pins
• Required Power Supplies:
– 1.65V to 1.95V for VDDBU, VDDCORE, VDDOSC and VDDPLL
– 3.0V to 3.6V for VDDIOP0, VDDIOP1 (Peripheral I/Os) and VDDANA (Analog to
Digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
• Available in a 208-lead PQFP and 217-ball LFBGA Package
AT91SAM9260-EK Evaluation Board User Guide 3-3
6234C–ATARM–22-Mar-07
Page 14
6234C–ATARM–22-Mar-07
3-4 AT91SAM9260-EK Evaluation Board User Guide
3.2 AT91SAM9260
Board Description
Block Diagram
SLAVEMASTER
TDI
NTRST
TDO
TMS
TCK
RTCK
JTAGSEL
BMS
ERX0-ERX3
ETXCK-ERXCK
ETXEN-ETXER
ECRS-ECOL
ERXER-ERXDV
F100
ETX0-ETX3
MDC
MDIO
ISI_PCK
ISI_MCK
ISI_DO-ISI_D7
ISI_HSYNC
ISI_VSYNC
HDPA
HDMA
HDPB
HDMB
TST
FIQ
IRQ0-IRQ2
DRXD
DTXD
PCK0-PCK1
PLLRCA
XIN
XOUT
OSCSEL
XIN32
XOUT32
SHDN
WKUP
VDDBU
VDDCORE
NRST
PLLA
PLLB
Filter
OSC
RC
OSC
POR
POR
System
Controller
AIC
DBGU
PMC
PITWDT
4GPREG
SHDC
RSTC
PDC
MCI
PDC
RTT
PDC
TWI
PIOA
PIOB
PIOC
USART0
USART1
USART2
USART3
USART4
USART5
PDC
APB
JTAG Selection and Boundary Scan
In-Circuit Emulator
ARM926EJ-S Processor
ICache
8 Kbytes
ROM
32 Kbytes
MMU
Bus Interface
ID
Fast SRAM
4 Kbytes
PDC
SPI0
SPI1
TC0
TC1
TC2
DCache
8 Kbytes
Fast SRAM
4 Kbytes
TC3
TC4
TC5
10/100 Ethernet
MAC
FIFO
DMA
6-layer Matrix
6 x 100M x 32-bit words
Peripheral
Bridge
PDC
SSC
PDC
4-channel
10-bit ADC
FIFO
24-channel
Peripheral
DMA
Image
Sensor
Interface
DMA
DPRAM
USB
Device
Transceiver
Transc.
USB
OHCI
DMA
EBI
CompactFlash
NAND Flash
SDRAM
Controller
Static
Memory
Controller
ECC
Controller
Transc.
D0-D15
A0/NBS0
A1/NBS2/NWR2
A2-A15, A18-A20
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NRD
NWR0/NWE
NWR1/NBS1
NWR3/NBS3
SDCK, SDCKE
RAS, CAS
SDWE, SDA10
NANDOE, NANDWE
A21/NANDALE
A22/NANDCLE
D16-D31
NWAIT
A23-A24
NCS4/CFCS0
NCS5/CFCS1
A25/CFRNW
CFCE1-CFCE2
NCS2, NCS6, NCS7
NCS3/NANDCS
Figure 3-1. AT91SAM9260 Block Diagram
MCCDB
MCDA0-MCDA3
MCDB0-MCDB3
MCCDA
MCCK
TWD
TWCK
RTS0-RTS3
CTS0-CTS3
TXD0-TXD5
SCK0-SCK2
RXD0-RXD5
DSR0
DCD0
RI0
DTR0
NPCS2
NPCS1
NPCS0
NPCS3
SPI0_, SPI1_
MOSI
MISO
SPCK
TCLK0-TCLK2
TIOA0-TIOA2
TIOB0-TIOB2
TCLK3-TCLK5
TIOA3-TIOA5
TIOB3-TIOB5
TF
TK
TD
RF
RK
RD
ADTRIG
AD0-AD3
ADVREF
VDDANA
GNDANA
DDM
DDP
Page 15
3.3 Microcontroller ! One LFBGA 217-ball fitted on board
! One LQFP 208-lead footprint
To try the microcontroller in the LQFP package, the user has to unsolder MN4 and solder the PQFP208 microcontroller on the MN6 footprint.
3.4 Memory ! 32 Kbytes of Internal ROM
! Two 4-KByte Internal SRAM
! Atmel serial DataFlash
! 64 Mbytes of SDRAM memory (32-bit bus width)
! 256 Mbytes of NANDFlash memory (8-bit bus width)
! TWI serial EEPROM
3.5 Clock Circuitry ! 18.432 MHz standard crystal for the embedded oscillator
! Selectable 32768Hz Low-power external standard crystal Oscillator or Internal Low
Power RC Oscillator
Board Description
3.6 Reset Circuitry ! Internal reset controller with bi-directional reset pin
! External reset pushbutton
3.7 Shutdown Controller
3.8 Power Supply Circuitry
3.9 Remote Communication
! Programmable shutdown and Wake-Up
! Wake-up push button
! On-board 1.8V High Efficiency step-down charge pump regulator with shutdown
control
! On-board 3.3V linear regulator with shutdown control
! One serial interface (DBGU COM Port) via RS-232 DB9 male socket
! One complete modem serial interface (COM Port 0) via RS-232 DB9 male socket
! One additional serial interface (COM Port 1) with RTS/CTS handshake control via
RS-232 DB9 male socket
! USB V2.0 full-speed compliant, 12 Mbits per second (UDP)
(1)
! Tw o
USB Host ports V2.0 full-speed compliant, 12 Mbits per second (UHP)
! One Ethernet 100-base TX with three status LEDs
AT91SAM9260-EK Evaluation Board User Guide 3-5
6234C–ATARM–22-Mar-07
Page 16
Board Description
3.10 Audio Stereo Interface
3.11 User Interface ! Two user input pushbuttons
! One Atmel stereo audio DAC (AT73C213)
! One 32 Ohm/20 mW Stereo Headset output (J4) with master volume and mute
controls
(2)
! One user green LED
! One yellow power LED (can be also software controlled)
3.12 Debug Interface ! 20-pin JTAG/ICE interface connector
! DBGU COM port
3.13 Expansion Slot ! One DataFlash, SD/MMC card slot
! All I/Os of the AT91SAM9260 are routed to peripheral extension connectors
! All I/Os of the AT91SAM9260 Image Sensor Interface are routed to peripheral
extension connectors
! All EBI Signals of the AT91SAM9260 are routed to extension footprint connectors
(J25)
This allows the developer to check the integrity of the components and to extend the
features of the board by adding external hardware components or boards.
Notes: 1. Only one available with the 208-lead PQFP package.
2. Not available with the 208-lead PQFP package.
3-6 AT91SAM9260-EK Evaluation Board User Guide
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Page 17
Board Description
3.14 PIO Usage
Table 3-1. PIO Controller A
I/O Line Peripheral A Peripheral B Comments Function
PA0 SPI0_MISO MCDB0 SPI DATAFLASH, SPI/MCI SD/MMC/DATAFLASH Slot
PA1 SPI0_MOSI MCCDB (PA0..PA5)
PA 2 S PI0 _ S PC K
PA3 SPI0_NPCS0 MCDB3
PA 4 R TS 2 M CDB 2
PA 5 C TS 2 M CDB 1
PA6 MCDA0 User LED
PA7 MCCDA ETHERNET DM9161A MII/RMII (IRQ)
PA8 MCCK MCI SD/MMC/DATAFLASH Slot
PA9 MCDA 1 Po w er LED
PA10 MCDA2 ETX2 ETHERNET DM9161A MII Interface (PA10..PA11)
PA 11 M CDA 3 E TX3
PA12 ETX0 ETHERNET DM9161A RMII Interface (PA12..PA19)
PA13 ETX1
PA14 ERX0
PA15 ERX1
PA16 ETXEN
PA17 ERXDV
PA 18 E R XE R
PA19 ETXCK
PA20 EMDC ETHERNET DM9161A MII/RMII Interface (PA20..PA21)
PA 21 EMD I O
PA22 ADTRG ETXER ETHERNET DM9161A MII Interface
PA23 TWD ETX2 SERIAL EEPROM (SDA)
PA24 TWCK ETX3 SERIAL EEPROM (SCL)
PA25 TCLK0 ERX2 ETHERNET DM9161A MII Interface (PA25..PA29)
PA26 TIOA0 ERX3 High-Drive
PA27 TIOA1 ERXCK High-Drive
PA28 TIOA2 ECRS High-Drive
PA29 SCK1 ECOL
PA30 SCK2 RXD4 (BP3) User's interface Push Button
PA31 SCK0 TXD4 (BP4) User's interface Push Button
AT91SAM9260-EK Evaluation Board User Guide 3-7
6234C–ATARM–22-Mar-07
Page 18
Board Description
Table 3-2. PIO B Controller
I/O Line Peripheral A Peripheral B Comments Function
PB0 SPI1_MISO TIOA3 Audio DAC AT73C213 (MISO)
PB1 SPI1_MOSI TIOB3 Audio DAC AT73C213 (MOSI)
PB2 SPI1_SPCK TIOA4 Audio DAC AT73C213 (SPCK)
PB3 SPI1_NPCS0 TIOA5 Audio DAC AT73C213 (Chip Select)
PB4 TXD0 COM PORT 0 (TXD)
PB5 RXD0 COM PORT 0 (RXD)
PB6 TXD1 TCLK1 COM PORT 1 (TXD)
PB7 RXD1 TCLK2 COM PORT 1 (RXD)
PB8 TXD2
PB9 RXD2
PB10 TXD3 ISI_D8 (J28) IMAGE SENSOR CONNECTOR (PB10..PB13)
PB11 RXD3 ISI_D9
PB12 TXD5 ISI_D10
PB13 RXD5 ISI_D11
PB14 DRXD SERIAL DEBUG PORT(RXD)
PB15 DTXD SERIAL DEBUG PORT(TXD)
PB16 TK0 TCLK3 Audio DAC AT73C213 (BCLK)
PB17 TF0 TCLk4 Audio DAC AT73C213 (LRFS)
PB18 TD0 TIOB4 Audio DAC AT73C213 (SDIN)
PB19 RD0 TIOB5 (J28) IMAGE SENSOR CONNECTOR (CTRL2)
PB20 RK0 ISI_D0 (J28) IMAGE SENSOR CONNECTOR (PB20..PB31)
PB21 RF0 ISI_D1
PB22 DSR0 ISI_D2 Warning: Shared with COM PORT 0 (PB22..PB27)
PB23 DCD0 ISI_D3
PB24 DTR0 ISI_D4
PB25 RI0 ISI_D5
PB26 RTS0 ISI_D6
PB27 CTS0 ISI_D7
PB28 RTS1 ISI_PCK Warning: Shared with COM PORT 1 (PB28..PB29)
PB29 CTS1 ISI_VSYNC
PB30 PCK0 ISI_HSYNC
PB31 PCK1 ISI_MCK
3-8 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 19
Board Description
Table 3-3. PIO C Controller
I/O Line Peripheral A Peripheral B Comments Function
PC0 AD0 SCK3
PC1 AD1 PCK0 Audio DAC AT73C213 (MCLK)
PC2 AD2 PCK1
PC3 AD3 SPI1_NPCS3
PC4 A23 SPI1_NPCS2 (J28) IMAGE SENSOR CONNECTOR (CTRL1)
PC5 A24 SPI1_NPCS1 USB_CNX (VBUS DETECT)
PC6 TIOB2 CFCE1
PC7 TIOB1 CFCE2
PC8 NCS4/CFCS0 RTS3
PC9 NCS5/CFCS1 TIOB0
PC10 A25/CFRNW CTS3
PC11 NCS2 SPI0_NPCS1 SPI DATAFLASH memory (Chip Select)
PC12 IRQ0 NCS7
PC13 FIQ NCS6 NandFlash (RDYBSY)
PC14 NCS3/NANDCS IRQ2 NandFlash (NANDCS)
PC15 NWAIT IRQ1
PC16 D16 SPI0_NPCS2 EBI Data Bus (PC16..PC31)
PC17 D17 SPI0_NPCS3
PC18 D18 SPI1_NPCS1
PC19 D19 SPI1_NPCS2
PC20 D20 SPI1_NPCS3
PC21 D21 EF100
PC22 D22 TCLK5
PC23 D23
PC24 D24
PC25 D25
PC26 D26
PC27 D27
PC28 D28
PC29 D29
PC30 D30
PC31 D31
AT91SAM9260-EK Evaluation Board User Guide 3-9
6234C–ATARM–22-Mar-07
Page 20
Board Description
3-10 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 21
4.1 Jumpers
Table 4-1. Jumpers Configuration
Default
Designation
JP2 Closed 3.3V Jumper
JP3 Closed Forces power on.
JP6 Closed VDDPLL Jumper
JP7 Opened Enables boot on the internal ROM
JP9 2 - 3 Slow Clock OSCSEL
JP10 2 - 3 VDDBU Jumper select
JP12 Closed VDDCORE Jumper
JP15 Closed Enables Ethernet Auto MDIX control
Setting Feature
Closed Enables boot on the NCS0
Section 4
Configuration
(1)
To use the software shutdown control, J3 must be
opened. 3V battery backup must be present and J10
jumper set in position 1-2
(1)
1-2: Internal RC Oscillator
2-3: External Crystal Oscillator
(1)
1-2: Lithium 3V Battery
2-3: 1.8V from VDDCORE
(1)
Note: 1. These jumpers are provided for power consumption measurement use. By default,
they are closed. To use this feature, the user has to open the strap and insert an
anmeter.
AT91SAM9260-EK Evaluation Board User Guide 4-1
6234C–ATARM–22-Mar-07
Page 22
Configuration
4.2 JTAG/ICE
Table 4-2. JTAG/ICE Configuration
Default
Designation
S1 Opened Disables the ICE NTRST input
S2 Opened Selects ICE mode or JTAG mode (See Errata)
Setting Feature
4.3 Microcontroller Clock
4.4 Memory
S3 Opened
R13 Soldered Enables the ICE RTCK return. S3 must be opened
R14 Soldered Enables the ICE NRST input
Disables TCK <-> RTCK local loop. If S3 is closed, R13
must be unsoldered.
Table 4-3. Microcontroller Clock Configuration
Default
Designation
R18/R20 Soldered
S4 Opened
J9 Slow Clock Setting. See
Setting Feature
Enables the use of 18.432MHz crystal. If external clock
used, R18/R20 must be unsoldered and S4 closed.
Table 4-1.
Table 4-4. Memory Configuration
Default
Designation
Setting Feature
SDRAM
R31
R32
NANDFlash (MN6x)
R36
R34
S6
SERIAL DATAFLASH (MN9)
R40
S5
TWI SERIAL EEPROM (MN10)
R46
R47
4-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Soldered
Soldered
Soldered
Soldered
Opened
Soldered
Opened
Soldered
Soldered
Enables MN7 Chip select access
Enables MN8 Chip select access
Enables the use of NANDFlash (MN6x)
Enables the use of Ready Busy signalDisables write
protect
Enable the use of the Serial DataFlash (MN9)
Disables the write protect.
Enables SCL access
Enables SDA access
Page 23
4.5 Ethernet RMII is the factory default mode.
To evaluate the MII mode, the user has to unsolder R49, R50, R127 and close S7 and
S8.
When the RMII mode is used, the user can use the specific MII signals as PIO, but the
following resistors must be unsoldered (R119 to R126).
4.6 Miscellaneous Refer to the TOP level schematic for the PIO usage.
Table 4-5.
Default
Designation
R82 Soldered USB DEVICE: Enables the use of the USBCNX signal
R72
R73
Setting Feature
Soldered
Soldered
DBGU COM Port: Enables the use of DTXD output
signalEnables the use of DRXD input
RS232 COM Port 0: Enable the use of outputs signal
Configuration
R94
R95
R96
R98
R101
R103
R104
R105
R106
R83
R85
R86
R88
TP1 N.A GND Test point
TP2 N.A GND Test point.
TP3 N.A GND Test point.
TP4 N.A GND Test point.
TP5 N.A Reserved: do not use
Soldered
Soldered
Soldered
Soldered
RTS0
TXD0
DTR0
RS232 COM Port 0: Enable the use of inputs signal
DCD0
DSR0
RXD0
CTS0
RI0
Enables all MAX3241E outputs buffer
RS232 COM Port 1: Enable the use of outputs signal
TXD1
RTS1
RS232 COM Port 1: Enable the use of inputs signal
RXD1
CTS1
TP6 N.A Reserved: do not use
AT91SAM9260-EK Evaluation Board User Guide 4-3
6234C–ATARM–22-Mar-07
Page 24
Configuration
4-4 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 25
5.1 Schematics This section contains the following schematics:
! Board Layout - Top View
! Power supply and audio
! 217-ball BGA AT91SAM9260 Microcontroller
! 208-pin LQFP AT91SAM9260 Microcontroller
! Memory
! Ethernet
! Serial Interface
! Expansion and User Interface
Section 5
Schematics
AT91SAM9260-EK Evaluation Board User Guide 5-1
6234C–ATARM–22-Mar-07
Page 26
8
7
6
5
4
3
2
1
POWER SUPPLY
POWERLED
D D
SHDN
PA9
5VDC
DIN
CLK
CS
RI0
PC1
PB18
PB17
PB16
PB0
PB1
PB2
PB3
NRST
PB15
PB14
PB4
PB5
PB26
PB27
PB24
PB22
PB23
PB25
PB6
PB7
PB28
PB29
MCLK
SDIN
LRFS
BCLK
AT73C213
DAC
01 - POWER SUPPLY
SERIAL INTERFACES
DBGU
COM0
RS232
C C
COM1
DOUT
NRST
DTXD
DRXD
TXD0
RXD0
RTS0
CTS0
DTR0
DSR0
DCD0
TXD1
RXD1
RTS1
CTS1
PA[0..31]
PIO
PC[0..15]
PCK0
TD0
TF0
TK0
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS0
PB[0..31]
PB[0..31]
DBGU_TXD
DBGU_RXD
PC[0..15]
AT91SAM9260
SHDN
D[0..31]
A[0..22]
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
NANDOE
NANDWE
D[0..31]
A[0..22]
PIO
PIO
SPI0_MISO MCDB0
SPI0_NPCS0 MCDB3
SPI0_MOSI MCCDB
MCDB1
MCDB2
MCCK
SPI0_SPCK
SPI0_NPCS1
A[0..14]
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
NBS1
NBS3
A16
A17
A22
A21
NANDOE
NANDWE
PC14
PC13
D[0..15]
PA0
PA5
PA4
PA3
PA8
PA1
PA2
PC11
NRST
MEMORY
D[0..31]
A[0..14]
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
BA0
BA1
CLE
ALE
NANDOE
NANDWE
NANDCS
RDYBSY
D[0..15]
DAT0
DAT1
DAT2
DAT3
CLK
CMD
SCK
CS
NRST
CARD
READER
SDRAMNANFLASH
MCI
DATAFLASH
SERIAL
DATAFLASH
USBCNX
DEVICE
HOST A
USB
HOST B
05 - COMMUNICATION
RMII_MII ETHERNET
B B
10/100 Mbps FAST ETHERNET
03 - RMII_MII ETHERNET
DDM
DDP
HDMA
HDPA
HDMB
HDPB
TX_CLK
TXD3
TXD2
TXD1
TXD0
TX_EN
RXD3
RXD2
RXD1
RXD0
RX_CLK
RX_DV
TX_ER
RX_ER
COL
CRS
MDC
MDIO
MDINTR
NRST
PC5 PA24
PA19
PA11
PA10
PA13
PA12
PA16
PA26
PA25
PA15
PA14
PA27
PA17
PA22
PA18
PA29
PA28
PA20
PA21
PA7
NRST
PIO
PA[0..31]
ETXCK/REFCLK
ETX3
ETX2
ETX1
ETX0
ETXEN
ERX3
ERX2
ERX1
ERX0
ERXCK
ERXDV
ETXER
ERXER
ECOL
ECRS
EMDC
EMDIO
PIO
DDM
DDP
HDMA
HDPA
HDMB
HDPB
02 - AT91SAM9260
CFWE_NWE_NWR0
CFOE_NRD
NCS0
NRST
PA[0..31]
PB[0..31]
PC[0..15]
VREFP
AVDD
AGND
NRST
PA[0..31]
PB[0..31]
PC[0..15]
TWCK
TWD
PA23
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
NBS1
NBS3
NANDOE
NANDWE
SCL
SDA
03 - MEMORY
EXPANSION & User's Interfaces
D[0..31]
A[0..22]
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
CFOE_NRD
NANDOE
NANDWE
NCS0
NRST
PA[0..31]
PB[0..31]
PC[0..15]
VREFP
AVDD
AGND
06 - EXPANSION CONNECTORS
SERIAL
EEPROM
A A
28/08/06JPGB
28/08/06JPGB
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
DIAGRAM
DIAGRAM
DIAGRAM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06JPGB
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
DATEMODIF.
DATEMODIF.
DATEMODIF.
REV. SHEET
REV. SHEET
REV. SHEET
1
1
1
B
B
B
8
8
8
Page 27
8
D D
7
6
5
4
3
2
1
3V3
REGULATED
5V ONLY
J1J1
3
1
2
C1
C1
330µF
330µF
10 SQUARE CM COPPER AREA FOR HEAT SINKING
5V
+
+
CR15VCR1
5V
R3
100KR3100K
WITH NO SOLDER MASK
MN1
MN1
LT1963AEQ-3.3
LT1963AEQ-3.3
C2
C2
10µF
10µF
10V
10V
2
VIN
SD
6
GND
VOUT
GND
3
1
3V3 CURRENT MEASURE
4
FB
5
C3
10µFC310µF
R1
120RR1120R
3V3
J2J2
DS1
DS1
YELLOW
C4
10µFC410µF
YELLOW
3
POWER LED
R4
470KR4470K
R5 0RR5 0R
2
R11
R11
120K
120K
C12
C12
10PF
10PF
1
Q1
Q1
IRLML2402
IRLML2402
C5
1µFC51µF
C C
Q2
Q2
Si1563EDH
Si1563EDH
456
5V
J3J3
8
C1M
5
VIN
C6
1µFC61µF
C1P6C2M3C2P
VOUT
4
C11
C11
22µF
22µF
7
R7
150KR7150K
1V8
FORCE
POWER
ON
C14
C14
15PF
15PF
1 32
R9
10KR910K
R10
R10
10K
10K
C15
C15
4.7µF
4.7µF
TPS60500
TPS60500
1
EN
MN3
MN3
GND
9
FB
PG
10
2
POWERLED
SHDN
AUDIO DAC INTERFACE
J4
J4
3.5 PHONEJACK STEREO
3.5 PHONEJACK STEREO
3
1
4
2
C16 6V3
C16 6V3
C17
C17
+
+
+
+
100µF
100µF
100µF
100µF
6V3
6V3
MN2 AT73C213
MN2 AT73C213
PAINN
PAINN
15
VBAT
VBAT
12
CBP
CBP
14
HPP
HPP
13
HPN
HPN
11
LPHN
LPHN
10
PAINP
PAINP
16
MONOP
MONOP
30
MONON
MONON
29
LINER
LINER
7
LINEL
LINEL
6
AUXP
AUXP
31
AUXN
AUXN
32
HSR
HSR
4
HSL
HSL
3
INGND GNDD
INGND GNDD
8
GNDB
GNDB
33
DOUT
DOUT
DIN
DIN
CLK
CLK
CS
CS
SMODE
SMODE
RSTB
RSTB
VDIG
VDIG
AVDD
AVDD
AVDDHS
AVDDHS
VCM
VCM
VREF
VREF
MCLK
MCLK
SDIN
SDIN
LRFS
LRFS
BCLK
BCLK
23
25
26
27
28
22
21
24
2
5
C7 10µFC7 10µF
9
C13 10µFC13 10µF
1
20
17
19
18
R8
47RR847R
3V3
R2
100KR2100K
R6 0RR6 0R
C8
100NFC8100NF
GND_DAC
C9
100NFC9100NF
C10
C10
100NF
100NF
3V3
VCC_DAC
DOUT
DIN
CLK
CS
NRST
MCLK
SDIN
LRFS
BCLK
ADHESIVE FEET
Z4
Z3
11.1Z411.1
11.1Z311.1
B B
Z5
Z6
11.1Z511.1
11.1Z611.1
GND TEST POINT
TP2TP2
TP1TP1
TP3TP3
TP4TP4
GND_DAC
VCC_DAC
C18
C18
10µF
10µF
10V
10V
L1
4.7µHL14.7µH
3V3
R12 0RR12 0R
GND_DAC
A A
28/08/06B JPG
28/08/06B JPG
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
POWER SUPPLY & AUDIO
POWER SUPPLY & AUDIO
POWER SUPPLY & AUDIO
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
REV.
REV.
REV.
B
B
B
DATEMODIF.
DATEMODIF.
DATEMODIF.
SHEET
SHEET
SHEET
2
2
2
8
8
8
Page 28
8
PC[0..15]
PB[0..31]
7
6
PB2
PB1
PB5
PB4
PB3
PB0
PB7
PB8
PB6
5
PB13
PB12
PB9
PB10
PB11
PB17
PB16
PB15
PB14
PB21
PB19
PB22
PB20
PB18
PB27
PB29
PB26
PB25
PB28
PB24
PB23
4
PC5
PC6
PC2
PC3
PC0
PC4
PB30
PC1
PB31
PC9
PC8
PC7
PC10
PC11
D16
PC15
PC14
PC12
PC13
3
D20
D19
D23
D22
D21
D17
D18
D28
D29
D30
D26
D24
D25
D31
D27
2
D[0..31]
A[0..22]
1
A17
SPI1_NPCS2/A23/PC4
C38
C38
10µF
10µF
B16
C11
A15
A16
B11
CFCE1/TIOB2/PC6
CFCE2/TIOB1/PC7
SPI1_NPCS1/A24/PC5
RTS3/NCS4_CFCS0/PC8
TIOB0/NCS5_CFCS1/PC9
VDDIOM
D11
C39
C39
100NF
100NF
ISI_D6/RTS0/PB26R8ISI_D7/CTS0/PB27
P9
T8
P10
R9
U8
ISI_PCK/RTS1/PB28
ISI_MCK/PCK1/PB31
ISI_VSYNC/CTS1/PB29
ISI_HSYNC/PCK0/PB30
GNDJ8GNDJ9GND
J10
H10
U4
T4
U3
SCK3/AD0/PC0T3PCK0/AD1/PC1
PCK1/AD2/PC2
SPI1_NPCS3/AD3/PC3
GND
GNDK8GND
GND
GND
K9
R7
K10
K16
VDDIOMVDDCORE VDDHISI
R270RR27
0R
3V3
4
M15
M16
N16
MN4
TO PQFP208 FOOTPRINT
TDI
JTAGSEL
VDDCORE
J5J5
12
34
56
78
910
1112
13
15
17
19
TMS
TCK
RTCK
TDO
NTRST
PLLRCA
VDDPLL
XOUT
XIN
XOUT32
XIN32
OSCSEL
VDDBU
WKUP
TST
BMS
VREFP
AVDD
AGND
VDDIOM
VDDHISI
ICE_NRST
678
RR1
RR1
100K
100K
ICE INTERFACE
15234
ICE_NTRST
ICE_RTCK
R14 0RR14 0R
S3S3
J6J6
1V8
SMB MALE
SMB MALE
2 3
D D
C C
3V3
14
16
18
20
B B
NOT POPULATED
MN5
MN5
R1100D181C
CR1225
CR1225
Z11
Z11
R1100D181C
+
3V
+
3V
8
R25 1KR25 1K
C47
C47
100NF
100NF
A A
J11J11
3
GND
VDD
1
2
1
54
OUT
R13 0RR13 0R
NRST
VDDPLL
J8
J8
J9J9
WAKE UP
PA[0..31]
S1S1
C19
C19
10NF
10NF
C20
C20
1NF
1NF
10PF
10PF
10PF
10PF
C26
C26
10PF
10PF
VDDBU
3
2
1
C23
C23
10PF
10PF
C24
C24
C25
C25
3V3
R23 10KR23 10K
BP2BP2
7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15 D10
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
DDP
DDM
HDPA
HDMA
HDPB
HDMB
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
S2S2
NTRST
R15 1KR15 1K
PLLRCA
R18 0RR18 0R
Y1
Y1
18.432MHz
18.432MHz
R20 0RR20 0R
S4S4
SHDN
14
Y2
Y2
32.768 kHz
32.768 kHz
J10J10
XOUT32
XIN32
OSCSEL
1V8
3
VDDBU
2
1
WKUP
MN4
R10
PA0/SPI0_MISO/MCDB0
P11
PA1/SPI0_MOSI/MCCDB
T9
PA2/SPI0_SPCK
P12
PA3/SPI0_NPCS0/MCDB3
R11
PA4/RTS2/MCDB2
R12
PA5/CTS2/MCDB1
T10
PA6/MCDA0
P13
PA7/MCCDA
T11
PA8/MCCK
P14
PA9/MCDA1
R13
PA10/MCDA2/ETX2
T12
PA11/MCDA3/ETX3
U9
PA12/ETX0
U10
PA13/ETX1
U11
PA14/ERX0
U12
PA15/ERX1
U15
PA16/ETXEN
U14
PA17/ERXDV
U16
PA18/ERXER
U13
PA19/ETXCK
T14
PA20/EMDC
R14
PA21/EMDIO
T16
PA22/ADTRG/ETXER
R15
PA23/TWD/ETX2
R16
PA24/TWCK/ETX3
P16
PA25/TCLK0/ERX2
P15
PA26/TIOA0/ERX3
T17
PA27/TIOA1/ERXCK
L14
PA28/TIOA2/ECRS
R17
PA29/SCK1/ECOL
N15
PA30/SCK2/RXD4
N14
PA31/SCK0/TXD4
C13
DDP
D13
DDM
E14
HDPA
E15
HDMA
D14
HDPB
C14
HDMB
J16
TDI
G17
TMS
H15
TCK
G16
RTCK
J14
TDO
F16
JTAGSEL
H16
NTRST
R1
N.C
T1
PLLRCA
N2
VDDPLL
C21
C21
100NF
100NF
T2
GNDPLL
P2
VDDPLL
C22
C22
100NF
100NF
U1
GNDPLL
XOUT
P1
XOUT
XIN
N1
XIN
E17
XOUT32
D17
XIN32
F14
OSCSEL
R24R24
NOT POPULATED
R26
R26
100K
100K
WKUP
SHDN
B17
C17
C32
C32
100NF
100NF
6
M14
TIOA3/SPI1_MISO/PB0
TIOB3/SPI1_MOSI/PB1
TIOA4/SPI1_SPCK/PB2
GNDBU
VDDBU
E16
D16
K14
TXD0/PB4
TIOA5/SPI1_NPCS0/PB3
C33
C33
100NF
100NF
P17
D9
N17
RXD0//PB5
VDDCORE
C34
C34
100NF
100NF
M17
TCLK1/TXD1/PB6
TCLK2/RXD1/PB7
VDDCORE
H14
C35
C35
100NF
100NF
R5
P5
T5
L16
L15
TXD2/PB8
RXD2/PB9
ISI_D8/TXD3/PB10
ISI_D9/RXD3/PB11
ISI_D10/TXD5/PB12
AT91SAM9260
AT91SAM9260
VDDCORE
VDDCORE
M1
T13
C36
C36
100NF
100NF
K15
P6
ISI_D11/RXD5/PB13
5
H17
L17
K17
J17
DTXD/PB15
DRXD/PB14
TIOB4/TD0/PB18
TCLK4/TF0/PB17
TCLK3/TK0/PB16
GNDD8GND
G14
C37
C37
10µF
10µF
VDDCORE CURRENT MEASURE
U5
J15
TIOB5/RD0/PB19
GNDL1GNDT7GND
J12J12
R6
T6
U6
P7
U7
ISI_D5/RI0/PB25
ISI_D1/RF0/PB21
ISI_D0/RK0/PB20
ISI_D4/DTR0/PB24
ISI_D2/DSR0/PB22
ISI_D3/DCD0/PB23
GNDD6GND
GNDF4GNDM3GNDH8GNDH9GND
GND
T15
D10
D12
1V8
B14
B12
CTS3/A25_CFRNW/PC10
SPI0_NPCS1/NCS2/PC11
VDDIOMG4VDDIOM
C40
C40
100NF
100NF
C12
B13
NCS6/FIQ/PC13
NCS7/IRQ0/PC12
J3
C41
C41
100NF
100NF
B15
G1
IRQ2/NCS3_NANDCS/PC14
3V3
C42
C42
10µF
10µF
10V
10V
IRQ1/NWAIT/PC15
SPI0_NPCS2/D16/PC16J4SPI0_NPCS3/D17/PC17J2SPI1_NPCS1/D18/PC18H1SPI1_NPCS2/D19/PC19J1SPI1_NPCS3/D20/PC20
VDDIOP0
C16
C43
C43
100NF
100NF
VDDIOP0L4VDDIOP0
C44
C44
100NF
100NF
K2
K4
M4
D23/PC23N3D24/PC24K1D25/PC25L3D26/PC26L2D27/PC27N4D28/PC28P4D29/PC29R3D30/PC30P3D31/PC31
EF100/D21/PC21
TCLK5/D22/PC22
U17
C45
C45
100NF
100NF
3
CFWE/NWE/NWR0
CFIOR/NBS1/NWR1
CFIOW/NBS3/NWR3
VDDIOP1
P8
C46
C46
100NF
100NF
3V3
M2
N.C
N.C
D10
D11
D12
D13
D14
D15
NBS0/A0
NWR2/NBS2/A1
A10
A11
A12
A13
A14
A15
BA0/A16
BA1/A17
A18
A19
A20
A21
A22
RAS
CAS
SDWE
SDA10
SDCKE
SDCK
SDCS/NCS1
NCS0
CFOE/NRD
NANDOE
NANDWE
NRST
BMS
TST
ADVREF
VDDANA
GNDANA
R280RR28
0R
D15
TP5TP5
C15
TP6TP6
D0
D4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
A2
A3
A4
A5
A6
A7
A8
A9
D1
C2
D2
D2
D3
E3
D4
E4
D5
E2
D6
F3
D7
G2
D8
C1
D9
D1
E1
D11
H4
D12
H3
D13
F1
D14
H2
D15
K3
A0
A2
A1
A3
A2
C4
A3
B5
A4
C5
A5
D5
A6
A4
A7
B6
A8
A5
A9
C6
A10
D7
A11
A6
A12
B7
A13
A7
A14
C7
A15
B8
A16
A8
A17
C8
A18
A9
A19
C9
A20
B9
A21
A10
A22
A11
D3
C3
F2
B4
G3
B1
B3
A14
A13
A12
B2
A1
C10
B10
G15
F15
BMS
TST
F17
U2
R4
R2
C27
C27
100NF
100NF
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-BGA217
AT91SAM9260-BGA217
AT91SAM9260-BGA217
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
RAS
CAS
SDWE
SDA10
SDCKE
SDCK
SDCS_NCS1
NCS0
CFOE_NRD
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
NANDOE
NANDWE
R17 100KR17 100K
J7J7
R191KR19
R21 0RR21 0R
C28
C28
100NF
100NF
2
3V3
BOOT MODE SELECT
OPENED : EMBEDDED ROM
1K
CLOSED : EBI_NCS0
VREFP
AVDD
L2 4.7µHL2 4.7µH
C29
C29
10µF
10µF
10V
10V
AGND
A
A
A
REV
REV
REV
SCALE
SCALE
SCALE
C30
C30
100NF
100NF
R220R R220R
INIT EDIT
INIT EDIT
INIT EDIT
1/1
1/1
1/1
3V3
3V3
JPG
JPG
JPG
DES.
DES.
DES.
R161KR16
1K
C31
C31
10µF
10µF
10V
10V
BP1BP1
RESET
28/08/06B JPG
28/08/06B JPG
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
NRST
VREFP
AVDD
AGND
VER.
VER.
VER.
REV. SHEET
REV. SHEET
REV. SHEET
B
B
B
DATEMODIF.
DATEMODIF.
DATEMODIF.
3
3
3
8
8
8
Page 29
8
PC[0..15]
PB[0..31]
7
6
PB2
PB1
PB5
PB4
PB3
PB0
PB7
PB8
PB9
PB10
PB6
PB11
PB16
PB15
PB14
5
PC0
PB17
PB21
PB19
PB22
PB20
PB18
PB27
PB29
PB26
PB25
PB28
PB24
PB23
PB30
PC1
PB31
4
D20
D19
D23
D22
D24
D21
D17
D18
PC5
PC6
PC4
PC9
PC8
PC7
PC10
PC11
D16
PC15
PC14
PC13
3
D28
D29
D30
D26
D25
D31
D27
2
1
D[0..31]
A[0..22]
59
57
58
CTS3/A25_CFRNW/PC10
SPI0_NPCS1/NCS2/PC11
128
129
130
131
134
127
56
NCS6/FIQ/PC13
IRQ1/NWAIT/PC15
SPI0_NPCS2/D16/PC16
IRQ2/NCS3_NANDCS/PC14
135
136
137
138
139
140
141
142
143
144
145
D23/PC23
D24/PC24
D25/PC25
D26/PC26
D27/PC27
D28/PC28
D29/PC29
D30/PC30
D31/PC31
EF100/D21/PC21
TCLK5/D22/PC22
D0
D10
D11
D12
D13
D14
D15
NBS0/A0
A10
A11
A12
A13
A14
A15
BA0/A16
BA1/A17
A18
A19
A20
A21
A22
RAS
CAS
SDWE
SDA10
SDCKE
SDCK
SDCS/NCS1
NCS0
CFOE/NRD
NANDOE
NANDWE
NRST
BMS
D1
D2
D3
D4
D5
D6
D7
D8
D9
A2
A3
A4
A5
A6
A7
A8
A9
SPI0_NPCS3/D17/PC17
SPI1_NPCS1/D18/PC18
SPI1_NPCS2/D19/PC19
SPI1_NPCS3/D20/PC20
NWR2/NBS2/A1
CFWE/NWE/NWR0
CFIOR/NBS1/NWR1
CFIOW/NBS3/NWR3
106
107
108
109
110
111
112
118
119
120
121
122
123
124
125
126
99
98
97
96
95
94
93
92
89
88
87
86
85
84
83
82
81
80
79
76
75
74
73
105
104
116
100
117
115
103
68
69
70
102
101
71
72
36
40
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D11
D12
D13
D14
D15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
RAS
CAS
SDWE
SDA10
SDCKE
SDCK
SDCS_NCS1
NCS0
CFOE_NRD
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
NANDOE
NANDWE
NRST
BMS
SPI1_NPCS2/A23/PC462SPI1_NPCS1/A24/PC5
61
60
67
64
CFCE1/TIOB2/PC663CFCE2/TIOB1/PC7
RTS3/NCS4_CFCS0/PC8
TIOB0/NCS5_CFCS1/PC9
11
12
MN6
PA[0..31]
D D
C C
DDP
DDM
HDPA
HDMA
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
NTRST
B B
PLLRCA
VDDPLL
XOUT
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15 D10
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
179
180
181
182
183
184
185
186
189
190
191
192
193
194
195
196
197
198
201
202
205
206
207
208
152
154
148
151
155
153
150
55
54
51
50
30
31
34
37
29
43
35
MN6
PA0/SPI0_MISO/MCDB0
PA1/SPI0_MOSI/MCCDB
PA2/SPI0_SPCK
PA3/SPI0_NPCS0/MCDB3
PA4/RTS2/MCDB2
PA5/CTS2/MCDB1
PA6/MCDA0
PA7/MCCDA
PA8/MCCK
PA9/MCDA1
PA10/MCDA2/ETX2
PA11/MCDA3/ETX3
PA12/ETX0
PA13/ETX1
PA14/ERX0
PA15/ERX1
PA16/ETXEN
PA17/ERXDV
PA18/ERXER
PA19/ETXCK
PA20/EMDC
PA21/EMDIO
PA22/ADTRG/ETXER
PA23/TWD/ETX2
1
PA24/TWCK/ETX3
2
PA25/TCLK0/ERX2
3
PA26/TIOA0/ERX3
4
PA27/TIOA1/ERXCK
7
PA28/TIOA2/ECRS
8
PA29/SCK1/ECOL
DDP
DDM
HDPA
HDMA
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
NTRST
N.C
PLLRCA
VDDPLL
GNDPLL
VDDPLL
GNDPLL
XOUT
10
TIOA3/SPI1_MISO/PB09TIOB3/SPI1_MOSI/PB1
17
15
16
TXD0/PB4
RXD0//PB5
TCLK1/TXD1/PB6
TIOA4/SPI1_SPCK/PB2
TIOA5/SPI1_NPCS0/PB3
162
18
161
19
20
TXD2/PB8
RXD2/PB9
TCLK2/RXD1/PB7
ISI_D8/TXD3/PB10
ISI_D9/RXD3/PB11
AT91SAM9260
AT91SAM9260
26
27
21
22
23
DTXD/PB15
DRXD/PB14
TIOB4/TD0/PB18
TCLK4/TF0/PB17
TCLK3/TK0/PB16
166
163
165
164
167
28
TIOB5/RD0/PB19
ISI_D0/RK0/PB20
168
ISI_D5/RI0/PB25
ISI_D1/RF0/PB21
ISI_D4/DTR0/PB24
ISI_D2/DSR0/PB22
ISI_D3/DCD0/PB23
177
176
178
175
171
172
ISI_D6/RTS0/PB26
ISI_D7/CTS0/PB27
ISI_PCK/RTS1/PB28
ISI_VSYNC/CTS1/PB29
158
159
SCK3/AD0/PC0
PCK0/AD1/PC1
ISI_MCK/PCK1/PB31
ISI_HSYNC/PCK0/PB30
42
ADVREF
VDDANA
GNDANA
VDDHISI
TST
157
160
156
C49
C49
100NF
100NF
C48
C48
100NF
100NF
XIN
XOUT32
XIN32
OSCSEL
A A
8
WKUP
SHDN
VDDBU
7
149
45
46
41
XIN
XOUT32
XIN32
OSCSEL
WKUP48SHDN
49
VDDBU
47
C50
C50
100NF
100NF
VDDCORE77VDDCORE
147
VDDCORE
174
C55
C55
100NF
100NF
C54
C54
100NF
100NF
203
GND6GND14GND25GND33GND39GND53GND66GND78GND91GND
VDDCORE
5
GND
GND
GND
GND
GND
GND
GND
VDDIOM65VDDIOM90VDDIOM
113
133
146
170
173
188
200
204
VDDIOM
C56
C56
100NF
100NF
C57
C57
100NF
100NF
C58
C58
100NF
100NF
114
132
C59
C59
100NF
100NF
4
VDDIOM
3V3
C60
C60
100NF
100NF
VDDIOP05VDDIOP013VDDIOP024VDDIOP032VDDIOP0
C62
C62
C64
100NF
100NF
C63
C63
100NF
100NF
C64
100NF
100NF
C61
C61
100NF
100NF
52
VDDIOP0
187
100NF
100NF
C65
C65
100NF
100NF
C66
C66
VDDIOP1
VDDIOP0
169
199
C67
C67
100NF
100NF
3
VDDCORE
GNDBU
38
44
C51
C51
C53
C53
100NF
100NF
100NF
100NF
C52
C52
100NF
100NF
6
VDDCORE
TST
VREFP
AVDD
AGND
28/08/06B JPG
28/08/06B JPG
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-LQFP208
AT91SAM9260-LQFP208
AT91SAM9260-LQFP208
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
DATEMODIF.
DATEMODIF.
DATEMODIF.
REV. SHEET
REV. SHEET
REV. SHEET
4
4
4
B
B
B
8
8
8
Page 30
8
7
6
5
4
3
2
1
A[0..14]
D[0..31]
MN7
A2
A4
D D
3V3
R29
C C
SDCS_NCS1
R31 0RR31 0R
R29
470K
470K
A5
A6
A7
A8
A9
A10
A11
A13
A14
A0
SDA10
BA0
BA1
SDCKE
SDCK
CAS
RAS
SDWE
SDA10
BA0
BA1
SDCKE
SDCK
NBS0 NBS2
CAS
RAS
SDWE
MN7
23
A0
MT48LC16M16A2
24
25
26
29
30
31
32
33
34
22
35
20
21
36
40
37
38
15
39
17
18
16
19
MT48LC16M16A2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA0
BA1
A12
N.C
CKE
CLK
DQML
DQMH
CAS
RAS
WE
CS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
256 Mbits 256 Mbits
D0
2
D1
4
D2
5
D3
7
D4
8
D5
10
D6
11
D7
13
D8
42
D9
44
D10
45
D11
47
D12
48
D13
50
D14
51
D15
53
1
14
27
3
9
43
49
28
41
54
6
12
46
52
C68
C68
100NF
100NF
C69
C69
100NF
100NF
C70
C70
100NF
100NF
C71
C71
100NF
100NF
SDRAM
C72
C72
100NF
100NF
C73
C73
100NF
100NF
C74
C74
100NF
100NF
CFIOW_NBS3_NWR3CFIOR_NBS1_NWR1
R32 0RR32 0R
3V3
R30
R30
470K
470K
A2
A3A3
A4
A5
A6
A7
A8
A9
A10
A11
A13
A14
A1
SDA10
BA0
BA1
SDCKE
SDCK
CAS
RAS
SDWE
23
24
25
26
29
30
31
32
33
34
22
35
20
21
36
40
37
38
15
39
17
18
16
19
MN8
MN8
A0
MT48LC16M16A2
MT48LC16M16A2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA0
BA1
A12
N.C
CKE
CLK
DQML
DQMH
CAS
RAS
WE
CS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
1
14
27
3
9
43
49
28
41
54
6
12
46
52
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
3V33V3
C75
C75
100NF
100NF
C76
C76
100NF
100NF
C77
C77
100NF
100NF
C78
C78
100NF
100NF
C79
C79
100NF
100NF
C80
C80
100NF
100NF
C81
C81
100NF
100NF
3V3
D[0..15]
DUAL FOOTPRINT
MN6A1MN6A1
CLE
CLE
ALE
NANDOE
NANDWE
NANDCS
RDYBSY
B B
3V3
3V3
R380RR38
R390RR39
R360RR36
R33 470KR33 470K
R340RR34
R351KR35
R41
R41
470K
470K
S6S6
0R
0R
0R
0R
1K
ALE
nRE
nWE
nCE
RnB
WP
16
17
8
18
9
7
19
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
34
35
16-bit bus width 8-bit bus width
CLE
ALE
RE
WE
CE
R/B
WP
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
N.C
PRE
N.C
VCC
VCC
VSS
VSS
VSS
NOT POPULATED
NANDFLASH
D0
26
D1
28
D2
30
D3
32
D4
40
D5
42
D6
44
D7
46
D8
27
D9
29
D10
31
D11
33
D12
41
D13
43
D14
45
D15
47
39
38
36
3V3
C84
C84
100NF
37
12
48
25
13
100NF
C83
C83
100NF
100NF
CLE
ALE
nRE
nWE
nCE
RnB
WP
16
17
18
19
10
11
14
15
20
21
22
23
24
25
26
8
9
7
1
2
3
4
5
6
MN6B1MN6B1
CLE
ALE
RE
WE
CE
R/B
WP
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
N.C
N.C
N.C
N.C
N.C
N.C
PRE
N.C
N.C
N.C
N.C
N.C
VCC
VCC
VSS
VSS
R37
R37
470K
470K
R43
R43
10K
10K
8
1
2
4
3
MN9MN9
VCC
SO
SI
SCK
GND
CS
RESET
J13 FPS009J13 FPS009
8
7
6
5
4
3
2
1
9
D0
29
D1
30
D2
31
D3
32
D4
41
D5
42
D6
43
D7
44
48
47
46
45
40
39
38
35
34
33
28
27
3V3
37
12
36
13
SCK
CS
NRST
DAT1
DAT0
CLK
CMD
DAT3
DAT2
3V3
R40 0RR40 0R
SERIAL DATAFLASH
3V3
R420RR42
0R
3V3
C85 100NFC85 100NF
WP
3V3
6
C82
C82
100NF
100NF
7
5
S5S5
WRITE PROTECT
NORMALLY OPEN
SD CARD / MMC CARD
DATAFLASH CARD INTERFACE
R44
R44
10K
10K
A A
8
7
6
5
SCL
SDA
4
R46 0RR46 0R
R47 0RR47 0R
3V3
100NF
100NF
R45
R45
10K
10K
MN10MN10
6
SCL
5
SDA
8
VCC
C86
C86
4
GND
SERIAL EEPROM
3
NC
WP
1
A0
2
A1
3
7
28/08/06B JPG
28/08/06B JPG
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
MEMORY
MEMORY
MEMORY
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
REV.
REV.
REV.
B
B
B
DATEMODIF.
DATEMODIF.
DATEMODIF.
SHEET
SHEET
SHEET
5
5
5
8
8
8
Page 31
8
7
6
5
4
3
2
1
D D
R48 10KR48 10K
41
50 MHz
50 MHz
3V3
3V3
VDD
VDD
32
R127 10KR127 10K
R55 0RR55 0R
R56
R56
R57
R57
OE
OE
VSS OUT
VSS OUT
Y3
Y3
SG-8002JC-50.0000M-PCB
SG-8002JC-50.0000M-PCB
TX_CLK
TXD3
TXD2
TXD1
TXD0
TX_EN
C C
B B
RXD3
RXD2
RXD1
RXD0
RX_CLK
RX_DV
TX_ER
RX_ER
COL
CRS
MDC
MDIO
MDINTR
NRST
3V3
R49 0RR49 0R
10K
10K
10K
10K
J15J15
C87
C87
100NF
100NF
R50 0RR50 0R
R119 0RR119 0R
R120 0RR120 0R
S8S8
R121 0RR121 0R
R122 0RR122 0R
R123 0RR123 0R
R124 0RR124 0R
R125 0RR125 0R
R126 0RR126 0R
C96
C96
C97
C97
C98
C98
R62 0RR62 0R
100NF
100NF
100NF
100NF
100NF
100NF
3V3
S7S7
42
17
18
19
20
21
22
26
27
28
29
34
37
16
38
36
35
24
25
32
39
41
30
23
15
33
44
10
40
C88
C88
22PF
22PF
25MHz
25MHz
1 2
MN11
MN11
REF_CLK/XT2
TXD3
TXD2
TXD1
TXD0
TX_EN
TX_CLK/ISOLATE
RXD3/PHYAD3
RXD2/PHYAD2
RXD1/PHYAD1
RXD0/PHYAD0
RX_CLK/10BTSER
RX_DV/TESTMODE
TX_ER/TXD4
RX_ER/RXD4/RPTR
COL/RMII
CRS/PHYAD4
MDC
MDIO
MDINTR
DM9161AEP
DM9161AEP
DISMDIX
DVDD
DVDD
DVDD
DGND
DGND
DGND
PWRDWN
CABLESTS/LINKSTS
RESET
C89
Y4
Y4
C89
22PF
22PF
XT1
TX+
TX-
RX+
RX-
AVDDR
AVDDR
AVDDT
AGND
AGND
AGND
BGRESG
BGRES
LEDMODE
LED0/OP0
LED1/OP1
LED2/OP2
N.C
43
7
8
3
4
1
2
9
5
6
46
47
48
31
11
12
13
14
45
VCCA
R58
R58
6,80K
6,80K
1%
1%
C91
C91
100NF
100NF
C92
C92
100NF
100NF
C94
C94
100NF
100NF
GND_ETH
L3 742792093L3 742792093
C93
C93
10V
10V
10µF
10µF
3V3
678
RR6
RR6
10K
10K
15234
DS2
DS2
DS3
DS3
DS4
DS4
C101
C101
10µF
10µF
10V
10V
VCCA
R51
R51
49R9
49R9
1%
1%
R53
R53
49R9
49R9
1%
1%
YELLOW
YELLOW
GREEN
GREEN
GREEN
GREEN
C90 100NFC90 100NF
VCCA
GND_ETH
1K
1K
1K
R52
R52
49R9
49R9
1%
1%
R54
R54
49R9
49R9
1%
1%
C95
C95
100NF
100NF
R591KR59
R611KR61
R631KR63
GND_ETH
GND_ETH
3V3
FULL DUPLEX
SPEED 100
LINK&ACT
15
16
7575
7575
75
75
75
75
C102
C102
100NF
100NF
J14
J14
TD+
TD+
1
CT
CT
4
TD-
TD-
2
RD+
RD+
3
CT
CT
5
RD-
RD-
6
NC
NC
7
8
J00-0061NL
J00-0061NL
1nF
1nF
RJ45 ETHERNET CONNECTOR
TX+
TX+
TX-
TX-
RX+
RX+
RX-
RX-
1
1
2
2
3
3
6
6
4
4
5
5
7
7
8
8
3V3
C99
C99
10µF
10µF
10V
10V
R64 0RR64 0R
A A
8
7
6
R65 0RR65 0R
GND_ETH
28/08/06B JPG
28/08/06B JPG
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
ETHERNET
ETHERNET
ETHERNET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
DATEMODIF.
DATEMODIF.
DATEMODIF.
REV. SHEET
REV. SHEET
REV. SHEET
6
6
6
B
B
B
8
8
8
Page 32
8
7
6
5
4
3
2
1
MN12
MN12
5V
F2
A
A
B
B
12
2
3
500 mA
500 mA
A1
A2
A3
A4
F2
C109
C109
100NF
100NF
C110
47pF
47pF
C112
C112
47pF
47pF
C111
C111
47pF
47pF
C113
C113
47pF
47pF
R71
R70
R70
R77
R77
3V3
15K
15K
15K
15K
R71
15K
15K
R78
R78
15K
15K
NOT POPULATED
R87
R87
1,5K
1,5K
C119
C119
33PF
33PF
USB HOST INTERFACE
R66
39R
39R
39R
39R
NOT POPULATED
39R
39R
39R
39R
NOT POPULATED
R66
R67
R67
R74
R74
R76
R76
R8115K R8115K
USB_CNX
R84
R84
22K
22K
USB DEVICE INTERFACE
R89
C123
C123
15PF
15PF
R89
R90
R90
C124
C124
15PF
15PF
39R
39R
39R
39R
R82 0RR82 0R
HDMA
HDPA
HDMB
HDPB
USBCNX
DDM
DDP
DTXD
DRXD
TXD1
RTS1
RXD1
CTS1
RTS0
TXD0
DTR0
DCD0
DSR0
RXD0
CTS0
RI0
R72 0RR72 0R
R73 0RR73 0R
R83 0RR83 0R
R85 0RR85 0R
R86 0RR86 0R
R88 0RR88 0R
R94 0RR94 0R
R95 0RR95 0R
R96 0RR96 0R
R98 0RR98 0R
R101 0RR101 0R
R103 0RR103 0R
R104 0RR104 0R
R105 0RR105 0R
R106 0RR106 0R
R80
R80
100K
100K
R91
R91
100K
100K
3V3
3V3
3V3
R68
R68
100K
100KC110
R79
R79
100K
100K
R92
R92
100K
100K
R93
R93
100K
100K
C121
C121
100NF
100NF
C127
C127
100NF
100NF
F1
F1
500 mA
500 mA
B1
B2
B3
D D
C108
C108
100NF
100NF
C C
C120
C120
100NF
100NF
B B
B4
1
4
J16
J16
CCUSBA-32002-30X
CCUSBA-32002-30X
34
J19J19
56
C103
C103
100NF
100NF
C106
C106
100NF
100NF
R69 0RR69 0R
C114
C114
100NF
100NF
C117
C117
100NF
100NF
MN14
MN14
28 26
C1+
C1+
24
C1-
C1-
1
C2+
C2+
2
14
13
T3IN
T3IN
12
21
20
R1OUT
R1OUT
19
R2OUT
R2OUT
18
R3OUT
R3OUT
17
R4OUT
R4OUT
16
R5OUT
R5OUT
15
EN SHDN
EN SHDN
1 16
C1+V+VCC
C1+V+VCC
GND
3
4
5
11
10
12
9 8
1 16
3
4
5
11
10
12
9 8
C2- V-
C2- VT1IN
T1IN
T2IN
T2IN
T
T
T
T
T
T
R
R
R
R
MAX3241E
MAX3241E
GND
C1-
C1C2+
C2+
C2- V-
C2- V-
T
T
T
T
R
R
R
R
ADM3202ARN
ADM3202ARN
MN13
MN13
C1+V+VCC
C1+V+VCC
GND
GND
C1-
C1C2+
C2+
C2- V-
C2- V-
T
T
T
T
R
R
R
R
ADM3202ARN
ADM3202ARN
VCC
VCC
GND
GND
T1OUT
T1OUT
T2OUT
T2OUT
T3OUT
T3OUT
R1IN
R1IN
R
R
R2IN
R2IN
R
R
R3IN
R3IN
R
R
R4IN
R4IN
R
R
R5IN
R5IN
R
R
15
2
6
14
7
13
15
2
6
14
7
13
25
27
V+
V+
3
9
10
11
4
5
6
7
8
2223
3V3
C104
C104
100NF
100NF
R75 0RR75 0R
3V3
C115
C115
100NF
100NF
3V3
C122
C122
100NF
100NF
3V3
C105
C105
100NF
100NF
C107
C107
100NF
100NF
C116
C116
100NF
100NF
C118
C118
100NF
100NF
C125
C125
100NF
100NF
C126
C126
100NF
100NF
SERIAL DEBUG PORT
MALE RIGHT ANGLED
MALE RIGHT ANGLED
1
RXD
TXD
6
2
7
3
8
4
9
5
10
11
J17
J17
RS232 COM PORT 1
MALE RIGHT ANGLED
MALE RIGHT ANGLED
1
RXD
RTS
TXD
CTS
6
2
7
3
8
4
9
5
10
11
J18
J18
RS232 COM PORT 0
MALE RIGHT ANGLED
MALE RIGHT ANGLED
DCD
DSR
RXD
RTS
TXD
CTS
DTR
RI
1
6
2
7
3
8
4
9
5
10
11
J20
J20
A A
R107 100KR107 100K
28/08/06B JPG
28/08/06B JPG
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
SERIAL INTERFACES
SERIAL INTERFACES
SERIAL INTERFACES
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
DATEMODIF.
DATEMODIF.
DATEMODIF.
REV. SHEET
REV. SHEET
REV. SHEET
7
7
7
B
B
B
8
8
8
Page 33
8
7
6
5
4
3
D[0..31]A[0..22]PC[0..15]PB[0..31]PA[0..31]
2
J25
J25
Interposer 100 TOP
Interposer 100 TOP
1
J23J23
18
36
18
36
PA0
PA2
PA4
PA6
PA8
PA10
PA12
PA14
PA16
PA18
PA20
PA22
PA24
PA26
PA28
PA30
RR8-1 0RRR8-1 0R
RR8-3 0RRR8-3 0R
RR7-1 0RRR7-1 0R
RR7-3 0RRR7-3 0R
PA1
PA3
PA5
D D
RR8-2 0RRR8-2 0R
RR8-4 0RRR8-4 0R
RR7-2 0RRR7-2 0R
RR7-4 0RRR7-4 0R
PA7
PA9
PA11
PA13
PA15
PA17
PA19
PA21
PA23
PA25
PA27
PA29
PA31
2 7
4 5
2 7
4 5
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
3V3 3V3 3V33V3 3V3 3V3
37 38
39 40
14
16
18
20
PB1
PB3
PB5
PB7
PB9
PB11
PB13
PB15
PB17
PB19
PB21
PB23
PB25
PB27
PB29
PB31
PIO A PIO B PIO C & ADC
C130
C130
100NF
100NF
C C
ISI_DATA[1] ISI_DATA[2]
ISI_DATA[3]
ISI_DATA[5]
ISI_DATA[7]
ISI_DATA[9]
ISI_DATA[11]
PC4
PA24
PB21
PB23
PB25
PB27
PB11
PB13
C131
C131
10V
10V
10µF
10µF
R108 0RR108 0R
1V8
J28J28
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
21 22
23 24
25 26
27 28
29 30
14
16
18
20
3V3
C133
C133
100NF
100NF
C132
C132
10V
10V
10µF
10µF
R109 0RR109 0R
PB19
PA23
PB31
PB29
PB30
PB28
PB20
PB22
PB24
PB26
PB10
PB12
PIO_CNTRL2PIO_CNTRL1
TWDTWCK
ISI_MCK
ISI_VSYNC
ISI_HSYNC
ISI_PCK
ISI_DATA[0]
ISI_DATA[4]
ISI_DATA[6]
ISI_DATA[8]
ISI_DATA[10]
IMAGE SENSOR CONNECTOR
J26J26
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
J24J24
PB0
PB2
PB4
PB6
PB8
PB10
PB12
14
PB14
16
PB16
18
PB18
20
PB20
PB22
PB24
PB26
PB28
PB30
PC11NCS2
PC15NWAIT
AVDD
AGND
PC1
PC3
PC5
PC7
PC9
PC11
PC13
PC15
D17
D19
D21
D23
D25
D27
D29
D31
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
PC0
PC2
PC4
PC4 A23PC5A24
PC6
PC6 CFCE1PC7CFCE2
PC8
PC8 CFCS0_NCS4PC9CFCS1_NCS5
PC10
PC10 A25_CFRNW
PC12
14
16
18
20
PC12 NCS7PC13NCS6
PC14
PC14 NANDCS_NCS3
D16
D18
D20
D22
D24
D26
D28
D30
VREFP
A0 NBS0_A0
A1 NWR2_NBS2_A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
CFIOW_NBS3_NWR3
CFOE_NRD
SDWE
SDCKE
NANDOE
NANDWE
SPARE2
CAS
RAS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D0
D1
D2
D5
D6
D7
D10
D11
D12
D15
D16
D17
D20
D21
D22
D25
D26
D27
D30
D31
A0
A3
A4
A5
A8
A9
A10
A13
A14
A15
A18
A19
A20
A23
A24
A25_CFRNW
NCS2
NANDCS_NCS3
CFCS0_NCS4
CFCS1_NCS5
CFCE2
NCS7
PB19
PB20
PB21
A10
B10
C10
A11
B11
C11
A12
B12
C12
A13
B13
C13
A14
B14
C14
A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
E1
D1
D4
E2
D3
D2
D9
E3
D8
D3
D14
E4
D13
D4
D19
E5
D18
D5
D24
E6
D23
D6
D29
E7
D28
D7
A2
E8
NWR2_NBS2_A1
D8
A7
E9
A6
D9
A12
E10
A11
D10
A17
E11
A16
D11
A22
E12
A21
D12
E13
D13
E14
D14
E15
D15
NCS6
E16
NWAIT
D16
CFCE1
E17
D17
E18
D18
PB30
E19
D19
E20
D20
SDCS_NCS1
NCS0
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
SDA10
SDCK
SPARE1
SPARE0
NRST
B B
EBI CONNECTORS
NOT POPULATED
3V3
C134
C134
47 uF
47 uF
6V3
6V3
CR2
USER INTERFACE
3V3
GREEN
GREEN
DS5
A A
DS5
8
R118 220RR118 220R
PA6 PA30
7
PA31
BP3BP3
BP4BP4
6
5
4
3
C135
C135
100NF
100NF
AT91SAM9260-EK
AT91SAM9260-EK
AT91SAM9260-EK
EXPANSION & UI
EXPANSION & UI
EXPANSION & UI
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
CR2
3.3V
3.3V
2
Z15Z15
J31-1J31-1
J31-2J31-2
J31-3J31-3
NOT POPULATED
INIT EDIT
INIT EDIT
INIT EDIT
A
A
A
REV
REV
REV
SCALE
SCALE
SCALE
1/1
1/1
1/1
JPG
JPG
JPG
DES.
DES.
DES.
28/08/06B JPG
28/08/06B JPG
28/08/06B JPG
17/10/05
17/10/05
17/10/05
DATE
DATE
DATE
1
VER.
VER.
VER.
REV.
REV.
REV.
B
B
B
DATEMODIF.
DATEMODIF.
DATEMODIF.
SHEET
SHEET
SHEET
8
8
8
8
8
8
Page 34
Schematics
5-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 35
Section 6
Errata
6.1 VDD Backup Jumper Selector (J10)
6.2 JTAGSEL S2 Footprint Selector
6.3 TWI line pullups for Fast Mode operation
6.4 AT73C213 clocking
The silkscreen is wrong. The markings for BB and 1V8 are inverted.
The marking should be:
! On J10 pin 1 (square pin): BB.
! On J10 pin 3: 1V8.
The S2 footprint must never be shorted to select a JTAG mode, otherwise the chip can
be damaged.
By default, the JTAGSEL input pin integrates a pull-down resistor (ICE mode). To select
the JTAG mode, connect the JTAGSEL input pin at VDDBU power.
In order to use the TWI in Fast Mode (up to 400 Kbits/s), the default 10 KΩ resistors R44
and R45 should be replaced by smaller values (e.g., 2.2 KΩ).
Note that there is no need to change the pull-up resistors if the TWI is used in Standard
Mode (up to 100 Kbits/s).
In the present schematics (block diagram p.10 and sheet 1/8, p.26), the MCLK and
BCLK sources implementation does not guarantee a correct phase relation as specified
in the AT73C213 datasheet.
Problem Fix/Workaround:
In his own design, the user must make sure the BCLK and MCLK clocks generation
implements the timing specified in the AT73C213 datasheet.
AT91SAM9260-EK Evaluation Board User Guide 6-1
6234C–ATARM–22-Mar-07
Page 36
Errata
6-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 37
7.1 Revision History
Table 7-1.
Document Comments
6234A First issue.
Section 7
Revision History
Change Request
Ref.
6234B New Figure 2-3, ” AT91SAM9260-EK Block
Diagram”
Added new schematics in Section 5. Added new
Section 6, Errata.
6234C Added errata
Fast Mode operation”
Added errata
. Inserted Section 3.14, ” PIO Usage”.
Section 6.3, ”TWI line pullups for
.
Section 6.4, ”AT73C213 clocking”
3315
4086
4227
AT91SAM9260-EK Evaluation Board User Guide 7-1
6234C–ATARM–22-Mar-07
Page 38
Revision History
7-2 AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Page 39
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