ATMEL AT90S2313 Datasheet
Features
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AVR® - High Performance and Low Power RISC Architecture
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118 Powerful Instructions - Most Single Clock Cycle Execution
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2K bytes of In-System Reprogrammable Flash
– SPI Serial Interface for Program Downloading
– Endurance: 1,000 Write/Erase Cycles
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128 bytes EEPROM
– Endurance: 100,000 Write/Erase Cycles
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128 bytes Internal RAM
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32 x 8 General Purpose Working Registers
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15 Programmable I/O Lines
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VCC: 2.7 - 6.0V
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Fully Static Operation
– 0 - 10 MHz, 4.0 - 6.0V
– 0 - 4 MHz, 2.7 - 6.0V
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Up to 10 MIPS Throughput at 10 MHz
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One 8-Bit Timer/Counter with Separate Prescaler
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One 16-Bit Timer/Counter with Separate Prescaler
and Compare and Capture Modes
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Full Duplex UART
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Selectable 8, 9 or 10 bit PWM
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External and Internal Interrupt Sources
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Programmable Watchdog Timer with On-Chip Oscillator
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On-Chip Analog Comparator
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Low Power Idle and Power Down Modes
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Programming Lock for Software Security
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20-Pin Device
8-Bit
Microcontr oller
with 2K bytes
In-System
Programmable
Flash
AT90S2313
Description
The AT90S2313 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture . By exe cuting powe rful instruc tions in a single clock
cycle, the AT90S2313 achieves throughpu ts approaching 1 MIPS per MHz allowing
the system designer to optimize power consumption versus processing speed.
The AVR core combines a rich instr uction set with 32 gene ral purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two indep endent r egisters to be acce ssed in one singl e instr uction execute d
in one clock cycle. Th e resulting arc hitecture is mor e code efficie nt while achievin g
throughputs up to ten times faster than conventional CISC microcontrollers.
(continued)
Pin Configuration
Rev. 0839DS–07/98
Note: This is a summary document. For the complete 68 page
datasheet, please visit our web site at
literature@atmel.com
mail at
and request literature #0839D.
www.atmel.com
or e-
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Block Diagram
Figure 1.
The AT90S2313 Block Diagram
The AT90S2313 provides the following features: 2K bytes
of In-System Programmable Flash, 128 bytes EEPROM,
128 bytes SRAM, 15 gen eral purpo se I/O li nes, 3 2 general
purpose working registers, flexible timer/counters with
compare modes, internal and external interrupts, a programmable serial UART, programmable Watchdog Timer
with internal oscillato r, an SPI serial port for Flash Memory
downloading and two software selectable power saving
modes. The Idle Mode stops the CPU while allowing the
SRAM, timer/counters, SPI port and interrupt system to
continue functioning. The power down mode saves the register contents but freezes the oscillator, disabling all other
chip functions until the next interrupt or hardware reset.
The device is manufac tured using Atmel’ s high density
non-volatile memory technology. The on-chip In-System
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AT90S2313
Programmable Flash allows the program memory to be
reprogrammed in-sys tem th ro ugh an S PI se rial i nterface or
by a conventional n onvolatile memo ry programmer. By
combining an enhanced RISC 8-bit CPU wit h In-System
Programmable Flash on a monolithic chip, the Atmel
AT90S2313 is a powerful microcontroller that provides a
highly flexible and co st effect ive solution to many em bedded control applications.
The AT90S2313 AVR is supported with a full s uite of program and system development tools including: C compilers, macro assemblers, program debugger/si mulators, incircuit emulators, and evaluati on kits.
AT90S2313
Pin Descriptions
VCC
Supply voltage pin.
GND
Ground pin.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port. Port pins can provide internal pul l-up resist ors (se lected for ea ch bit). PB 0
and PB1 also se rve as the po sitive inpu t (AIN0) an d the
negative input ( AIN1), resp ectively , of the on-chi p analog
comparator. The Port B output buffers can sink 20mA and
can drive LED displays directly. When pins PB0 to PB7 are
used as inputs and are externally pulled low, they will
source current if the internal pull-up resistors are activated.
Port B also serves the fu nction s of vario us speci al feat ures
of the AT90S2313 as listed on page 38.
Port D (PD6..PD0)
Port D has seven bi-directional I/O pins with internal pull-up
resistors, PD6..PD0. The Port D o utput buffers can s ink 20
mA. As inputs, Port D pins that are externally pulled low will
source current if the pull-up resistors are activated.
Port D also serves th e fu nc tion s of v ario us sp ec ial fea tur es
of the AT90S2313 as listed on page 43.
RESET
Reset input. A low on th is pi n for two machi ne cy cles wh ile
the oscillator is running resets the device.
XTAL1
Input to the inverting os cillator amplifi er and input to th e
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier
Figure 2.
Figure 3.
Oscillator Connec tio ns
External Clock Drive Configuration
Crystal Oscillator
XTAL1 and XTAL2 are input and output, respectively, of an
inverting amplifier which can be configured for use as an
on-chip osci llator, as s hown in Figu re 2. Either a quartz
crystal or a ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven as shown in Figure 3.
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