ATMEL AT27LV512A User Manual

Features

Fast Read Access Time – 90 ns
Dual Voltage Range Operation
Low Voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V ± 10% Supply Range
Compatible with JEDEC Standard AT27C512R
Low Power CMOS Operation
20 µA Max (Less than 1 µA Typical) Standby for V
= 3.6V
29 mW Max Active at 5 MHz for V
= 3.6V
JEDEC Standard Packages
32-lead PLCC
28-lead SOIC
28-lead TSOP
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL
Integrated Product Identification Code
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option

1. Description

The AT27LV512A is a high-performance, low-power, low-voltage 524,288-bit one-
time programmable read-only memory (OTP EPROM) organized as 64K by 8 bits. It
requires only one supply in the range of 3.0 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3.3V supply. At V
CC
= 3.0V, any byte can be
accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
CC
= 3.3V, the AT27LV512A consumes less than one fifth the power of a stan-
dard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.
The AT27LV512A is available in industry-standard JEDEC-approved one-time
programmable (OTP) plastic PLCC, SOIC, and TSOP packages. All devices feature
two-line control (CE
, OE) to give designers the flexibility to prevent bus contention.
The AT27LV512A operating with V
CC
at 3.0V produces TTL level outputs that are
compatible with standard TTL logic devices operating at V
CC
= 5.0V. The device is
also capable of standard 5-volt operation making it ideally suited for dual supply range
systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV512A has additional features to ensure high quality and efficient pro-
duction use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages. The
AT27LV512A programs exactly the same way as a standard 5V AT27C512R and
uses the same programming equipment.
512K (64K x 8)
Low Voltage
OTP EPROM
AT27LV512A
0607F–EPROM–12/07
BDTIC www.BDTIC.com/ATMEL
2
0607F–EPROM–12/07
AT27LV512A

2.1 28-lead SOIC Top View

2.2 32-lead PLCC Top View

Note: PLCC Package Pins 1 and 17 are Don’t Connect.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A6
A5
A4
A3
A2
A1
A0
NC
O0
A8
A9
A11
NC
OE/VPP
A10
CE
O7
O6
4
3
2
1
32
31
30
14
15
16
17
18
19
20
O1
O2
GND
NC
O3
O4
O5
A7
A12
A15
NC
VCC
A14
A13

2.3 28-lead TSOP (Type 1) Top View

1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE/VPP
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2

2. Pin Configurations

Pin Name Function
A0 - A15 Addresses
O0 - O7 Outputs
CE
Chip Enable
OE
/VPP Output Enable/ Program Supply
NC No Connect
3
0607F–EPROM–12/07
AT27LV512A

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
CC
and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
CC
and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.

4. Block Diagram

Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
overshoot to +7.0 volts for pulses of less than 20 ns.

5. Absolute Maximum Ratings*

Temperature Under Bias.................................. -40°C to +85°C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Storage Temperature ..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
4
0607F–EPROM–12/07
AT27LV512A
Notes: 1. X can be V
IL
or V
IH
.
2. Read, output disable, and standby modes require, 3.0V V
CC
3.6V, or 4.5V V
5.5V.
3. Refer to Programming Characteristics. Programming modes require V
CC
= 6.5V.
4. V
H
= 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
), except A9 which is set to V
H
and A0 which is toggled
low (V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.

6. Operating Modes

Mode/Pin CE OE/V
PP
Ai V
Outputs
Read
(2)
V
IL
V
IL
Ai V
D
OUT
Output Disable
(2)
V
IL
V
IH
X
(1)
V
High Z
Standby
(2)
V
IH
XXV
High Z
Rapid Program
(3)
V
IL
V
PP
Ai V
D
IN
PGM Inhibit
(3)
V
IH
V
PP
XV
High Z
Product Identification
(3)(5)
V
IL
V
IL
A9 = V
H
(4)
A0 = V
IH
or V
IL
A1 - A15 = V
IL
V
Identification Code

7. DC and AC Operating Conditions for Read Operation

AT27LV512A-90
Industrial Operating Temperature (Case) -40°C - 85°C
V
CC
Power Supply
3.0V to 3.6V
5V ± 10%
5
0607F–EPROM–12/07
AT27LV512A
Notes: 1. V
must be applied simultaneously with or before OE/V
PP
, and removed simultaneously with or after OE/V
PP
.
2. OE
/V
PP
may be connected directly to V
, except during programming. The supply current would then be the sum of I
and I
PP
.

8. DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units
V
CC
= 3.0V to 3.6V
I
LI
Input Load Current V
IN
= 0V to V
CC
±1 µA
I
LO
Output Leakage Current V
OUT
= 0V to V
±5 µA
I
PP1
(2)
V
PP
(1)
Read/Standby Current V
PP
= V
10 µA
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS), CE = V
CC ±
0.3V 20 µA
I
SB2
(TTL), CE = 2.0 to V
+ 0.5V 100 µA
I
CC
V
CC
Active Current f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
8mA
V
IL
Input Low Voltage -0.6 0.8 V
V
IH
Input High Voltage 2.0 V
CC
+ 0.5 V
V
OL
Output Low Voltage I
OL
= 2.0 mA 0.4 V
V
OH
Output High Voltage I
OH
= -2.0 mA 2.4 V
V
CC
= 4.5V to 5.5V
I
LI
Input Load Current V
IN
= 0V to V
CC
±1 µA
I
LO
Output Leakage Current V
OUT
= 0V to V
±5 µA
I
PP1
(2)
V
PP
(1)
Read/Standby Current V
PP
= V
10 µA
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS), CE = V
± 0.3V 100 µA
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V 1 mA
I
CC
V
CC
Active Current f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
20 mA
V
IL
Input Low Voltage -0.6 0.8 V
V
IH
Input High Voltage 2.0 V
CC
+ 0.5 V
V
OL
Output Low Voltage I
OL
= 2.1 mA 0.4 V
V
OH
Output High Voltage I
OH
= -400 µA2.4V
Loading...
+ 9 hidden pages