The AT27LV512A is a high-performance, low-power, low-voltage 524,288-bit onetime programmable read-only memory (OTP EPROM) organized as 64K by 8 bits. It
requires only one supply in the range of 3.0 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3.3V supply. At V
accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
dard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.
The AT27LV512A is available in industry-standard JEDEC-approved one-time
programmable (OTP) plastic PLCC, SOIC, and TSOP packages. All devices feature
two-line control (CE
The AT27LV512A operating with V
compatible with standard TTL logic devices operating at V
also capable of standard 5-volt operation making it ideally suited for dual supply range
systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV512A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages. The
AT27LV512A programs exactly the same way as a standard 5V AT27C512R and
uses the same programming equipment.
= 3.3V, the AT27LV512A consumes less than one fifth the power of a stan-
CC
, OE) to give designers the flexibility to prevent bus contention.
Note:PLCC Package Pins 1 and 17 are Don’t Connect.
2
AT27LV512A
0607F–EPROM–12/07
3.System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
4.Block Diagram
AT27LV512A
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC
5.Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature ..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Note:1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
V
CC
overshoot to +7.0 volts for pulses of less than 20 ns.
(1)
(1)
(1)
*NOTICE:Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
0607F–EPROM–12/07
3
6.Operating Modes
Mode/PinCEOE/V
(2)
Read
Output Disable
Standby
Rapid Program
PGM Inhibit
(2)
(2)
(3)
(3)
Product Identification
(3)(5)
V
IL
V
IL
V
IH
V
IL
V
IH
V
IL
V
V
XXVCCHigh Z
V
V
V
PP
IL
IH
PP
PP
IL
AiV
AiV
(1)
X
AiV
CC
CC
V
CC
CC
XVCCHigh Z
A9 = V
A0 = VIH or VIL
A1 - A15 = V
(4)
H
IL
V
CC
Notes:1. X can be VIL or VIH.
2. Read, output disable, and standby modes require, 3.0V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
3. Refer to Programming Characteristics. Programming modes require V
4. V
= 12.0 ± 0.5V.
H
= 6.5V.
CC
5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7.DC and AC Operating Conditions for Read Operation
AT27LV512A-90
Industrial Operating Temperature (Case)-40°C - 85°C
VCC Power Supply
3.0V to 3.6V
5V ± 10%
Outputs
D
OUT
High Z
D
IN
Identification Code
4
AT27LV512A
0607F–EPROM–12/07
AT27LV512A
8.DC and Operating Characteristics for Read Operation
SymbolParameterConditionMinMaxUnits
= 3.0V to 3.6V
V
CC
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
= 4.5V to 5.5V
V
CC
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Input Load CurrentVIN = 0V to V
Output Leakage CurrentV
(1)
V
Read/Standby CurrentVPP = V
PP
(1)
V
Standby Current
CC
= 0V to V
OUT
I
(CMOS), CE = V
SB1
(TTL), CE = 2.0 to VCC + 0.5V100µA
I
SB2
VCC Active Currentf = 5 MHz, I
CC
CC
CC
OUT
0.3V20µA
CC ±
= 0 mA, CE = V
IL
Input Low Voltage-0.60.8V
Input High Voltage2.0VCC + 0.5V
Output Low VoltageIOL = 2.0 mA0.4V
Output High VoltageIOH = -2.0 mA2.4V
Input Load CurrentVIN = 0V to V
Output Leakage CurrentV
(1)
V
Read/Standby CurrentVPP = V
PP
(1)
V
Standby Current
CC
= 0V to V
OUT
I
(CMOS), CE = VCC ± 0.3V100µA
SB1
I
(TTL), CE = 2.0 to VCC + 0.5V1mA
SB2
VCC Active Currentf = 5 MHz, I
CC
CC
CC
= 0 mA, CE = V
OUT
IL
Input Low Voltage-0.60.8V
Input High Voltage2.0VCC + 0.5V
Output Low VoltageIOL = 2.1 mA0.4V
Output High VoltageIOH = -400 µA2.4V
Notes:1. VCC must be applied simultaneously with or before OE/VPP, and removed simultaneously with or after OE/VPP.
2. OE
/VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC
.
and I
PP
±1µA
±5µA
10µA
8mA
±1µA
±5µA
10µA
20mA
0607F–EPROM–12/07
5
9.AC Characteristics for Read Operation
VCC = 3.0V to 3.6V and 4.5V to 5.5V
(3)
t
t
t
t
ACC
CE
OE
DF
(2)
(2)(3)
(4)(5)
Address to Output DelayCE = OE/VPP = V
CE to Output DelayOE/VPP = V
OE/VPP to Output DelayCE = V
OE/VPP or CE High to Output Float, Whichever
Occurred First
AT27LV512A-90
UnitsSymbolParameterConditionMinMax
IL
IL
IL
90ns
90ns
50ns
40ns
t
OH
10. AC Waveforms for Read Operation
Output Hold from Address, CE or OE/VPP,
Whichever Occurred First
0ns
(1)
Notes:1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE
/VPP may be delayed up to t
- tOE after the address is valid without impact on t
ACC
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
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AT27LV512A
0607F–EPROM–12/07
11. Input Test Waveforms and Measurement Levels
, tF < 20 ns (10% to 90%)
t
R
12. Output Test Load
AT27LV512A
Note: CL = 100 pF including
jig capacitance.
13. Pin Capacitance
f = 1 MHz, T = 25°C
SymbolTypMaxUnitsConditions
C
IN
C
OUT
Note:1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
(1)
46pFV
812pFV
IN
OUT
= 0V
= 0V
0607F–EPROM–12/07
7
14. Programming Waveforms
(1)
Notes:1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. t
OE
and t
are characteristics of the device but must be accommodated by the programmer.
Note:1. The AT27LV512A has the same Product Identification Code as the AT27C512R. Both are programming compatible.
9
0607F–EPROM–12/07
18. Rapid Programming Algorithm
A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is
raised to 6.5V and OE
100
µs CE pulse without verification. Then a verification/reprogramming loop is executed for
each address. In the event a byte fails to pass verification, up to 10 successive 100
are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have
been applied, the part is considered failed. After the byte verifies properly, the next address is
selected until all have been checked. OE
are read again and compared with the original data to determine if the device passes or fails.
/VPP is raised to 13.0V. Each address is first programmed with one
µs pulses
/VPP is then lowered to VIL and VCC to 5.0V. All bytes
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AT27LV512A
0607F–EPROM–12/07
19. Ordering Information
19.1Standard Package
I
t
ACC
(ns)
90
(mA)
CC
80.02AT27LV512A-90JI
Ordering CodePackageOperation RangeActiveStandby
AT27LV512A-90RI
AT27LV512A-90TI
32J
28R
28T
AT27LV512A
(1)
Industrial
(-40°C to 85°C)
Note:
Not recommended for new designs. Use Green package option.
19.2Green Package (Pb/Halide-free)
I
t
ACC
(ns)
55
90
Note:1. The 28-pin SOIC package is not recommended for new designs.
(mA)
CC
Ordering CodePackageOperation RangeActiveStandby
80.02AT27LV512A-55JU
AT27LV512A-55RU
AT27LV512A-55TU
80.02AT27LV512A-90JU
AT27LV512A-90RU
AT27LV512A-90TU
32J
28R
28T
32J
28R
28T
(1)
(1)
Industrial
(-40°C to 85°C)
Industrial
(-40°C to 85°C)
Package Type
32J32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
28R28-Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC)
28T28-Lead, Thin Small Outline Package (TSOP)
0607F–EPROM–12/07
11
20. Packaging Information
20.132J – PLCC
1.14(0.045) X 45˚
B
e
0.51(0.020)MAX
45˚ MAX (3X)
Notes:1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.