ATMEL AT27C256R-90TI, AT27C256R-90TC, AT27C256R-90RI, AT27C256R-70PC, AT27C256R-70JI Datasheet

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AT27C256R
Description
The AT27C256R is a low-power, high performance 262,144 bit one-time programma­ble read only memory (OTP EPROM) organized 32K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states on high performance microprocessor systems.
(continued)
256K (32K x 8) OTP CMOS EPROM
Features
Fast Read Access Ti me - 45 ns
Low Power CMOS Operation
100 µA max. Standby 20 mA max. Active at 5 MHz
JEDEC Standard Packages
28-Lead 600-mil PDIP 32-Lead PLCC 28-Lead TSOP and SOIC
5V ± 10% Supply
High Reliability CMOS Techn ol og y
2,000V ESD Protection 200 mA Latchup Immunity
RapidProgramming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product I de nti fic ation Code
Commercial and Industrial Temperature Ranges
Pin Configurations
Pin Name Function
A0 - A14 Addresses O0 - O7 Outputs CE Chip Enable OE Output Enable NC No Connect
PDIP, SOIC Top View
Note: PLCC Package Pins 1 and 17 are DON’T CONNECT.
PLCC Top View
TSOP Top View
Type 1
0014G
AT27C256R
3-125
The AT27C256R is available in a choice of industry stand­ard JEDEC-approved one time programmable (OTP) plastic DIP, PLCC, SOIC, and TSOP packages. All de­vices feature two-line control (
CE, OE) to give designers
the flexibility to prevent bus contention. With 32K byte storage capability, the AT27C256R allows
firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
Atmel’s 27C256R has additional features to ensure high quality and efficient production use. The Rapid
Program­ming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the pr oper program­ming algorithms and voltages.
Description (Continued)
Switching between active and standby conditions via the Chip Enable pin ma y produce transient voltage excur­sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de­vice non-conformance. At a minimum, a 0.1 µF high fre­quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V
CC
and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize th e supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V
CC
and Ground terminals. This capacitor should be posi­tioned as close as possible to the point where the power supply is connected to the array.
System Considerations
3-126 AT27C256R
Block Diagram
Temperature Under Bias ................ -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground.........................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
(1)
VPP Supply Voltage with
Respect to Ground.......................-2.0V to +14.0V
(1)
*NOTICE: Stresses beyond those listed under “Abso lu te Max i-
mum Ratings” may cause permanent da mage to th e de vi ce . This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi­cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out­put pin voltage is V
CC
+ 0.75V dc which may over-
shoot to +7.0V for pulses of less than 20 ns.
Absolute Maximum Ratings*
Operating Modes
Mode \ Pin
CE OE Ai V
PP
Outputs
Read V
IL
V
IL
Ai V
CC
D
OUT
Output Disable V
IL
V
IH
X
(1)
V
CC
High Z
Standby V
IH
X
(1)
X
(1)
V
CC
High Z
Rapid Program
(2)
V
IL
V
IH
Ai V
PP
D
IN
PGM Verify
(2)
X
(1)
V
IL
Ai V
PP
D
OUT
Optional PGM Verify
(2)
V
IL
V
IL
Ai V
CC
D
OUT
PGM Inhibit
(2)
V
IH
V
IH
X
(1)
V
PP
High Z
Product Identification
(4)
V
IL
V
IL
A9 = VH
(3)
A0 = VIH or VIL
A1 - A14 = V
IL
V
CC
Identification Code
Notes: 1. X can be VIL or VIH.
2. Refer to Programming characteristics.
3. V
H
= 12.0 ± 0.5V.
4. Two identifier by tes may be selecte d. All Ai inputs
are held low (V
IL
), except A9 wh ich is set to VH and A0
which is toggled low (V
IL
) to select the Manufacturer’s Identi-
fication byte and high (V
IH
) to select the Dev ice Code byte.
AT27C256R
3-127
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