The AT27C256R is a low-power, high-performance 262,144-bit one-time programmable read-only memory (OTP EPROM) organized 32K by 8 bits. It requires only one 5V
power supply in normal read mode operation. Any byte can be accessed in less than
45 ns, eliminating the need for speed reducing WAIT states on high-performance
microprocessor systems.
256K (32K x 8)
OTP EPROM
AT27C256R
Atmel’s scaled CMOS technology provides low-active power consumption, and fast
programming. Power consumption is typically only 8 mA in Active Mode and less than
10 µA in Standby.
The AT27C256R is available in a choice of industry-standard JEDEC-approved one
time programmable (OTP) plastic DIP, PLCC, SOIC, and TSOP packages. All devices
feature two-line control (CE
contention.
With 32K byte storage capability, the AT27C256R allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
Atmel’s AT27C256R has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
, OE) to give designers the flexibility to prevent bus
0014K–EPROM–10/05
2.Pin Configurations
Pin NameFunction
A0 - A14Addresses
O0 - O7Outputs
CE
Chip Enable
OE
Output Enable
NCNo Connect
2.128-lead PDIP/SOIC Top View
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
VCC
27
A14
26
A13
25
A8
24
A9
23
A11
22
OE
21
A10
20
CE
19
O7
18
O6
17
O5
16
O4
15
O3
2.328-lead TSOP Top View – Type 1
2.232-lead PLCC Top View
OE
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
A10
27
CE
26
O7
25
O6
24
O5
23
O4
22
O3
21
GND
20
O2
19
O1
18
O0
17
A0
16
A1
15
A2
A7
A12
VPPNCVCC
A14
A13
432
1
O2
GND
323130
O3O4O5
NC
29
A8
28
A9
27
A11
26
NC
25
OE
24
A10
23
CE
22
O7
21
O6
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
7
8
9
10
11
12
13
14151617181920
O1
Note:PLCC Package Pins 1 and 17 are Don’t Connect.
2
AT27C256R
0014K–EPROM–10/05
3.System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
4.Block Diagram
AT27C256R
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC
5.Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Note:1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
+ 0.75V dc which may overshoot to +7.0 volts for pulses of less than 20 ns.
CC
(1)
(1)
(1)
*NOTICE:Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
0014K–EPROM–10/05
3
6.Operating Modes
Mode/PinCEOEAiV
ReadV
Output DisableV
StandbyV
Rapid Program
PGM Verify
Optional PGM Verify
PGM Inhibit
Product Identification
(2)
(2)
(2)
(2)
(4)
X
IL
IL
IH
V
IL
(1)
V
IL
V
IH
V
IL
V
V
X
V
V
V
V
V
IL
IH
(1)
IH
IL
IL
IH
IL
AiV
(1)
X
(1)
X
AiV
AiV
AiV
(1)
X
A9 = V
(3)
H
A0 = VIH or VIL
A1 - A14 = V
IL
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
= 12.0 ± 0.5V.
3. V
H
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (V
) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
IL
7.DC and AC Operating Conditions for Read Operation