ATMEL AT27C256R User Manual

Features

Fast Read Access Time – 45 ns
Low-Power CMOS Operation
– 100 µA Max Standby – 20 mA Max Active at 5 MHz
JEDEC Standard Packages
– 28-lead PDIP – 32-lead PLCC – 28-lead TSOP and SOIC
5V ± 10% Supply
High Reliability CMOS Technology
– 2,000V ESD Protection – 200 mA Latchup Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Industrial and Automotive Temperature Ranges
Green (Pb/Halide-free) Packaging Option

1. Description

The AT27C256R is a low-power, high-performance 262,144-bit one-time programma­ble read-only memory (OTP EPROM) organized 32K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems.
256K (32K x 8) OTP EPROM
AT27C256R
Atmel’s scaled CMOS technology provides low-active power consumption, and fast programming. Power consumption is typically only 8 mA in Active Mode and less than 10 µA in Standby.
The AT27C256R is available in a choice of industry-standard JEDEC-approved one time programmable (OTP) plastic DIP, PLCC, SOIC, and TSOP packages. All devices feature two-line control (CE contention.
With 32K byte storage capability, the AT27C256R allows firmware to be stored reli­ably and to be accessed by the system without the delays of mass storage media.
Atmel’s AT27C256R has additional features to ensure high quality and efficient pro­duction use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages.
, OE) to give designers the flexibility to prevent bus
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2. Pin Configurations

Pin Name Function
A0 - A14 Addresses
O0 - O7 Outputs
CE
Chip Enable
OE
Output Enable
NC No Connect

2.1 28-lead PDIP/SOIC Top View

VPP
A12
A7 A6 A5 A4 A3 A2 A1
A0 O0 O1 O2
GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28
VCC
27
A14
26
A13
25
A8
24
A9
23
A11
22
OE
21
A10
20
CE
19
O7
18
O6
17
O5
16
O4
15
O3
2.3 28-lead TSOP Top View – Type 1

2.2 32-lead PLCC Top View

OE
A11
A9
A8 A13 A14
VCC
VPP
A12
A7
A6
A5
A4
A3
1 2 3 4 5 6
7 8 9 10 11 12 13 14
28
A10
27
CE
26
O7
25
O6
24
O5
23
O4
22
O3
21
GND
20
O2
19
O1
18
O0
17
A0
16
A1
15
A2
A7
A12
VPPNCVCC
A14
A13
432
1
O2
GND
323130
O3O4O5
NC
29
A8
28
A9
27
A11
26
NC
25
OE
24
A10
23
CE
22
O7
21
O6
A6 A5 A4 A3 A2 A1 A0
NC
O0
5 6 7 8 9 10 11 12 13
14151617181920
O1
Note: PLCC Package Pins 1 and 17 are Don’t Connect.
2
AT27C256R
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3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce tran­sient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V close as possible to the point where the power supply is connected to the array.

4. Block Diagram

AT27C256R
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC

5. Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
+ 0.75V dc which may overshoot to +7.0 volts for pulses of less than 20 ns.
CC
(1)
(1)
(1)
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device. This is a stress rating only and func­tional operation of the device at these or any other conditions beyond those indicated in the opera­tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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6. Operating Modes

Mode/Pin CE OE Ai V
Read V
Output Disable V
Standby V
Rapid Program
PGM Verify
Optional PGM Verify
PGM Inhibit
Product Identification
(2)
(2)
(2)
(2)
(4)
X
IL
IL
IH
V
IL
(1)
V
IL
V
IH
V
IL
V
V
X
V
V
V
V
V
IL
IH
(1)
IH
IL
IL
IH
IL
Ai V
(1)
X
(1)
X
Ai V
Ai V
Ai V
(1)
X
A9 = V
(3)
H
A0 = VIH or VIL A1 - A14 = V
IL
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
= 12.0 ± 0.5V.
3. V
H
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (V
) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
IL

7. DC and AC Operating Conditions for Read Operation

AT27C256R
-45 -70
V
PP
CC
V
CC
V
CC
PP
PP
CC
V
PP
CC
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
D
OUT
High Z
Identification Code
Operating Temp. (Case) Ind. -40°C - 85°C-40°C - 85°C
Auto. -40°C - 125°C
V
Supply 5V ± 10% 5V ± 10%
CC

8. DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes: 1. V
2. V
Input Load Current VIN = 0V to V
Output Leakage Current V
(1)
V
Read/Standby Current VPP = V
PP
(1)
V
Standby Current
CC
= 0V to V
OUT
I
(CMOS), CE = VCC ± 0.3V 100 µA
SB1
I
(TTL), CE = 2.0 to V
SB2
VCC Active Current f = 5 MHz, I
CC
OUT
CC
CC
= 0 mA, E = V
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA 2.4 V
must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP..
CC
may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.
PP
Ind. ±1 µA
Auto. ±5 µA
Ind. ±5 µA
Auto. ±10 µA
10 µA
+ 0.5V 1 mA
CC
IL
20 mA
4
AT27C256R
0014K–EPROM–10/05
.

9. AC Characteristics for Read Operation

Symbol Parameter Condition
(1)
t
ACC
(1)
t
CE
(1)
t
OE
(1)
t
DF
t
OH
Note: 1. See AC Waveforms for Read Operation.
Address to Output Delay CE = OE = V
CE to Output Delay OE = V
OE to Output Delay CE = V
IL
IL
OE or CE High to Output Float, Whichever Occurred First
Output Hold from Address, CE or OE, Whichever Occurred First
AT27C256R
AT27C256R
-45 -70
Min Max Min Max
IL
45 70 ns
45 70 ns
20 30 ns
20 25 ns
77 ns
Units
10. AC Waveforms for Read Operation
(1)
Notes: 1. Timing measurement reference level is 1.5V for -45 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing mea-
surement reference levels for all other speed grades are V and V
2. OE
3. OE
= 2.4V.
IH
may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
may be delayed up to t
- tOE after the address is valid without impact on t
ACC
= 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V
OL
.
ACC
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
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