Asus Commando User Manual
ASUS Blitz Series technical updates 1
ASUS Blitz Series Technical Updates
This is an information update for the user guide that comes with your motherboard
package.
A.4 Debug code table
(page A-4~A-6)
IE3152
Code Description
CPU INIT CPU Initiation
DET CPU
Test CMOS R/W functionality.
CHIPINIT
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache
-Program basic chipset registers
DET DRAM
Detect memory
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache
DC FCODE Expand compressed BIOS code to DRAM
EFSHADOW Call chipset hook to copy BIOS back to E000 & F000 shadow RAM.
INIT IO Initialize IO devices.
INIT HWM
Initialize Hardware Monitor.
CLR SCRN
1. Blank out screen
2. Clear CMOS error ag
INIT8042
1. Clear 8042 interface
2. Initialize 8042 self-test
ENABLEKB
1. Test special keyboard controller for Super I/O chips.
2. Enable keyboard interface.
DIS MS
1. Disable PS/2 mouse interface (optional).
2. Auto detect ports for keyboard & mouse followed by a port & interface
swap (optional).
3. Reset keyboard for Super I/O chips.
R/W FSEG
Test F000h segment shadow to see whether it is R/W-able or not. If test
fails, keep beeping the speaker.
DET FLASH
Auto detect ash type to load appropriate ash R/W codes into the run time
area in F000 for ESCD & DMI support.
TESTCMOS
Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set
real-time clock power status, and then check for override.
PRG CHIP Program chipset default values into chipset.
INIT CLK Initialize clock generator.
CHECKCPU Detect CPU information including brand, type and CPU level (586 or 686).
INTRINIT Initial interrupts vector table.
INITINT9 Initialize INT 09 buffer
CPUSPEED
1. Program CPU internal MTRR (Pentium class CPU) for 0-640K memory
address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: onboard IDE
controller.
4. Measure CPU speed.
5. Invoke video BIOS.
VGA BIOS Initialize VGA BIOS
TESTVRAM
1. Initialize multi-language
2. Put information on screen display, including BIOS logo, CPU type, CPU
speed .
RESET KB Reset keyboard.
2 ASUS Blitz Series technical updates
8254TEST Test 8254
8259MSK1 Test 8259 interrupt mask bits for channel 1.
8259MSK2 Test 8259 interrupt mask bits for channel 2.
8259TEST Test 8259 functionality.
COUNTMEM Calculate total memory by testing the last double word of each 64K page.
MP INIT
1. Program MTRR of M1 CPU
2. Initialize L2 cache for P6 class CPU & program CPU with proper
cacheable range.
3. Initialize the APIC for P6 class CPU.
4. On MP platform, adjust the cacheable range to smaller one in case the
cacheable ranges between each CPU are not identical.
USB INIT Initialize USB
TEST MEM Test all memory (clear all extended memory to 0)
SHOW MP Display number of processors (multi-processor platform)
PNP LOGO Display PnP logo
ONBD IO Initialize Onboard IO devices.
EN SETUP Okay to enter Setup utility.
MSINSTAL Initialize PS/2 Mouse
CHK ACPI Prepare memory size information for function call: INT 15h ax=E820h
EN CACHE Turn on L2 cache
SET CHIP
Program chipset registers according to items described in Setup & Auto-
conguration table.
AUTO CFG Assign resources to devices.
INIT FDC
1. Initialize oppy controller
2. Set up oppy related elds in 40:hardware.
DET IDE Detect & install all IDE devices: HDD, LS120, ZIP, CDROM.
COM/LPT Detect serial ports & parallel ports.
DET FPU Detect & install co-processor
CPU CHG New CPU installed
EZ FLASH Execute EZ Flash
CPR FAIL CPR error
FAN FAIL Fan error
UCODEERR UCODE error
FLOPYERR Floppy error
KB ERROR Keyboard error
HD ERR HDD error
CMOS ERR CMOS error
MS ERROR Mouse error
SMARTERR HDD smart function error
HM ERROR Hard monitor error
AINETERR AI NET error
CASEOPEN Case open
INIT ROM Initialize option ROMs
PASSWORD
Clear EPA or customization logo.
1. Call chipset power management hook.
2. Recover the text fond used by EPA logo (not for full screen logo)
3. If password is set, ask for password.
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