Asus 1015P Schematics
5
4
3
2
1
01_Block Diagram
02_USB-Port
03_ALC269-1
04_ALC269-2(I/O)
1015P_IO_BOARD
1.2G
05_PWR BUTTON $ LED
D D
06_B to B connector
07_Camera_D-MIC
2009_1129
08_Srew Hole
09_EMI
10_History
C C
B B
A A
<Core Design>
Block Diagram
Title :
ASUSTek Computer INC.
Size Project Name
Custom
5
4
3
2
Date: Sheet
1201_IO_BD
Engineer:
1
<OrgAddr1>
112Friday, February 05, 2010
of
Rev
1.0
5
4
3
2
1
0.1 C Beta
PWRBTN#
7
8
SW1
NP_NC
NP_NC
D D
PWRBTN#
+3VA_BTN
OR12
100KOhm
/X
1 2
12
OC14
0.1UF/16V
/X
E_GND
O_PWR_SW# 10
1 2
GND
SW_2P
345
E_GND
6
+5VA
+3VA_BTN
1 2
1 2
OR1
10KOhm
/X
OR2
20KOhm
/X
PWRBTN_LED10
C C
E_GND
For POWER ON LED
+5VA
YR2
1 2
510OHM
r0402
B B
A A
5
PER_LED
+
1 2
BLUE
07G015R00016
PWRBTN_LEDPWRON_LED+
<Core Design>
Title :
ASUSTEK COMPUTER INC
Size Project Name
A3
4
3
2
Date: Sheet
1015P_DAU_CARD
Engineer:
1
PWR_BUTTON
Anndy_wang
of
212Friday, February 05, 2010
Rev
1.0
5
4
3
2
1
0.1B Beta
URN1B
3 4
U_USB1+10
D D
U_USB1-10
U_USB2+10
U_USB2-10
0OHM
14
1 2
0OHM
URN1A
URN2B
3 4
0OHM
14
1 2
0OHM
URN2A
23
UL3
90Ohm/100Mhz
/X
23
UL5
90Ohm/100Mhz
/X
USB_PORT23
C C
For ESD
LAN_RXN
+3VSUS
LAN_TXN
B B
A A
LD10
5
6
IP4220CZ6
/X
5
34
2
1
LAN_RXP
LAN_RXN
LAN_RXP
LAN_TXN
LAN_TXP
E_GND
LAN_TXP
U_USBPP1
U_USBPN1
U_USBPP2
U_USBPN2
U_USBPP1
U_USBPP2
LRN1A
1 2
0OHM
1 4
3 4
0OHM
LRN1B
LRN2A
1 2
0OHM
1 4
3 4
0OHM
LRN2B
+5V_USB23_CON
LL3
90Ohm/100Mhz
/X
2 3
LL2
90Ohm/100Mhz
/X
2 3
4
5
6
LAN_RXN_R
LAN_RXP_R
LAN_TXN_R
LAN_TXP_R
For ESD
UD3
IP4220CZ6
/X
34
2
1
U_USBPN1
E_GND
U_USBPN2
+5V_USB
UF2
1 2
1.5A/6V
U_USBOC#1210
FGND
FOR
ǂǂ
+5V_USB23_CON
+5V_USB23
1 2
12
E_GND
1 2
1 2
12
+
UCE2
47UF/6.3V
c3528
E_GND
UL4
70Ohm/100Mhz
UR8
4.7KOhm
1%
N/A
UR10
8.25kOhm
LR2275OHM 1%
LR2175OHM 1%
21
12
+
LAN_TXP_R
LAN_TXN_R
LAN_RXP_R
LAN_RXN_R
U_USBPN1
UC2
0.1UF/16V
+5V_USB23_CON
E_GND
12
+
U_USBPP1
UCE3
47UF/6.3V
c3528
E_GND
12
UCE4
47UF/6.3V
c3528
N/A
Place the UCE4 between USB2 and USB3
LAN_CON
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
LAN_JACK_8P
12
UC3
0.1UF/16V
P_GND1
P_GND2
P_GND3
P_GND4
USB2
1 7
VBUS SIDE1
2
D-
P_GND1
3
D+
P_GND2
4
GND
SIDE2
USB_CON_1X4P
U_USBPN2
U_USBPP2
E_GND
9
10
11
12
E_GND
5
6
8
E_GND
USB3
1 7
VBUS SIDE1
2
P_GND1
D-
3
P_GND2
D+
4
SIDE2
GND
USB_CON_1X4P
LAN_RXN10
LAN_RXP10
LAN_TXN10
LAN_TXP10
FGND10,11
5
6
8
E_GND
12G13108004P
LAN_RXN
LAN_RXP
LAN_TXN
LAN_TXP
FGND
12G14861108K
<Core Design>
Title :
USB Port
1
Anndy_wang
of
312Friday, February 05, 2010
Rev
1.0
ASUSTEK COMPUTER INC
Size Project Name
A3
3
2
Date: Sheet
1015P_DAU_CARD
Engineer:
5
4
3
2
1
0.1E Beta
+5V_A
+5VS +5V_A
D D
C C
+5VS
AL2
21
70Ohm/100Mhz
l0805_h43
B B
AL124
N/A
21
70Ohm/100Mhz
Surges of PVDD >7V
duration 0.1ms when class
D amplifier is working
may damage the amplifier,
10uF tantalum capacitors
are required at PVDD1 and
PVDD2 to uppress the
surge.
+5VS_PVDD
12
APC13
10UF/6.3V
Place next to pin 39
P_GND
12
APC12
0.1UF/16V
Place next to pin 46
A_GND
APC15
10UF/6.3V
/X
A_OP_SD#10
A_Z_RST#
12
APC14
0.1UF/16V
12
For ALC269 VB PD# is +5V
LEVEL
APT1
TPC26T
1
12
APC8
10UF/6.3V
/269_VB
12
APC9
0.1UF/16V
/269_VA
Place next to pin 38
100KOHM 5%
/269_VB/X
1
2
AD1
12
AC5
0.1UF/16V
/269_VA
Place next to pin 25
A_DMIC_DATA7,11
A_DMIC_CLK7,11
A_Z_SDOUT10
A_Z_BITCLK10,11
A_Z_SDIN010
A_Z_SYNC10
A_Z_RST#10
speaker AMP.A_PD#
H
power down
L
power up
AR51
1 2
2
3
BAT54AW
sot323
/269_VA
S
G
AR50
1
1
0Ohm
AQ1
D
12
12
APC6
10UF/6.3V
/269_VB
3
32
2N7002
/269_VB
+5V_A+3VS_DVDD
A_PD#
1 2
/269_VB
+3VS_DVDD
1 2
1 2
AR1 33Ohm
AR52
10KOhm
1%
A_PD#
A_Z_SDIN0_R
APT2 TPC26T
12
AC33
10PF/50V
/X
GND
A_JD_MIC15
AR100Ohm
1
A_JD_HP5
A_PCBEEP
P_GND
AU1A
1
DVDD
2
GPIO0/DMIC_DATA
3
GPIO1/DMIC_CLK
4
PD#
5
SDATA_OUT
6
BCLK
7
DVSS
8
SDATA_IN
9
DVDD_IO
10
SYNC
11
RESET#
12
PCBEEP
ALC269Q-A5-GR
AR7 39.2KOhm 1%
1 2
AR8
1 2
20KOhm 1%
1
2
3 power
+5VS_PVDD
4847464544434241403938
49
GND
PVSS2
PVSS1
PVDD2
SPDIFO
SPK_OUT_R-
SPK_OUT_R+
EAPD/SPDIFO2
SenseA
LINE2_L
LINE2_R
MIC2_L
MIC2_R
SenseB
JDREF
1314151617181920212223
A_JDREF
A_SENSEA
AR5
20KOhm
1 2
1%
A_GND
47
463948
Digital plane
37
PVDD1
AVDD2
SPK_OUT_L-
SPK_OUT_L+
MONO_OUT
MIC1_L
MIC1_R
LINE1_L
24
plane
A_SPK_R+_R 5
A_SPK_R-_R 5
A_SPK_L-_R 5
A_SPK_L+_R 5
+5VS_PVDD
A_GND
AVSS2
CBP
CBN
CPVEE
HPOUT_R
HPOUT_L
CPVREF
MIC1_VREFO_R
MIC2_VREFO
MIC1_VREFO_L
VREF
AVSS1
AVDD1
LINE1_R
38
37
+5V_A
36
35
34
33
32
31
30
29
28
27
26
25
A_CBP
A_CBN
A_CPVEE
35
34
12
AC1
2.2UF/16V
c0603
X5R
MIC_VREFOUT_L
A_VREF
12
AC2
2.2UF/16V
c0603
X5R
+5V_A
A_LINE1_R 5
A_LINE1_L 5
A_MIC1_R 5
A_MIC1_L 5
A_Z_SDOUT10
A_Z_BITCLK10,11
A_Z_SDIN010
A_Z_SYNC10
A_Z_RST#10
A_OP_SD#10
A_HP_R 5
A_HP_L 5
A_BIAS_MIC1_R 5
LDO_CAP
AC3
0.1UF/16V
12
A_GND
AC4
10UF/6.3V
/X
12
Place next to pin 27
A_LINE1 for for
retasking
AU1B
50
GND1
51
GND2
52
GND3
53
GND4
54
GND5
55
GND6
56
GND7
57
GND8
P_GND
ALC269Q-A5-GR
Co-lay for 269_VB
+3VS
AL1
120Ohm/100Mhz
A A
l0603
+3VS_DVDD
21
12
APC3
10UF/6.3V
12
APC2
0.1UF/16V
12
APC5
10UF/6.3V
/X
12
APC4
0.1UF/16V
Place next to pin 9Place next to pin 1
GND
5
R1.5
4
MIC_VREFOUT_L
LDO_CAP A_BIAS_MIC1_L
AR4 0Ohm
1 2
1 2
1 2
/269_VB
AR2 0Ohm
/269_VA
AR3 0Ohm
/269_VA
AC6
1 2
10UF/6.3V /269_VB
A_BIAS_MIC1_L 5
A_GND
A_GND
3
10
11
12
26
25
Analog36plane
<Core Design>
23
22
132715
14
2
24
ASUSTEK COMPUTER INC
Size Project Name
A3
Date: Sheet
1015P_DAU_CARD
Title :
Engineer:
1
ALC269-1
Anndy_wang
of
412Friday, February 05, 2010
Rev
1.0
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