The PA12 is a state of the art high voltage, very high output
current operational amplifier designed to drive resistive, inductive and capacitive loads. For optimum linearity, especially at
low levels, the output stage is biased for class A/B operation
using a thermistor compensated base-emitter voltage multiplier circuit. The safe operating area (SOA) can be observed
for all operating conditions by selection of user programmable current limiting resistors. For continuous operation
under load, a heatsink of proper rating is recommended.
This hybrid integrated circuit utilizes thick film (cermet)
resistors, ceramic capacitors and semiconductor chips to
maximize reliability, minimize size and give top performance.
Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3
package is hermetically sealed and electrically isolated. The
use of compressible isolation washers voids the warranty.
EQUIVALENT SCHEMATIC
3
Q3
Q5
Q2A
Q6A
Q2B
Q6B
D1
Q1
Q4
4
A1
5
C1
6
POWER RATING
Not all vendors use the same method to rate the power
handling capability of a Power Op Amp. APEX rates the
internal dissipation, which is consistent with rating methods
used by transistor manufacturers and gives conservative
results. Rating delivered power is highly application dependent and therefore can be misleading. For example, the 125W
internal dissipation rating of the PA12 could be expressed as
an output rating of 250W for audio (sine wave) or as 440W if
using a single ended DC load. Please note that all vendors rate
maximum power using an infinite heatsink.
THERMAL STABILITY
APEX has eliminated the tendency of class A/B output
stages toward thermal runaway and thus has vastly increased
amplifier reliability. This feature, not found in most other Power
Op Amps, was pioneered by APEX in 1981 using thermistors
which assure a negative temperature coefficient in the quiescent current. The reliability benefits of this added circuitry far
outweigh the slight increase in component count.
OFFSET VOLTAGE, initialTC = 25°C±2±6±1±3mV
OFFSET VOLTAGE, vs. temperatureFull temperature range±10±65*±40µV/°C
OFFSET VOLTAGE, vs. supplyTC = 25°C±30±200**µV/V
OFFSET VOLTAGE, vs. powerTC = 25°C±20*µV/W
BIAS CURRENT, initialTC = 25°C±12±301020nA
BIAS CURRENT, vs. temperatureFull temperature range±50±500**pA/°C
BIAS CURRENT, vs. supplyTC = 25°C±10*pA/V
OFFSET CURRENT, initialTC = 25°C±12±30±5±10nA
OFFSET CURRENT, vs. temperatureFull temperature range±50*pA/°C
INPUT IMPEDANCE, DCTC = 25°C200*MΩ
INPUT CAPACITANCETC = 25°C3*pF
COMMON MODE VOLTAGE RANGE3Full temperature range±VS –5 ±VS –3**V
COMMON MODE REJECTION, DCFull temp. range, VCM = ±VS –6V74100**dB
GAIN
OPEN LOOP GAIN at 10HzTC = 25°C, 1KΩ load110*dB
OPEN LOOP GAIN at 10HzFull temp. range, 8Ω load96108**dB
GAIN BANDWIDTH PRODUCT @ 1MHz
POWER BANDWIDTHTC = 25°C, 8Ω load1320**kHz
PHASE MARGINFull temp. range, 8Ω load20*°
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
VOLTAGE SWING
CURRENT, peakTC = 25°C1015A
SETTLING TIME to .1%TC = 25°C, 2V step2*µs
SLEW RATETC = 25°C2.54**V/µs
CAPACITIVE LOADFull temperature range, AV = 11.5*nF
CAPACITIVE LOADFull temperature range, AV > 10SOA*
POWER SUPPLY
VOLTAGEFull temperature range±10±40±45**±50V
CURRENT, quiescentTC = 25°C2550**mA
THERMAL
RESISTANCE, AC, junction to case
RESISTANCE, DC, junction to caseTC = –55 to +125°C1.251.4**°C/W
RESISTANCE, junction to airTC = –55 to +125°C30*°C/W
TEMPERATURE RANGE, caseMeets full range specification–25+85–55+125°C
SUPPLY VOLTAGE, +Vs to –Vs100V
OUTPUT CURRENT, within SOA15A
POWER DISSIPATION, internal125W
INPUT VOLTAGE, differential±VS –3V
INPUT VOLTAGE, common mode±V
TEMPERATURE, pin solder -10s300°C
TEMPERATURE, junction
TEMPERATURE RANGE, storage–65 to +150°C
OPERATING TEMPERATURE RANGE, case–55 to +125°C
2, 5
1
PA12
MINTYPMAXMINTYPMAXUNITS
±VS –6*V
PA12/PA12A
S
200°C
PA12A
NOTES: *The specification of PA12A is identical to the specification for PA12 in applicable column to the left.
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
1.Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.
2.The power supply voltage for all tests is ±40, unless otherwise noted as a test condition.
3.+VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
4.Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
5.Full temperature range specifications are guaranteed but not 100% tested.
CAUTION
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
Please read Application Note 1, which covers stability, supplies,
heatsinking, mounting, current limit, SOA interpretation, and specification interpretation. Additional information can be found in the
application notes. For information on the package outline, heatsinks,
and mounting hardware, consult the “Accessory and Package
Mechanical Data” section of the handbook.
SAFE OPERATING AREA (SOA)
The output stage of most power amplifiers has three distinct
limitations:
These simplified limits may be exceeded with further analysis using the operating conditions for a specific application.
SHORT TO
1. The current handling capability of the transistor geometry and
the wire bonds.
2. The second breakdown effect which occurs whenever the
simultaneous collector current and collector-emitter voltage
exceeds specified limits.
3. The junction temperature of the output transistors.
The SOA curves combine the effect of all limits for this Power Op
15
10
THERMAL
SS
5.0
3.0
2.0
1.5
1.0
.7
.5
OUTPUT CURRENT FROM +V OR –V (A)
.3
1020 25 30 35 4050 60 70
1580 100
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE V –V (V)
T
= 25°C
C
T
= 85°C
C
T
= 125°C
C
SECOND BREAKDOWN
t = 1ms
t = 5ms
t = 0.5ms
steady state
SO
Amp. For a given application, the direction and magnitude of the
output current should be calculated or measured and checked
against the SOA curves. This is simple for resistive loads but more
complex for reactive and EMF generating loads. However, the
following guidelines may save extensive analytical efforts.
1. Capacitive and dynamic* inductive loads up to the following
maximum are safe with the current limits set as specified.
*If the inductive load is driven near steady state conditions, allowing the output
voltage to drop more than 8V below the supply rail with I
the supply rail with I
must be capacitively coupled or the current limit must be lowered to meet SOA
criteria.
= 5A while the amplifier is current limiting, the inductor
LIM
= 15A or 25V below
LIM
2. The amplifier can handle any EMF generating or reactive load
and short circuits to the supply rail or common if the current
limits are set as follows at T
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
Refer to Application Note 9, "Current Limiting", for details of both
fixed and foldover current limit operation. Visit the Apex web site
at www.apexmicrotech.com for a copy of the Power Design
spreadsheet (Excel) which plots current limits vs. steady state
SOA. Beware that current limit should be thought of as a +/–20%
function initially and varies about 2:1 over the range of –55°C to
125°C.
For fixed current limit, leave pin 7 open and use equations 1 and 2.
= 0.65/L
R
CL
= 0.65/R
I
CL
Where:
is the current limit in amperes.
I
CL
is the current limit resistor in ohms.
R
CL
For certain applications, foldover current limit adds a slope to
the current limit which allows more power to be delivered to the
load without violating the SOA. For maximum foldover slope,
ground pin 7 and use equations 3 and 4.
Where:
Vo is the output voltage in volts.
Most designers start with either equation 1 to set R
desired current at 0v out, or with equation 4 to set R
maximum output voltage. Equation 3 should then be used to plot
the resulting foldover limits on the SOA graph. If equation 3 results
in a negative current limit, foldover slope must be reduced. This
can happen when the output voltage is the opposite polarity of the
supply conducting the current.
In applications where a reduced foldover slope is desired, this
can be achieved by adding a resistor (R
ground. Use equations 4 and 5 with this new resistor in the circuit.
Where:
is in K ohms.
R
FO
CL
CL
0.65 + (Vo * 0.014)
=(3)
I
CL
R
CL
0.65 + (Vo * 0.014)
RCL =(4)
I
CL
) between pin 7 and
FO
0.65 + Vo * 0.14
I
10.14 + R
=(5)
CL
R
CL
FO
0.65 + Vo * 0.14
R
10.14 + R
=(6)
CL
I
CL
FO
CL
CL
for the
at the
(1)
(2)
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