The APW7057 is a 300kHz constant frequency voltage mode synchronous switching controller that drives
external N-channel MOSFETs. When the input supply drops close to output, the upper MOSFET remains
on, achieving 100% duty cycle. Internal loop compensation is optimized for fast transient response, eliminating external compensation network. The precision
0.8V reference makes this part suitable for a wide variety of low voltage applications. Soft start is internally
set to 2ms, limiting the input in-rush current and preventing the output from overshoot during powering up.
The APW7057 has over current and short circuit
protections. Over current protection is achieved by
monitoring the voltage drop across the high side
MOSFET, eliminating the need for a current sensing resistor and short circuit condition is detected
through the FB pin. If either fault conditions occur,
the APW7057 would initiate the soft start cycle. After
three cycles and if the fault condition persists, the
controller will be shut down. To restart the controller ,
either recycle the V
OSCSET pin below 1.25V.
The APW7057 can be shutdown by pulling the OCSET
pin below 1.25V. In shutdown, both gate drive signals
will be low. The controller is available in a small SOP8 package.
supply or momentarily pull the
CC
••
• Memory Supplies
••
••
• 5V Input DC-DC Regulators
••
••
• Distributed Power Supplies
••
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Q1: APM2014N U C
Q2: APM2014N U C
Q3: APM2300A A C
7
6
OCSET
APW 7057
FB
C3
1uF
5
VCC
BOOT
UGATE
PHASE
U1
LGATE
GND
3
C2: 1000uF/10V, ESR = 25m
C5: 1000uF/6.3V, ESR = 25m
1
2
8
4
1N4148
.ECKH/Figure 2.
2.2
D1
C4
0.1uF
R2
2.4k
V
IN
+
C2
1000uF x2
Q1
L1
3.3uH
C1
1uF
+
Q2
R1
5.1k
C6
0.1uF
Ω
Ω
+5V
C5
1000uF x2
V
OUT
+2.5V/10A
Absolute Maximum Ratings
SymbolParameterRatingUnit
CC
V
V
BOOT
VCC Supply Voltage (VCC to GND)-0.3 ~ 7V
BOO T S upply Voltage (BOOT to GN D )-0.3 ~ 15V
PHAS E , OC S ET to GND Input Voltage-0.3 ~ 12V
FB to GN D In p u t Volta ge-0.3 ~ VCC+0.3V
Maximum Junction Tem perature125
STG
T
SDR
T
ESD
V
Storage Temperature-65 ~ 150
Maximum Soldering Temperature, 10 Seconds300
Minim um ESD Rating
This pin provides the supply voltage to the high side
MOSFET driver. A voltage no greater than 13V can
be connected to this pin as a supply to the driver.
For driving logic level N-channel MOSEFT, a bootstrap circuit can be use to create a suitable driver’s
supply.
UGATE (Pin 2)
This pin provides gate drive for the high-side
MOSFET.
GND (Pin 3)
Signal and power ground for the IC. All voltage levels are measured with respect to this pin. Tie this
pin to the ground plane through the lowest impedance connection available.
This pin provides the gate drive signal for the low
side MOSFET.
VCC (Pin 5)
This is the main bias supply for the controller and
its low side MOSFET driver. Must be closely
decoupled to GND (Pin 3). DO NOT apply a
voltage greater than 5.5V to this pin.
FB (Pin 6)
This pin is the inverting input of the error amplifier
and it receives the feedback voltage from an exter-
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