ANPEC APW7026-12KC-TU, APW7026-12KC-TR Datasheet

APW7026

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ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.

Advanced PWM and Dual Linear Power Control

Applications

Pin Description

UGATE1

VCC

UGATE2

PHA SE2

PG OOD

OCSET 2

FB2

FAULT/RT

PHA SE1

LGATE1

PG ND

OCSET 1

VSE N1

FB1

FB3

GAT E

GND

V3.3

•

VGA Card Power Regulation

Features

••

•

3 Regulated Voltage are provided

••

• SYNC Switching Power for VTT(1.25V)

••

• ASYNC Switching Power for NVVDD(2.05V)

••

• Linear Regulator for FBVDDQ(2.5V)

••

•

Simple Single-Loop Control Design

••

• Voltage-Mode PWM Control

••

•

Excellent Output Voltage Regulation

••

• VTT Output: ±1% Over Temperature

••

• NVVDD Output: ±2% Over Temperature

••

• FBVDDQ Output:±2.5% Over Temperature

••

• Fast Transient Response

••

• On-Chip Feedback Compensation

••

• Full 0% to 100% Duty Ratio

••

• Power-Good Output Voltage Monitor

••

• Over-Voltage and Over-Current Fault Monitors

••

• Small Converter Size

••

• Constant Frequency Operation(200kHz)

••

• Programmable Oscillator from 50kHz to

800KHz

••

• Reduce External Component Count

General Description

The APW7026 Provides the power control and protection for three output voltages in VGA Card applications. It integrates two PWM controllers, one linear controller as well as the monitoring and protection functions into a single package. One PWM controller (PWM1) regulates the termination voltage VTT(1.25V) with a synchronous-rectified buck converter. The second PWM controller (PWM2) supplies the Core power NVVDD ( 2.05V ) with a standard buck converter . The linear controller regulates 2.5V power for FBVDDQ.

The APW7026 can monitor all the output voltages (VTT ,NVVDD,FBVDDQ) and a single power good signal is issued when the VTT is within ± 10% of the reference voltage (VREF1) and the other levels are above its lower power good threshold voltage. Additional built-in overvoltage protection (OVP) will be started when the VTT output is above 118% of the VREF1.The OVP function will shutdown the upper MOSFET and turn on the lower MOSFET until the over-voltage is disappeared. The PWM controllers over-current function monitors the output current by sensing the voltage drop across the upper MOSFET rDS(ON), eliminating the need for a current sensing resistor.

APW7026

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Block Diagram

Absolute Maximum Ratings

Ordering information

Symbol Parameter Rating Unit

VCC Supply Voltage 15 V

VI , V

Input , Output or I/O Voltage GND -0.3 V to VCC +0.3 V

Operating Ambient Temperature Range 0 to 70

Junction Temperature Range 0 to 125

STG

Storage Temperature Range -65 to +150

Soldering Temperature 300 ,10 seconds

APW7026

Voltage Code 12 : 1.2 5V Package Code K : SOP - 2 0 Te m p. R a ng e C : 0 to 70

C Handling Code TU : Tu be TR : Tape & Ree l

Handling Code

Te m p. R a ng e

Package Code

Voltage Code

GATE

CONTROL

SOFT-START

AND FAULT

LOGIC

THERMAL

PROTECTION

GATE

CONTROL

POWER-ON

RESET

FB3

GATE

OCSET2

UGATE2

PHASE2

FB2

V3.3

GND

PGND

LGATE1

PHASE1

UGATE1

PGOOD

V5VCCOCSET1VSEN1

FB1SSFAULT/RT

0.3V

4-.!

1.26V

200uA

VCC

DRIVE2 OC2

INHIBIT

PWM2

4-.

2.0V

ERROR

AMP2

2.5V 4.1V

OSCILLATOR

23K

4.6V

4-.

ERROR

AMP1

FAULT

OC1

PWM1

VCC

LOW ER

DRIVE

VCC

DRIVE1

INHIBIT

118%

90%

110%

200uA

LUV

APW7026

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Electrical Characteristics

Thermal Characteristics

Symbol Parameter Value Unit

Thermal Resistance in Free Air SOIC

SOIC (with 3in

of Copper)

1. Recommended operating conditions, Unless otherwise noted.

2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.

APW7026 Unit

Symbol Parameter Test Conditions

Min Typ Max

SUPPLY CURRENT

Nominal Supply Current

UGATE1, LGATE1, UGATE2, and GATE Open

6mA

POWER-ON RESET

Rising VCC Threshold 9.5 10.4 V

Falling VCC Threshold 8.2 9.0 V

Rising V5 Threshold 4.4 4.7 V

Falling V5 Threshold 3.7 4.0 V

OSCILLATOR

OSC

Free Running Frequency RT = Open 185 200 215 kHz

∆

OSC

Ramp Amplitude RT = Open 1.9 V

PWM CONTROLLER REFERENCE VOLTAGE

REF1

SYNC PWM Controller Reference Volta ge

1.25 V

REF1

Accuracy -1 +1 %

REF2

ASYNC PWM Controller Reference Volta ge

2.0 V

REF2

Accuracy -2 +2 %

LINEAR CONTROLLER

REF3

Reference Voltage GATE=FB3 1.26 V

REF3

Accuracy -2.5 +2.5 %

GATE Drive Current V

GATE

=4V 20 50 mA

PWM CONTROLLERS GATE DRIVERS

UGATE

UGATE1,2 Source VCC = 12V, V

UGATE1



(or V

UGATE2



) = 6V 1.0 A

UGATE

UGATE1,2 Sink VCC = 12V, V

UGATE1



(or V

UGATE2



) = 1V 2.2 3.5

Ω

LGATE

LGATE1 Source VCC = 12V, V

LGATE1



= 1V 1.0

LGATE

LGATE1 Sink VCC = 12V, V

LGATE1



= 1V 1.6 3.0

Ω

APW7026

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Electrical Characteristics Cont.

Functional Pin Description

1. Recommended operating conditions, Unless otherwise noted.

2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.

AP W 7026 Unit

Sym bol Param eter Test Conditions

Min Typ Max

PROTECTION

V S E N 1 O .V. tr ip p o int (V S E N 1/V

REF1

)

VSEN 1 Rising

118 %

VSEN1 O.V. Hysteresis 2%

V 3 .3 O .V. trip p o in t V 3 .3 R is in g 4 .1 V

V 3 .3 O .V. H y s te re s is 0.1 V

OVP

FAULT Souring Current V

FAU LT/RT

= 2.0V 25 m A

O C S E T 1 ,2 C urre n t S o urc e Vo cse t = 4.5V 170 200 230 uA

Pull up resistor to 5V 23

Ω

POWER GOOD

VSEN1 Upper Threshold

(V S E N 1/V

REF1

)

VSEN1 Rising 110 %

VSEN 1 Lower Threshold VSEN 1 Rising 94 %

VSEN 1 PG D Hysteresis Upper/Lower Threshold 2 %

V 3 .3 L ow er T h re s h o ld V 3 .3 R is in g 2.5 V

V 3 .3 P G D H ys te re s is 0.1 V

FB3 Lower Threshold V

FB3

R is in g 1 .0 V

FB3 PG D Hysteresis 0.1 V

PGOOD

PGOOD Voltage Low l

PGOOD

= -4 m A 0 .8 V

UGATE1 (Pin 1)

Connect UGATE1 pin to the SYNC PWM Converters

upper MOSFET gate .This pin provides the gate drive

for the upper MOSFET.

VCC (Pin 2)

Provide a + 12V bias supply for the IC to this pin . This

pin also provides the gate bias charge for all the

MOSFETs controlled by the IC. The voltage at this pin is

monitored for Power-On Reset (POR) purpose.

UGATE2 (Pin 3)

Connect UGATE2 pin to the ASYNC PWM converters

MOSFET gate . This pin provides the gate drive for the

MOSFET.

PHASE2 (Pin 4)

Connect the PHASE2 pin to the ASYNC PWM

converters MOSFET source. This pin is used to monitor

the voltage drop across the MOSFET for over-current

protection.

PGOOD (Pin 5)

PGOOD is an open drain output used to indicate the

status of the output voltages. This pin is pulled low when

the SYNC PWM regulator output is not within ± 10%

of the reference voltage (V

REF1

) or when V3.3 or V

FB3

below its lower power good threshold.

OCSET2 (Pin 6)

Connect a resistor (R

OCSET

) from this pin to the drain of

the ASYNC PWM converters MOSFET . R

OCSET

, an

internal 200

µA current source (I

OCSET

) , and the

MOSFETs on-resistance (r

DS(ON)

) set the converters

over-current (OC) trip point according to the following

equation:

PEAK

An over-current trip cycles the soft-start function.

FB2 (Pin 7)

Connect this pin to the output of the ASYNC PWM

converter . The voltage at this pin is regulated to the

reference voltage V

REF2

. A resistor driver is connected

from this pin to V

OUT2(ROUT2

) and to GND(R

GND2

) that sets

the output voltage as the following equation :

OCSET

N 4

OCS ET

DS(ON)

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