ANALOG DEVICES OP 400 GPZ Datasheet

Operational Amplifier
OP400
Rev. H Document Feedback
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OUT A
1
–IN A
2
+IN A
3
V+
4
OUT D –IN D +IN D V–
14 13 12 11
+IN B
5
–IN B
6
OUT B
7
+IN C –IN C OUT C
10
9 8
00304-001
OP400
+
+
+
+
OUTA
1
–IN A
2
+IN A
3
V+
4
OUT D –IN D +IN D V–
16 15 14 13
+IN B
5
–IN B
6
OUT B
7
+IN C –IN C OUT C
12 1
1
10
NC
8
NC
9
00304-002
OP400
NC = NO CONNECT
+
+
+
+
Suffix)
VOLTAGE
LIMITING
NETWORK
+IN –IN
V–
OUT
V+
BIAS
00304-003
Data Sheet

FEATURES

Low input offset voltage: 150 µV maximum Low offset voltage drift over –55°C to +125°C: 1.2 μV/°C
maximum Low supply current (per amplifier): 725 µA maximum High open-loop gain: 5000 V/mV minimum Input bias current: 3 nA maximum Low noise voltage density: 11 nV/√Hz at 1 kHz Stable with large capacitive loads: 10 nF typical Available in die form

GENERAL DESCRIPTION

The OP400 is the first monolithic quad operational amplifier that features OP77-type performance. Precision performance is not sacrificed with the OP400 to obtain the space and cost savings offered by quad amplifiers.
The OP400 features an extremely low input offset voltage of less than 150 µV with a drift of less than 1.2 µV/°C, guaranteed over the full military temperature range. Open-loop gain of the OP400 is more than 5 million into a 10 kΩ load, input bias current is less than 3 nA, CMR is more than 120 dB, and PSRR is less than 1.8 µV/V. On-chip Zener zap trimming is used to achieve the low input offset voltage of the OP400 and eliminates the need for offset nulling. The OP400 conforms to the industry­standard quad pinout, which does not have null terminals.
Quad Low Offset, Low Power
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. 14-Pin Ceramic DIP (Y-
and 14-Pin Plastic DIP (P-Suffix)
The OP400 features low power consumption, drawing less than 725 µA per amplifier. The total current drawn by this quad amplifier is less than that of a single OP07, yet the OP400 offers significant improvements over this industry-standard op amp. Voltage noise density of the OP400 is a low 11 nV/√Hz at 10 Hz, half that of most competitive devices.
The OP400 is an ideal choice for applications requiring multiple precision operational amplifiers and where low power consumption is critical.
Figure 2. 16-Pin SOIC (S-Suffix)
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved.
OP400* Product Page Quick Links
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Documentation
Application Notes
• AN-256: Accurately Testing Op Amp Settling Times
• AN-357: Operational Integrators
• AN-649: Using the Analog Devices Active Filter Design Tool
Data Sheet
• OP400: Quad Low Offset, Low Power Operational Amplifier Data Sheet
• OP400: Military Data Sheet
Tools and Simulations
• OP400 SPICE Macro-Model
Last Content Update: 08/30/2016
Reference Materials
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• OP400 Material Declaration
• PCN-PDN Information
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OP400 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5

REVISION HISTORY

1/13—Rev. G to Rev. H
Changes to Features Section and General Description Section ........ 1
Changes to Ordering Guide ........................................................... 15
2/11—Rev. F to Rev. G
Added S Package to Storage Temperature Range in Table 4 ....... 5
Updated Outline Dimensions ....................................................... 15
12/08—Rev. E to Rev. F
Added New Figure 28, Renumbered Sequentially ..................... 10
Updated Outline Dimensions ....................................................... 15
1/07—Rev. D to Rev. E
Updated Format .................................................................. Universal
Changes to Figure 1 and Figure 2 ................................................... 1
Removed Figure 4 ............................................................................. 4
Changes to Table 3 ............................................................................ 4
Changes to Figure 16 through Figure 19, Figure 21 .................... 8
Changes to Figure 27 ........................................................................ 9
Changes to Figure 28 ...................................................................... 10
Changes to Figure 33 ...................................................................... 13
Updated Outline Dimensions ....................................................... 14
3/06—Rev. C to Rev. D
Updated Format .................................................................. Universal
Deleted Wafer Test Limits Table ..................................................... 4
New Package Drawing: R-14 ......................................................... 15
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
Typical Performance Characteristics ..............................................6
Applications ..................................................................................... 11
Dual Low Power Instrumentation Amplifier ......................... 11
Bipolar Current Transmitter ..................................................... 12
Differential Output Instrumentation Amplifier .................... 12
Multiple Output Tracking Voltage Reference ......................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 15
SMD Parts and Equivalents ...................................................... 15
6/03—Rev. B to Rev. C
Edits to Specifications ....................................................................... 2
10/02—Rev. A to Rev. B
Addition of Absolute Maximum Ratings ....................................... 5
Edits to Outline Dimensions......................................................... 12
4/02—Rev. 0 to Rev. A
Edits to Features................................................................................. 1
Edits to Ordering Information ........................................................ 1
Edits to Pin Connections .................................................................. 1
Edits to General Descriptions ..................................................... 1, 2
Edits to Package Type ....................................................................... 2
Rev. H | Page 2 of 16
Data Sheet OP400
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Input Offset Voltage
VOS
40
150 60
230 80
300
µV
Input Capacitance
C
3.2
3.2
3.2 pF
Power Supply Rejection
PSRR
VS = 3 V to 18 V
0.1
1.8 0.1
3.2 0.2
5.6
µV/V

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

@ VS = ±15 V, TA = +25°C, unless otherwise noted.
Table 1.
OP400A/E OP400F OP400G/H
Long-Term Input
0.1 0.1 0.1 µV/mo
Voltage Stability Input Offset Current IOS VCM = 0 V 0.1 1.0 0.1 2.0 0.1 3.5 nA Input Bias Current IB VCM = 0 V 0.75 3.0 0.75 6.0 0.75 7.0 nA Input Noise Voltage e Input Resistance
0.1 Hz to 10 Hz 0.5 0.5 0.5 µV p-p
n p-p
RIN 10 10 10
Differential Mode Input Resistance
R
200 200 200
INCM
Common Mode Large Signal Voltage
AVO VO = ±10 V
Gain
RL = 10 kΩ 5000 12,000 3000 7000 3000 7000 V/mV RL = 2 kΩ 2000 3500 1500 3000 1500 3000 V/mV
Input Voltage Range1 IVR ±12 ±13 ±12 ±13 ±12 ±13 V Common-Mode
CMR VCM = 12 V 120 140 115 140 110 135 dB
Rejection
IN
OUTPUT CHARACTERISTICS
Output Voltage Swing VO RL = 10 kΩ ±12 ±12.6 ±12 ±12.6 ±12 ±12.6 V
POWER SUPPLY
Ratio Supply Current per
ISY No load 600 725 600 725 600 725 µA
Amplifier
DYNAMIC PERFORMANCE
Slew Rate SR 0.1 0.15 0.1 0.15 0.1 0.15 V/µs Gain Bandwidth
GBWP AV = 1 500 500 500 kHz
Product Channel Separation CS VO = 20 V p-p, 123 135 123 135 123 135 dB fO = 10 Hz2 Capacitive Load
Stability
AV = 1,
no oscillations
10 10 10 nF
NOISE PERFORMANCE
Input Noise Voltage en fO = 10 Hz3 22 36 22 36 22 nV/√Hz
Density3 fO = 1000 Hz3 11 18 11 18 11 nV/√Hz Input Noise Current i Input Noise Current
0.1 Hz to 10 Hz 15 15 15 pA p-p
n p-p
in fO = 10 Hz 0.6 0.6 0.6 pA/√Hz
Density
1
Guaranteed by CMR test.
2
Guaranteed but not 100% tested.
3
Sample tested.
Rev. H | Page 3 of 16
OP400 Data Sheet
Input Offset Current
IOS
VCM = 0 V
0.1
2.5
nA
Common-Mode Rejection
CMR
VCM = ±12 V
115
130
dB
H grade
1.0
20.0
nA
DYNAMIC PERFORMANCE
@ VS = ±15 V, −55°C ≤ TA ≤ +125°C for OP400A, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage VOS 70 270 µV Average Input Offset Voltage Drift TCVOS 0.3 1.2 µV/°C
Input Bias Current IB VCM = 0 V 1.3 5.0 nA Large Signal Voltage Gain AVO VO = ±10 V, RL = 10 kΩ 3000 9000 V/mV RL = 2 kΩ 1000 2300 Input Voltage Range1 IVR ±12 ±12.5 V
OUTPUT CHARACTERISTICS
Output Voltage Swing VO RL = 10 kΩ ±12 ±12.4
POWER SUPPLY
Power Supply Rejection Ratio PSRR VO = 3 V to 18 V 0.2 3.2 µV/V Supply Current per Amplifier ISY No load 600 775 µA
DYNAMIC PERFORMANCE
Capacitive Load Stability AV = 1, no oscillations 8 nF
1
Guaranteed by CMR test.
@ V
= ±15 V, −25°C ≤ TA ≤ +85°C for OP400E/F, 0°C ≤ TA ≤ 70°C for OP400G, −40°C ≤ TA ≤ +85°C for OP400H, unless otherwise noted.
S
Table 3.
OP400E OP400F OP400G/H Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage VOS 60 220 80 350 110 400 µV Average Input Offset
TCVOS 0.3 1.2 0.3 2.0 0.6 2.5 µV/°C
Voltage Drift Input Offset Current IOS VCM = 0 V E, F, G grades 0.1 2.5 0.1 3.5 0.2 6.0 nA H grade 0.2 12.0 nA Input Bias Current IB VCM = 0 V E, F, G grades 0.9 5.0 0.9 10.0 1.0 12.0 nA
Large-Signal Voltage Gain AVO VCM = 0 V RL = 10 kΩ 3000 10,000 2000 5000 2000 5000 V/mV RL = 2 kΩ 1500 2700 1000 2000 1000 2000 V/mV Input Voltage Range1 IVR ±12 ±12.5 ±12 ±12.5 ±12 ±12.5 V Common-Mode Rejection CMR VCM = ±12 V 115 135 110 135 105 130 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing VO RL = 10 kΩ ±12 ±12.4 ±12 ±12.4 ±12 ±12.6 V
RL = 2 kΩ ±11 ±12 ±11 ±12 ±11 ±12.2 V POWER SUPPLY
Power Supply Rejection
Ratio
Supply Current per
PSRR VS = ±3 V to
0.15 3.2 0.15 5.6 0.3 10.0 µV/V
±18 V
ISY No load 600 775 600 775 600 775 µA
Amplifier
Capacitive Load Stability No oscillations 10 10 10 nF
1
Guaranteed by CMR test.
Rev. H | Page 4 of 16
Data Sheet OP400
Junction Temperature (TJ) Range
−65°C to +150°C
OP400H
−40°C to +85°C

ABSOLUTE MAXIMUM RATINGS

Table 4.
Parameter Rating
Supply Voltage ±20 V
Differential Input Voltage ±30 V
Input Voltage Supply voltage
Output Short-Circuit Duration Continuous
Storage Temperature Range
P, Y, S Packages −65°C to +150°C
Lead Temperature (Soldering 60 sec) 300°C
Operating Temperature Range
OP400A −55°C to +125°C OP400E, OP400F −25°C to +85°C OP400G 0°C to 70°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply to both dice and packaged
parts, unless otherwise noted.

THERMAL RESISTANCE

θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for CERDIP and PDIP packages; θ
is specified for device soldered to printed circuit board for
JA
SOIC package.
Table 5. Thermal Resistance
Package Type θJA θJC Unit
14-Pin Ceramic DIP (Y) 94 10 °C/W 14-Pin Plastic DIP (P) 76 33 °C/W 16-Pin SOIC (S) 88 23 °C/W

ESD CAUTION

Rev. H | Page 5 of 16
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