ANALOG DEVICES EE-286 Service Manual

Engineer-to-Engineer Note EE-286

and development tools

21369

SHARC processors. Fourth

214xx)

Techn ical notes on usin g Analog Devices DSPs, pro cessors

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Interfacing SDRAM Memories to SHARC® Processors

Contributed by Aseem V., J. Je gade esan and D. Venkat araman Rev 5 – November 22, 2010

Introduction

Third and fourth generation high-end SHARC® processors have been specifically designed to simplify
product development, speed up time to market, and reduce pr oduct costs for a variety of audio applications
including audio/video receivers (AVRs), prof essiona l mixing cons oles, a nd digi tal syn th esizers .

In this EE-note, third generation refers to ADSP-21367, ADSP-21368, ADSP-



These processor s, permit gl ue le ss interface to various SDRAM memories available, and allow embedded
audio designers to take advantage of the most cost-effective memory technology. The result is lower
overall system costs for applications that require lo ts o f memo r y to s t or e lar ge amo un t of audio data such
as lip sync and delay lines. These SHARC processors help audio pro duct manufacturers r each the market
with new, validated and tested, high-performance products at an unprecedented speed and with lower
system costs.

(hereafter referred to as ADSP-21368), and ADSP-2137x
generation refers to ADSP-2147x, and ADSP-2148x (hereafter referred to as ADSP­SHARC processors.

This EE-Note discusses the SDRAM interface of the above mentioned devices, and differences between the
SDRAM controllers (SDCs) on these processors. It also describes the shared memory feature, uniquely
supported by ADSP-21368 processors. Furthermore, it discusses execution from external SDRAM on
ADSP-2137x, and ADSP-214xx processors. Example code is provided in the associated .ZIP file. Finally,
the EE-note also discusses SDRAM throughput opt imization guidelines.

The SDRAM memories used in this particular document are MT48LC4M32B2, MT48LC8M16A2 and
MT48LC16M16A2 from Micron Technology. Note that other SDRAM memories may be used as well.

External Port and SDRAM Controller (SDC)

The ADSP-21368, ADSP-2137x, a nd AD SP-214xx external port supports asynchronous memory devices
like SRAM and flash, as well as synchronous memory devices like SDRAM. These processors have a
dedicated on-chip programmable SDRAM controller (SDC), allowing a glueless interface to a variety of
SDRAM memory devices.

The SDC supports a glueless interface with any standard SDRAM (32-Mbit , 64-Mbit, 128-Mbit, 256-Mbit,
and 512-Mbit) with x4, x8, x16, and x32 configurations for AD SP-21368 and ADSP-2137x processors,
with x4, x8, x16 for AD SP-214xx pro c essors. T he SDC can suppor t up to 254 Mwords o f SDRAM in four

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