Analog Devices EE199 Application Notes

Engineer To Engineer Note EE-199

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Technical Notes on using Analog Devices' DSP components and development tools

Contact our technical support by phone: (800) ANALOG-D or e-mail: [e-mail]
Or visit our on-line resources http://www.analog.com/dsp and http://www.analog.com/dsp/EZAnswers

Link Port Booting the ADSP-21161 SHARC® DSP

Contributed by Andrew Caldwell August 19, 2003

Introduction

The following engineer note will discuss the
steps required in order to successfully link boot
one slave ADSP-21161 SHARC® DSP from
another master ADSP-21161 DSP. We will
discuss the link boot process from both the
perspective of the master device and the slave.

There are four possible boot modes: EPROM,
Host, SPI, and Link Booting. This application
note will go into detail about the complications
that must be considered when performing a link
port boot, the link port kernel and how to use the
loader utility to create a bootable file. Example
code is included in the note itself as well as being
provided in the accompanying zip file
(EE199.zip). The example consists of code for
the master ADSP-21161 SHARC DSP that will
transfer the boot code to a slave ADSP-21161
SHARC DSP through the link ports, the link port
boot kernel executed on the slave device being
booted and a simple blink program that is
executed after the boot kernel.

This engineer note briefly describes the various
booting methods for the ADSP-21161 and how
to configure a slave device for link port booting.
The reader is introduced to the loader utility and
link kernels and how these are used by the
VisualDSP++™ IDDE to create a file suitable
for booting an ADSP-21161 SHARC DSP
through the link port. This is followed by a
description of the actual booting process and
how the slave device uses the boot kernel to
bring the core into a state in which it is ready to

receive the actual program to be booted. Some
hardware issues associated with link port booting
and how to accommodate for these issues in
software are then described. Finally the reader is
taken through a step-by-step example of link port
booting one ADSP-21161 DSP from another and
is introduced to the techniques used to debug a
link port boot problem. This section includes
fully documented code.

VisualDSP++™ Tools Required

This engineer note and the accompanying
projects included in EE199.zip were developed
and tested for VisualDSP++ 3.0 for the SHARC
family with Service Pack 1 installed. The loader
utility used to create the loader files was:

ADSP-21100 Family Loader version 2.0.3.18

If you have an earlier version of the loader utility
then please make sure you have the correct
version of VisualDSP++ installed as detailed
above and you have downloaded and installed
the following file from our ftp site at

ftp://ftp.analog.com/pub/tools/patches

sharcloader_4.1.3.11_and_hhloader_2.0.3.18_a
nd_sharcloaderpropertypage_1.2.4.1_and_21161
loaderpropertypage_1.0.1.6.zip

Also make sure you read the accompanying
release note:

sharcloader_4.1.3.11_and_hhloader_2.0.3.18_a
nd_sharcloaderpropertypage_1.2.4.1_and_21161
loaderpropertypage_1.0.1.6_ReleaseNote.doc

Copyright 2003, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of
customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property
of their respective holders. Information furnished by Analog Devices Applications and Development Tools Engineers is believed to be accurate and reliable, however
no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices’ Engineer-to-Engineer Notes.

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Contents

Introduction.................................................................................................................................................... 1

VisualDSP++™ Tools Required .................................................................................................................. 1

Contents ......................................................................................................................................................... 2

List of Figures................................................................................................................................................ 3

ADSP-21161 Booting Methods ..................................................................................................................... 4

Loader Kernel and Loader Utility.................................................................................................................. 4

Loader file format .......................................................................................................................................... 5

Understanding the contents of the loader file ................................................................................................ 6

Link port boot kernel structure ...................................................................................................................... 9

Link Port Booting Process ........................................................................................................................... 10

Hardware Considerations............................................................................................................................. 12

Debugging Guidelines ................................................................................................................................. 12

Setting up the VisualDSP++ Configurator .............................................................................................. 12

Creating a boot kernel for debug purposes .............................................................................................. 15

Debugging the boot process..................................................................................................................... 16

Step 1: Open up VisualDSP++ IDDE.................................................................................................. 16

Step 2: Setting up the VisualDSP++ Environment.............................................................................. 16

Step 3: Setup Breakpoints.................................................................................................................... 18

Step 4: Starting the debug process....................................................................................................... 18

Step 5: Analyzing the registers ............................................................................................................ 18

References.................................................................................................................................................... 30

Document History........................................................................................................................................ 30

Appendix 1: Blink_Example Source code................................................................................................... 26

Appendix 2: Master Source Code................................................................................................................ 28

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 2 of 30

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List of Figures

Figure 1 Elfloader Operation ......................................................................................................................... 5

Figure 2 Loader Utility Options..................................................................................................................... 5

Figure 3 Loader File Formats ........................................................................................................................ 6

Figure 4 16-bit Include file format ................................................................................................................ 7

Figure 5 Tag and control words..................................................................................................................... 7

Figure 6 Link Port kernel functions and locations......................................................................................... 9

Figure 7 DMA Channel 8 reset values......................................................................................................... 10

Figure 8: DMA Channel 8 setup in final_init .............................................................................................. 11

Figure 9: VisualDSP++ Configurator.......................................................................................................... 13

Figure 10: Platform Properties..................................................................................................................... 14

Figure 11: Device Properties ....................................................................................................................... 14

Figure 12: Loader Utility ............................................................................................................................. 15

Figure 13: New session and session list....................................................................................................... 16

Figure 14: VisualDSP++ IDDE Setup immediately after opening the kernel debug session ..................... 17

Figure 15: VisualDSP++ IDDE after environment setup and symbol load................................................. 17

Figure 16: Breakpoint location within kernel.............................................................................................. 18

Figure 17: Register contents showing tag number....................................................................................... 18

Figure 18: Register contents showing address and word count................................................................... 19

Figure 19: Register contents showing first instruction ................................................................................ 19

Figure 20: 16-bit data initialization ............................................................................................................. 20

Figure 21: 16-bit data zero initialization ..................................................................................................... 20

Figure 22: 32-bit data initialization ............................................................................................................. 20

Figure 23: 32-bit data zero initialization ..................................................................................................... 21

Figure 24: 40-bit data initialization ............................................................................................................. 21

Figure 25: 40-bit data zero initialization ..................................................................................................... 21

Figure 26: 64-bit data initialization ............................................................................................................. 22

Figure 27: 64-bit data zero initialization ..................................................................................................... 22

Figure 28: Final Init ..................................................................................................................................... 22

Figure 29: Alteration to Reset interrupt Vector for debugging purposes .................................................... 23

Figure 30: Assemble options for additional debug...................................................................................... 24

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 3 of 30

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ADSP-21161 Booting Methods

There are four booting methods possible on the
ADSP-21161 SHARC DSP. These are EPROM,
host, SPI, and link port booting. Booting is the
method of taking data and application code into
the processor so it may then begin instruction
execution. EPROM booting is achieved by
reading data from the EPROM through the
external port. Host booting is also achieved
through the external port although DMA (Direct
Memory Access) configuration is slightly
different to that when EPROM boot method is
selected. For more information on these two
booting methods please refer to pages 6-74
through 6-80 of [1]. SPI booting is achieved
when the ADSP-21161 is configured for SPI
boot mode, in this mode the DSP receives 8-bit,
16-bit or 32-bit wide data through the SPI
receive buffer. Refer to pages 11-36 through 11­46 of [1] for further details. Finally we have link
port booting. This is achieved by reading 4-bit
wide data through link buffer 0. This data may
come from another DSPs link port such as a
member of the SHARC family, an ADSP-21160
or another ADSP-21161. The data could also
come from an external device such as an FPGA,
as long as data is provided in 4 bit widths and the
external device provides a clock signal to the
link port assigned to link buffer 0. There is also a
no boot mode; in this mode the DSP begins
executing instructions from external memory.

The various booting modes are configured in
hardware. The ADSP-21161 samples three pins
during reset, these three pins are: EBOOT,
LBOOT, and /BMS. For the ADSP-21161 EZ­KIT Lite these pins may be configured through
JP20 which is labeled “Boot Mode”. Table 1
shows the various boot modes and the
configuration required for each of the EBOOT,
LBOOT and /BMS pins for the DSP to boot via
that method.

EBOOT LBOOT /BMS Booting Mode

1 0 1 (Output) EPROM

0 0 1 (Input) Host Processor

0 1 0 (Input) Serial Boot

(SPI)

0 1 1 (Input) Link Port

0 0 0 (Input) No Boot

1 1 X (Input) Reserved

Table 1 Boot Mode pin configuration

On initial power up or after a hardware/software
reset, the ADSP-21161 is automatically
configured for a 256 Word DMA through the
external port, SPI port or link port. For the ‘No
Boot’ configuration the DSP core starts
executing code directly from external memory
and no DMA is required. This 256 word DMA is
used to load the boot kernel into the DSP
memory. This kernel serves as a loading routine
for the application.

Loader Kernel and Loader Utility

The loader utility (elfloader.exe) generates boot­loadable files for the ADSP-21161 by processing
the executable files. The output of the loader
utility is a boot-loadable file with a “.LDR”
extension.

The loader utility allows the user to choose
various options such as the boot type (Prom,
Host, Link, SPI), boot kernel file, and the type of
file format (hex, ASCII, binary or include). All
this information is located under the “Load” tab
of the project options window in the
VisualDSP++ 3.0 environment as shown in
Figure 2.

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 4 of 30

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Loader Kernel

(.dxe)

Loader options

Figure 1 Elfloader Operation

Elfloader.exe

Loader file

(.ldr)

DSP 6

DSP 5

Executable

Executable

(.dxe)

(.dxe)

DSP 4

DSP 3

Executable

Executable

(.dxe)

(.dxe)

DSP 2

Executable

Executable

(.dxe)

DSP 0

Executable

(.dxe)

DSP 1

(.dxe)

There are four types of loader kernel to choose
from depending on whether host boot, SPI boot,
EPROM boot and link boot is being used. After
selecting the boot type, you can select the file
format of the generated loader file and also select
the associated kernel for the boot method.
Default kernels are provided with the
VisualDSP++ software. In VisualDSP ++ 3.0,
four kernels are supplied, one for each boot type:
host, SPI, EPROM, and link boot. A single
executable (161_prom.dxe, 161_host.dxe,
161_spi.dxe, 161_link.dxe) can now initialize
code in all four external memory widths.

Please note that in previous versions of the
VisualDSP++ software, four separate executable
kernel files were provided for each boot type.
The one that was required was dependant upon
the external memory data bus widths in which
the DSP was to read and/or write to. i.e.
161_link8.dxe, 161_link16.dxe, 161_link32.dxe,
161_link48.dxe.

Each boot kernel is less than or equal to 256
words in length and is pre-pended to the user
code when the loader utility is run. The ADSP­21161, like all the other ADSP-21xxx devices,
has a special hardware feature that allows for a
maximum of 256 instruction words to be loaded
in upon reset. This code must then be responsible
for placing the application code and data into the
correct memory locations such as external
SDRAM, internal program memory and various
data memory locations before overwriting itself
with application code allowing for maximum
memory usage for the application. The detailed
functionality of the link port boot kernel and it’s
operation is not covered in this document as the
kernel source files are very well documented and
it is advised that a user study these to gain a
better understanding of the operation of the
kernel.

Loader file format

Before we take a closer look at the link port
loader boot kernel and how it operates we need
to be able to understand the file format of the
boot loader file that is created by the loader
utility and its contents.

Both the Include and ASCII file formats generate
16-bit hexadecimal values. The only difference
between the two being that the Include format
consists of comma separated 16-bit values
consisting of three values per line whereas the
ASCII file format has one 16-bit value per line
and is not comma separated as shown in Figure

Figure 2 Loader Utility Options

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 5 of 30

3.

Take the following three instructions:

0x063e04040009
0x0f7b00000000
0x06be00040054

16-bit Include format representation:

0x0009, 0x0404, 0x063e
0x0000, 0x0000, 0x0f7b
0x0054, 0x0004, 0x06be

16-bit ASCII format representation:

0x0009
0x0404
0x063e
0x0000
0x0000
0x0f7b
0x0054
0x0004
0x06be

Figure 3 Loader File Formats

The Include file format confirms to the C-style
include format and can be included into a C
program as shown in Code listing 1 or used to
include into any assembly program as shown in
Code listing 2.

int dm Boot_Data[N] = {
#include “boot_file.ldr”
};

Code listing 1 C-style inclusion of a loader file

.var Boot_Data[N] = “boot_file.ldr”;

Code listing 2 Assembly style inclusion of a loader file

The ASCII file format allows for simple
inclusion into an assembly file in the same
manner as is shown in Code listing 2. This is
similar to an assembler initialization data file
(.DAT). The ASCII file format cannot be used to
include into a C program.

The binary file format supports a variety of
PROM and micro-controller storage options.
This file format uses less space than the other file
formats and contains 48-bit instructions in big­endian format (most significant bit first).

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Understanding the contents of the loader file

Now that we are familiar with the various file
formats lets take a look at the loader file
contents. We will use the Include file format to
describe the contents.

The loader file can be broken down into three
main parts. The first part consisting of the kernel
program instructions, the second containing the
application instructions and various control
words (tags) used by the kernel to place data into
the correct locations within internal and external
memory. The third section contains the 256
application code instructions that are to
overwrite the kernel after all other initialization
has completed. The elfloader makes a couple of
modifications to this section:

• The first instruction of the applications LP0

interrupt vector (instruction address
0x40038), is replaced with an RTI command.

• The first instruction of the application LP0

interrupt vector is placed immediately after
the FINAL_INIT tag.

• The first instruction of the __RSTI interrupt

vector is replaced with the value
0x39732d802000.

These three modifications are required due to the
operation of the Final_Init routine in the kernel.
This is described fully in Link Port Booting
Process.

The first and third sections of the loader file are
the easiest to break down, as they contain no tag
words. The first section simply contains the op­code representation of the kernel source file that
gets directly loaded into the core and takes up the
first 256 lines of the loader file. The third section
contains the first 256 instructions that reside in
the Interrupt Vector Table (except for the
modifications made by the elfloader). These
overwrite the kernel instructions that were
loaded earlier. This section takes up the last 256
lines of the loader file.

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 6 of 30

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Each line in the Include format loader file as read
from left to right consists of the lower 16-bits
(MSB to LSB) of the instruction followed by the
middle 16-bits (MSB to LSB) and then the upper
16-bits (MSB to LSB).

Instruction: IM ASK = 0;

0x0f7b00000000

0x0000, 0x0000, 0x0f7b

Figure 4 16-bit Include file format

The second part of the loader file is more
complex. There are a number of different types
of data initialization that the boot kernel needs to
be able to distinguish between, such as 48-bit
program memory instructions, 32-bit data
memory or 16-bit external memory, to name just
a few. There are currently 27 different types of
memory initialization that can take place. In
order for the boot kernel to process and initialize
the data type correctly, each data section in the
generated loader file is preceded by two 48-bit
words. The first is what we call a “tag”. Each tag
is used as an indicator to the boot kernel of the
type of memory initialization that is to take
place. A full description of the tag and its
associated initialization type is shown in Table 2.

Tag word = 0x00000000000e

0x000e, 0x0000, 0x0000,
0x01ce, 0x0100, 0x0004,

32-bit address of where

16-bit count value for beginning of block is to be
number of words in loaded = 0x00040100
following block = 0x01ce

Figure 5 Tag and control words

Following the tag is a second 48-bit word
containing a 16-bit value for the number of
words in the data section that follows and a 32­bit address at which the data section is to be
located as shown in Figure 5.

The two shaded areas in Table 2 indicate illegal
tag words. These tags are only illegal for the link
port boot kernel as 48-bit external memory
writes cannot be performed unless the link ports
are disabled. This is due to the fact that external
data bus lines 15-0 are multiplexed with the link
port 1 and link port 0 data lines as shown in
Figure 7-1 on Page 7-2 of [1].

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 7 of 30

Tag Number Initialization Type Description

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0 0x0 FINAL INIT

1 0x1 ZERO DM16 Indicates initialization to zero of 16-bit internal data memory

2 0x2 ZERO DM32 Indicates initialization to zero of 32-bit internal data memory

3 0x3 ZERO DM40 Indicates initialization to zero of 40-bit internal data memory

4 0x4 INIT DM16 Indicates start of data to be placed in 16-bit internal data memory

5 0x5 INIT DM32 Indicates start of data to be placed in 32-bit internal data memory

6 0x6 INIT DM40 Indicates start of data to be placed in 40-bit internal data memory

7 0x7 ZERO PM16 Indicates initialization to zero of 16-bit internal program memory

8 0x8 ZERO PM32 Indicates initialization to zero of 32-bit internal program memory

9 0x9 ZERO PM40 Indicates initialization to zero of 40-bit internal program memory

10 0xA ZERO PM48 Indicates initialization to zero of 48-bit internal program memory

11 0xB INIT PM16 Indicates start of data to be placed in 16-bit internal program memory

12 0xC INIT PM32 Indicates start of data to be placed in 32-bit internal program memory

13 0xD INIT PM40 Indicates start of data to be placed in 40-bit internal program memory

14 0xE INIT PM48 Indicates start of data to be placed in 48-bit internal program memory

15 0xF ZERO DM64 Indicates initialization to zero of 64-bit internal data memory

Indicates the end of the application code and that the following instructions are the
final 256 instructions to overwrite the kernel

16 0x10 INIT DM64 Indicates start of data to be placed in 64-bit internal data memory

17 0x11 ZERO PM64 Indicates initialization to zero of 64-bit internal program memory

18 0x12 INIT PM64 Indicates start of data to be placed in 64-bit internal program memory

19 0x13 INIT PM8 EXT Indicates start of program instructions to be loaded to 8-bit external memory

20 0x14 INIT PM16 EXT Indicates start of program instructions to be loaded to 16-bit external memory

21 0x15 INIT PM32 EXT Indicates start of program instructions to be loaded to 32-bit external memory

22 0x16 INIT PM48 EXT Indicates start of program instructions to be loaded to 48-bit external memory

23 0x17 ZERO PM8 EXT Indicates initialization to zero of 8-bit external memory

24 0x18 ZERO PM16 EXT Indicates initialization to zero of 16-bit external memory

25 0x19 ZERO PM32 EXT Indicates initialization to zero of 32-bit external memory

26 0x1A ZERO PM48 EXT Indicates initialization to zero of 48-bit external memory

Table 2 Tag Initialization Types

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 8 of 30

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Link port boot kernel structure

This section briefly describes the contents of the
link port boot kernel for the ADSP-21161. The
kernel source files can be found in the following
directory if default installation of VisualDSP++

3.0 was selected:

C:\ProgramFiles\Analog Devices\VisualDSP\
211xx\ldr

When looking down the file the first thing you
should notice is that there is no interrupt vector
table. As there are only two interrupts that are
used with the link port booting method, the reset
interrupt and the link buffer 0 interrupt, all other
vector interrupt locations have been utilized for
implementing actual loader kernel operations.
This saves on original kernel space leaving more
space available for user modifications. A
breakdown of the various kernel routines and
their locations in memory is shown below. The
two interrupt vectors used have been highlighted.

seg_ldr 0x00040000
reset 0x00040004
loader_kernel_init 0x00040009
read_boot_info 0x00040018
read_link_word 0x0004001c
test_pm32_initext 0x00040024
pm32_init_ext_code 0x00040027
pm32_init_external_loop 0x0004002c
ext_zero_code 0x0004002e
ext_zero_code.end 0x00040032
lp0i_at_0x38 0x00040038
final_init 0x0004003c
user_init 0x00040054
Start_Load 0x00040055
test_dm_zero 0x00040057
dm_zero 0x00040059
dm_zero_loop 0x0004005b
test_dm40_zero 0x0004005d
dm40_zero 0x0004005f
dm40_zero.end 0x00040062
test_dm_init 0x00040064
dm_init 0x00040066
dm_init.end 0x0004006b
test_dm40_init 0x0004006d
dm40_init 0x0004006f
dm40_init.end 0x00040074
test_pm_zero 0x00040076
test_pm_init 0x0004007a
test_dm64_zero 0x0004007e
dm64_zero 0x00040080
test_dm64_init 0x00040083
dm64_init 0x00040085
dm64_init.end 0x0004008c
test_pm64_zero 0x0004008e

test_pm8_initext 0x00040092
pm8_init_ext_code 0x00040094
pm8_init_external.end 0x0004009c
test_pm16_initext 0x0004009e
pm16_init_ext_code 0x000400a0
pm16_init_external_loop 0x000400a6

Figure 6 Link Port kernel functions and locations

The kernel source file is well documented, for
more details of how each of the individual
functions operates, refer to the comments within
the source file.

The main function that is of interest to the user is
the USER_INIT routine. The ADSP-21161 link
port kernel begins by executing any initialization
code that is specific to the particular application
and system. This generally includes SDRAM
control settings, which must be set up before the
kernel can write data to external SDRAM. It may
also include the setting up of various peripheral
control registers such as SYSCON and SPICTL
for example. This is the routine in the boot kernel
source file where these initializations are entered
and is in most cases, the only routine that needs
be altered by the user. As this routine is located
after the link port buffer 0 interrupt vector, the
user need not worry about alignment of this
routine.

It is imperative that the two interrupt

L

vectors highlighted remain at the
addresses listed in Figure 5 for correct
execution of the kernel.

Link Port Booting the ADSP-21161 SHARC® DSP (EE-199) Page 9 of 30