Analog Devices EE194 Application Notes

Engineer To Engineer Note EE-194

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Technical Notes on using Analog Devices' DSP components and development tools

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Connecting the AD1836A Evaluation Board to the ADSP-21161N
SHARC® EZ-KIT Lite™

Contributed by Mazlum Adas June 4, 2003

Introduction

The ADSP-21161N SHARC® DSP has four independent synchronous Serial Ports (SPORTs). Every
SPORT has two channels, channel A and B. These channels can be programmed both as receiver or both
as transmitter. Beside the Time Division Multiplex (TDM) and serial mode, the SPORTs of the ADSP­21161N SHARC DSP also support the Inter IC-Sound (I

The AD1836A is a multi channel codec which supports up to 96 kHz sample rate. This codec provides
support for Right-Justified, Left-Justified, I

2

S, Serial and TDM mode.

The AD1836A provided with the ADSP-21161N EZ-KIT Lite™ supports TDM and serial mode
communication over the serial ports 0 and 2. In order to show the functionality of the serial ports in I
mode an external AD1836A codec can be connected to serial ports 1 and 3. This document shows how to
connect the AD1836A evaluation board and the ADSP-21161N EZ-KIT Lite (board revision 2.3 and
silicon revision 1.2) to realize this mode of operation.

2

S) mode developed by Philips.

2

S

I2S Mode Signal Chain

Figure 1 shows the block diagram of the signal chain for the connection between the AD1836A
Evaluation Board and ADSP-21161N EZ-KIT Lite.

Figure 1: Connection of the AD1836A Evaluation Board and the ADSP-21161N EZ-KIT Lite

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The software flow for the data transmission between the ADSP-21161N SHARC DSP and the AD1836A
is described in the following figure (Figure 2):

Initialization of the ADSP-

21161N EZ KIT Lite

Configuration of the

AD1836A via the SPI

Setting up the I/O

Processor for chained

SPORT DMA

Setting up the SPORTs

a

Interrupt service routines

of the SPORTs

Figure 2: Data transmission flow diagram

The configuration and initialization of the AD1836A codec is done over the Serial Port Interface (SPI).

2

The I

S data from the Analog to Digital Converters (ADCs) are received from SPORT1 channel A. The
SPORT3 transmits with both channels A and B the I
(DACs).

Before examining the software flow of the data transmission, let’s have a look at the system hardware
configuration.

2

S data back to the Digital to Analog Converters

Connecting the AD1836A Evaluation Board to the ADSP-21161N SHARC® EZ-KIT Lite™(EE-194) Page 2 of 12

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SPI connection

The Figure 3 shows the connection of the AD1836A Eval. Board to the ADSP-21161N EZ-KIT Lite over
the SPI port.

Figure 3: SPI connection between the AD1836A evaluation board and the ADSP-21161N EZ-KIT Lite

The SPI Control Port (P4) on the AD1836A Evaluation Board is used for the SPI connection with the
ADSP-21161N EZ-KIT Lite SPI connector (P18) to build up the SPI communication system. The ADSP­21161N SHARC DSP acts as the SPI master and the AD1836A as the SPI slave. A FLAG pin of the
ADSP-21161N SHARC DSP is used as the chip select for the slave device (JP4 on the ADSP-21161N
EZ-KIT Lite).

SPORT connection

The Figure 4 shows the SPORT connection between the two boards.

Figure 4: SPORT connection between the AD1836A evaluation board and the ADSP-21161N EZ-KIT Lite

Connecting the AD1836A Evaluation Board to the ADSP-21161N SHARC® EZ-KIT Lite™(EE-194) Page 3 of 12

The on board connectors on both evaluation boards facilitate the hardware setup for the serial port
connection. As shown in Figure 4, the SPORT connector (P15) of the ADSP-21161N EZ-KIT Lite needs to
be connected to the DSP I/O Port (P3) on the AD1836A Evaluation Board

On the ADSP-21161N EZ-KIT Lite both frame syncs (SFS1 and SFS3) and the serial clocks (SCLK1 and
SCLK3) are tied together with Zero-Ohm Resistors.

On the AD1836A Evaluation Board both bit clocks (ADC ABCLK and DAC DBCLK) and also the Left
Right clocks (ALRCLK and DLRCLK) should be connected together to get clear signals. The Figure 5
shows this connection.

Figure 5: Connecting the ADC and DACl clocks

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Jumper Settings on the ADSP-21161N EZ-KIT Lite

For the connection of the ADSP-21161N EZ-KIT Lite to the AD1836A Evaluation Board the jumpers
should be set as follows (Table 1):

Jumper Description State

JP4 FLAG 0 enable OFF
JP5 FLAG 1 enable OFF
JP23 SPORT/SPI clock enable ON
JP26 Push-button enable FLAG 0 OFF
JP27 Push-button enable FLAG 1 OFF

Table 1: ADSP-21161N EZ-KIT Lite jumper’s settings

Connecting the AD1836A Evaluation Board to the ADSP-21161N SHARC® EZ-KIT Lite™(EE-194) Page 4 of 12