Analog Devices AN655-b Application Notes

AN-655
MICROCONVERTER
ADuC832
AUTO-ZERO
OP AMP
AD8628
AUTO-ZERO
OP AMP
AD8628
TEC
CONTROLLER
ADN8830
WAVELENGTH MONITOR PD
TEC
THERMISTOR
8
TUNABLE LASER
CW LASER
AVERAGE POWER
CONTROLLER
ADN2830
POWER
MONITOR PD
ETALON
FILTER
2.5V
REFERENCE
ADR291
12-BIT
DAC
12-BIT
DAC
12-BIT
SER ADC
T/H
MUX
GPIO
i8051
CW LASER
AD8565
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel: 781/329-4700 • Fax: 781/326-8703 • www.analog.com
Tunable Laser Reference Design for Designers with
the ADuC832/ADN8830/ADN2830
by Nobuhiro Matsuzoe

FEATURES

Single Board Solution for Tunable Lasers 8-Channel Selectable Wavelength Control Wavelength Locking at 25 GHz/50 GHz Spacing AutoPower Control (APC) AutoTemperature Control (ATC) AutoFrequency Control (AFC) Laser Bias, Temperature Monitoring EEPROM-Based Autorestoring Serial Interfaces (SPI®/I2C®/RS-232) to Host System Wavelength Stability < 2 pm (typ) LD Temperature Stability < 0.01°C

APPLICATIONS

DWDM Transmission System Optical Instrumentation

GENERAL DESCRIPTION

This tunable laser reference design offers a single board solution with complete control requirements for DFB tun­able laser subsystems. Designed to work from +3 V/–5 V power supplies, it provides a low cost, low power tunable laser solution designed for ease of use with standard serial control interfaces.
A mixed-signal monolithic microprocessor, the ADuC832­based wave locker feedback loop is designed to meet the requirements of ITU-T grid spacing in a 50 GHz/25 GHz system. An integrated 12-bit ADC with an 8- channel multiplexer allows users to monitor laser bias current and laser temperature via SPI, I2C, or RS -232C serial interfaces. The ADN2830 laser bias controller can sink up to 200 mA (single)/400 mA (dual) and its integrated feedback control loop can maintain output optical power constant over temperature changes during wave lock­ing. The ADN8830 TEC controller enables excellent laser temperature stability and precise wavelength control with 1 pm resolution. A patented PWM/linear based TEC drive architecture enables high efciency and minimizes external ltering components.
REV. B

FUNCTIONAL BLOCK DIAGRAM

AN-655
–3
AN-655
f F B
where: F is the frequency slot
B is the bit rate.
S
S
<
(
)
– . /2 0 4
THERMISTOR TEC
WAVE
LOCKER
POWER
MONITOR
LASER DIODE
MODULATOR
TEC CONTROLLER
ADN8830
I/V
AD8628
LASER CONTROLLER
ADN2830
ANALOG I/O
MICROPROCESSOR
DIGITAL I/O
SERIAL PORT
MICROCONVERTER ADuC832
I2C LINK TO HOST
2
CONTINUOUS OPTICAL OUT
MODULATED
OPTICAL OUT
TRANSMIT DATA
2
TURNABLE LASER MODULE
REV. B
Figure 1. Typical Block Diagram of Optical
Transmitter with DFB Laser Module

WAVELENGTH TUNING

Because an optical transmitter requires a small form­factor design, use of the refractive index of a semiconduc­tor laser is commonly used to alter the wavelength. As the refractive index can be changed by both the temperature and the density of carriers, transmitter designers can choose from two different types of the wavelength-tunable laser modules—distributed feedback (DFB) lasers and distrib­uted Bragg reector (DBR) lasers. In general, the DBR laser is capable of a fast tuning speed and a wide tuning range. However, it requires multiple programmable cur­rent sources for wavelength control, which results in a complex system design. In contrast, the DFB lasers can be controlled by temperature of the laser chip, which results in a lower system cost and higher reliability since the DFB lasers are widely used today. The wavelength of the DFB laser is related to temperature with a typical temperature coefcient of 0.1 nm/K. By using a thermoelectric cooler (TEC) and a thermistor with a built-in module, the laser chip temperature can be adjusted, thus wavelength is controlled. Figure 1 shows a simplied block diagram of an optical transmitter designed with the DFB laser. The wavelength tuning range of the DFB laser is limited by an allowable operating temperature range. In fact, DFB lasers provide a tuning range of a couple of nanometers which is equivalent to 8 to 16 ITU-T grid channels depending on the channel-to-channel spacing of the wavelength.

WAVELENGTH LOCKING

The internal or external wavelength locker generates two monitor signals corresponding to the wavelength and optical output power respectively. The wavelength locker consists of the wavelength selective element and the photodetector diode as shown in Figure 2a. The built­in Fabry Perot etalon works as a wavelength lter which has a periodic characteristic similar to a comb lter. The peak-to-peak range of the etalon lter, referred to as the
Free Spectral Range (FSR) cycle FS, is precalibrated by the manufacturer to align with the ITU grid spacing as shown in Figure 2b. Because the monitor signal has periodic cycles, the algorithm of wavelength locking requires two different tuning methods, coarse tuning, and ne tuning. During the rst phase, the laser temperature must settle to the particular temperature corresponding to the target wavelength, where the wavelength is assumed within the capture range. In the case of Figure 2b, there are two locking points on both slopes, positive slope and negative slope, within a single FSR. Thus, the capture range must be half of the SFR. Feedforward control with a look-up table is used in this coarse tuning phase. After the wave­length settles within the capture range, the ne tuning phase acquires the wave length errors between the target wavelength and actual wavelength by monitoring the wave locker signal. Then the wavelength errors will be fed back to the temperature control circuit. The ne tuning phase maintains the wavelength within an allowable wavelength deviation range over ambient temperature changes. The ITU-T recommendation species wavelength stability as a frequency deviation in G.692. This deviation is dened as the difference between the nominal central frequency and the actual central frequency (Figure 2c). A maximum frequency deviation is given by
In 10 Gbps transmit applications with 50 GHz Grid spac­ing, the frequency deviation f must be less than 7.5 GHz which means wavelength deviation 67 pm. The test result of the wavelength deviation taken

must be less than
by the reference design is shown in Figure 2d.
–2–
REV. B
ETALON
FILTER
I/V
I/V
OPTICAL
INPUT
POWER MPD
WA
VELENGTH MPD
WAVELENGTH LOCKER
OPTICAL OUTPUT
TO
µC
TO
µC
Figure 2a. Wavelength Locker Block Diagram
WAVELENGTH
MONITOR PD
LOCK POINT
WAVELENGTH (nm
)
MONITOR CURRENT (A)
POWER
MONITOR PD
FSR
F
S
TUNABLE RANGE = 3nm
F
OPTICAL POWER (dB)
WAVELENGTH (THz)
NOTES
1. 1-HOUR WAVELENGTH STABILITY AT 25C, WAVE LOCKER ENABLED, 2 SEC INTERVAL.
2. F: LOCK POINT 1.5pm MAX TO MIN: 3pm.
3. LASER: FLD5F15CA, FUJITSU QUANTUM DEVICES LTD.
4. THE WAVELENGTH STABILITY IS MEASURED IN 3pm ACCURACY.
5. AFC STABILITY IS AFFECTED BY ACCUMULATIVE ERRORS OF APC AND
ATC CONTROL LOOP.
RS-232C
CABLE
FC-APC
(PANDA FIBER)
LASER
MODULE
COMPUTER
POWER SUPPLY
(+5V/–5V)
WAVELENGTH
METER
R
TH
PD1
PD2
7
6
5 4 3 2
1
8 9
10 11 12 13 14
TEC
AN-655

DEMONSTRATION BOARD

The tunable laser reference design board (demo board) demonstrates autopower control (APC), autotemperature control (ATC) and autofrequency control (AFC). Figure 3 shows simplied setup of the demo board. The demo board has a mount space for a tunable DFB laser module in a 14-lead buttery package. The demo board also provides a power supply terminal, analog I/O ports, and a serial port. To mount laser modules, a power photodetector must be oating within the laser module package as seen in Figure 4.
Figure 2b. Wavelength Locker Characteristics
Figure 2c. Frequency Slots and Allowable Frequency Deviation
Figure 3. Demo Board Setup
Figure 4. Laser Module Pin Assignment (refer­ence: Fujitsu Quantum Devices, FLD5F6CA Data Sheet)
REV. B
Figure 2d. AFC Typical Performance
–3–
AN-655
–5
AN-655
V V R I V
where:
V V
R
LOCKPOINT REF m
REF
= ×
(
)
[ ]
=
[ ]
=
[ ]
.
46 2
46
2 50
2490
V G T V V
where: T is target temperature of the thermistor in Celsius.
G =
V V
DAC LASER OFFSET
LASER
OFFSET
= ×
(
)
[ ]
=
[ ]
.
– .
0 0658
0 659
REV. B

GETTING STARTED

To ensure proper operation, follow the steps below.
1) Calculate the target voltages of the wavelength lock point according to the following equation:
The photo current Im2 needs to be solved at each lock point, because the Im2 may differ from lock point to lock point, laser
to laser. Table 1 is an example of the calculation result from the 8-channel wavelength tunable laser module.
Table 1.
Wavelength Im2 V
[nm] [THz] [mA] [V] [Dec] [Hex]
0 1582.439 189.4496 521.4 1.202 1969 07B1
1 1582.851 189.4003 573.4 1.072 1757 06DD
2 1583.265 189.3508 511.4 1.227 2010 07DA
3 1583.692 189.2997 563.4 1.097 1798 0706
4 1584.110 189.2498 527.4 1.187 1944 0798
5 1584.529 189.1997 556.8 1.114 1824 0720
6 1584.942 189.1504 524.3 1.194 1957 07A5
7 1585.365 189.1000 553.3 1.122 1839 072F
LOCKPOINT
Lock Point ADC Code
2) Calculate the voltage setpoint for ADN8830 according to the following equation:
Table 2 is an example of the calculation result from the 8-channel wavelength tunable laser module.
Table 2.
Curve Wavelength RTH T
[nm] [THz] [] [C] [V] [Dec] [Hex]
0 1582.439 189.4496 16810 12.191 0.144 236 00EC Positive
1 1582.851 189.4003 14370 15.941 0.390 639 027F Negative
2 1583.265 189.3508 12350 19.658 0.634 1040 0410 Positive
3 1583.692 189.2997 10630 23.433 0.883 1447 05A7 Negative
4 1584.110 189.2498 9220 27.106 1.125 1843 0733 Positive
5 1584.529 189.1997 8040 30.728 1.363 2233 08B9 Negative
6 1584.942 189.1504 7060 34.247 1.594 2612 0A34 Positive
7 1585.365 189.1000 6210 37.802 1.828 2996 0BB4 Negative
LASER
V
DAC Code Slope
DAC
–4–
REV. B
AN-655
Maximum TEC voltage V VLIM V=
( )
×
[ ]
1 5 4.
3) Compile and download the software to the ADuC832. To select the download/debug mode, position the switch (S5) to DEBUG, and then press the reset button (S3).This sets the ADuC832 to download mode. To select the normal mode, posi­tion the switch (S5) to NORMAL and press the reset button (S3). ADuC832 executes downloaded program after reset.
4) Mount the laser module to the mount pads labeled U13. The ADN2830 is capable of sinking a current up to 200 mA. The maximum TEC voltage limit is set at 3.5 V ±5% by default. To change the TEC voltage limiter, change the value of R24 and R25 which is congured as a voltage divider to set the voltage to the VLIM pin of ADN8830. Maximum TEC voltage can be given by:
5) Set JP1 and JP2. To protect the laser module from accidental damage, it is recommended to close JP1 and JP2 if the program has been changed. Shorting JP1 enables the ADN8830 to shut down mode regardless of control signals from the ADuC832. Shorting JP2 enables the ADN2830 to ALS (Automatic Laser Shutdown) mode regard less of control signals from ADuC832.
6) Apply +3 V and –5 V to the power supply terminal block (J1) located at the top of the demo board.
7) Leave JP2 open. ADN2830 starts to drive the laser diode.
8) Calibrate the optical output power by adjusting the multiturn potentiometer (R48).
9) Leave JP1 open. ADN8830 starts to control the laser temperature to the initial temperature setpoint selected by switch (S4).
10) Press S1 or S2 buttons to change the wavelength lock point. S1 increments and S2 decrements the wavelength point by 1.
11) To change the target wavelength lock point directly, congure the 3-bit DIP switch (S4) according to Table 3. This change is effective only when the ADuC832 is powered up or after reset.
Table 3.
Ch# S4(1) S4(2) S4(3)
0 OFF OFF OFF
1 ON OFF OFF
2 OFF ON OFF
3 ON ON OFF
4 OFF OFF ON
5 ON OFF ON
6 OFF ON ON
7
12) 7-segment LED (DS1) displays the selected wavelength and DS1 blinks until the laser temperature is set. TEMPLOCK LED (D1) is lit when the laser temperature is settled within the capture range. WL_LOCK LED (D2) is lit when the wavelength
is locked within ITU grid ±12pm.
ON ON ON
REV. B
–5–
AN-655
–7
AN-655
V I V
im m2 2
2 5 2490= ×
(
)
[ ]
. –
NOT POPULATED
DAC1
2.5V REF
R57
0
R58
R46
249
I
m2
V
m2
A
VDO
DAC0
R1
TEMPSET
THERMIN
ADN8830
2.5V
ADuC832
R
TH
R3
R2
LINEARIZATION ERROR < 0.5%
IDEAL
ACTUAL
2.5
0
CONTROL VOLTAGE (V)
THERMISTOR TEMPERATURE (C)
10 50
R = R exp B
1
T
1
T
where:
R
is thermistor resistance at 25 C.
B is thermistor constant
T
is temperature in K.
Typically, B = 3450 and R 10K
TH 25
x
25
25
25
25
×
 
 
 
 
 
 
°
=
R
R R
R R
R
R R
R R
R
R R R R – R R
R R
R
where: R R R
R R
R
low high
low high
low high
low high
mid high mid low high low
high low mid
high high
low low
1
2
2
2
3
2
2
3
3
=
=
′ +
=
+
+
′ =
+
′ =
+
REV. B

INTERFACING WAVELENGTH MONITOR PD

Figure 5 shows the current-to-voltage conversion circuit on the demo board. The conversion gain is set by R46. The input range of the wavelength monitor current Im2 is up to 1.0 mA by default. The wavelength monitor voltage, V
, is calculated by:
im2
Figure 5. I/V Conversion Circuit

INTERFACING 12-BIT DAC AND ADN8830

By using the interface circuit shown in Figure 6, the laser temperature is controlled by DAC output voltage. This scales the DAC voltage range from 0 V to 2.5 V for tem­perature range from 10°C to 50°C. The interface circuit linearizes the thermistor transfer function. The TEMPSET pin of ADN8830 is xed at 1.25 V. The THERMIN pin is connected to the resistor network which includes the thermistor. The characteristic of voltage-to-temperature is shown in Figure 7.
Figure 6. Application Circuit Using DAC Control Voltage
Figure 7. V-to-Temperature Characteristic
To maintain optimal linearity over the required temperature range, the value of the thermistor resistance should be calculated at the lowest and the highest operating tem­perature according to the following equation:
R1, R2, and R3 are given by:

IMPLEMENTING THE WAVELENGTH LOCK

As the rst phase, the program executes the coarse tuning with the ADN8830 TEC controller. The program reads S4 switch position, then generates the xed control voltage to let the ADN8830 settle the laser temperature correspond­ing to the selected wavelength set by S4. Because the ADN8830 has a local control loop for the temperature control, the program waits for the temperature locked signal from the ADN8830. After the laser temperature is settled within the capture range of the wavelength lock, the program starts the ne tuning. This phase uses the monitor signal from the wavelength locker. The program reads the actual wavelength and compares with the target wavelength being stored in the memory. Then the program adjusts the temperature control voltage, which corresponds to the error amount between the target wavelength and the monitored wavelength. Figure 8 shows the overview of the program ow including the course and ne tuning. Details of the course and ne tuning are shown in Figure 9 and Figure 10 respectively.
–6–
REV. B
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