AN-642
APPLICATION NOTE
One Technology Way
9106
and TxDAC+
Products
50
SOURCE
R1
1k
C3
0.1F
R2
1k
CLKCOM
CLKVDD
CLK+
CLK–
R
SERIES
provides the required source termination, while
50
SOURCE
R1
1k
C3
0.1F
R2
1k
CLKCOM
CLKVDD
CLK+
CLK–
R3
1k
R4
1k
C2
1nF
R
TERM
50
C1
1nF
f
C
dB3
1
2 5
0
=
× ×
π
C
C C
C C
=
×
+
1 2
1 2
50
SOURCE
R1
1k
C3
0.1F
R2
1k
CLKCOM
CLKVDD
CLK+
CLK–
R3
1k
R4
1k
C2
C1
L
MATCH
C
IN
dc bias resistors.
50
SOURCE
CLK+
CLK–
L2
C
IN
R
IN
1k
R
IN
1k
L1
C1
C2
AC GROUND
AC GROUND
2
1
2
0
π × =×f
L C
IN
L
f C
IN
2
1
2
0
2
=
×
(
)
×π
source (
and
and
R R
L
C
S IN
MATCH
× =
1
f
L C
0
1
2 1=×π
MATCH
gives:
gives:
C
f R
R
S IN
MATCH
=
× ×
1
20π
= 100 MHz,
= 1 k
= 1 k
= 7.12 pF
= 7.12 pF
L
R R
f
S IN
1
2
0
=
×
×π
= 100 MHz,
= 1 k
= 1 k
L
L L
L L
MATCH
=
×
+
1 2
1 2
= 263 nH.
= 263 nH.
so that the total series capacitance
(C1, C2) and L
must be
= 270 nH (shown in
FREQUENCY (Hz)
–5
–55
10M
MAGNITUDE (dB)
–50
–45
–40
–35
–30
–25
–20
–15
–10
0
5
10
15
100M 1G
VIN
DIFFERENTIAL
RESPONSE
CLK+
SINGLE-ENDED
CLK–
SINGLE-ENDED
FREQUENCY (Hz)
75
–200
10M
MAGNITUDE (dB)
–175
–150
–100
–75
–50
–25
0
25
50
100
125
150
175
100M 1G
DIFFERENTIAL
RESPONSE
CLK+
SINGLE-ENDED
CLK–
SINGLE-ENDED
–125
CLK_VDD
CLK_N
XIPT
R2
1K
L1
270N
C6
16P
R3
1K
CLK_P
CLK_COM
R1
50
C7
5P
V4
1.65
V1
3.3
V2
0
V3
0 AC 2
C
R1
L
R
VAR
R2
C
R
P
L
S
R
S
CLK_VDD
CLK_N
CLK_P
CLK_COM
D3D1
R2
0.0517
C1
0.75P
R1
193
C4
0.75P
L1
2.1N
L2
2.1N
C2
9F
R3
0.0517
R4
193
D2
D4
D6
D5
C3
18F
C5
9F
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