Analog Devices AN610 Application Notes

9106

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

ADCs all feature a Programmable



modulator

MUX BUF PGA

-

MODULATOR



ADC with PGA

this PGA.

AD7708/AD7709/AD7718/AD7719 offers a choice of eight

the maximum full-scale input for each range is doubled,

±

×

−

V

REF

RN

1.024

2

7

where

is the value of the 3-bit signal RN[2:0]. For

times the reference input. This effectively means that the

ADC has a 2.4% overrange capability, so it can convert

V

the input range to

V

to the ADC inputs for the calibration, but the

to result in a

this same signal were converted on the 2.56 V range, the

ADCs

Table I. AD7719 Unbuffered Mode RMS Noise at 19.79 Hz Update Rate

�2.56 V �1.28 V �640 mV �320 mV �160 mV �80 mV �40 mV �20 mV

RMS Noise 2.0 µV 1.21 µV 0.82 µV 0.56 µV 0.56 µV 0.56 µV 0.56 µV 0.52 µV
P-P Res. 18.5 bits 18 bits 17.5 bits 17 bits 16 bits 15 bits 14 bits 13 bits

–2

–

A problem with changing ranges on many other ADCs

with PGAs is that the ADC offset may change with range,

ADCs, the ADC offset error is insigni cant so there is

formed when the range is changed.

the next lower gain setting can be selected and used

when the range changes. As can be seen, the mean code

19.918
0

1

2

3

4

5

6

7

RN

19.920

19.922

19.924

19.926

19.928

mV

A major advantage of accurate gain tracking is that an

ADC calibration performed at one gain setting is also

valid on the other gain settings. Previously, most ADCs

with a PGA had to be recalibrated whenever the gain

was changed, which reduced the ADC throughput; now

ADC to be calibrated in the factory on the 2.56 V range

for the application, then recalibration can be performed

the ADC can produce apparently different conversion

the ADC, there would be nonzero ADC results if the same