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a
APPLICATION NOTE
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Using the ADXL202 Duty Cycle Output
by Harvey Weinberg
Calculation of the Acceleration Output
Acceleration experienced by the ADXL202 may be calculated using the following formula:
Acceleration in
As outlined in the data sheet, the nominal duty cycle
output of the ADXL202 is 50% at 0
cycle change per
from the duty cycle:
If the 0 g duty cycle output of the ADXL202 is other than
50%, and/or the duty cycle changes more or less than
12.5% per
rate. In practice, the 0
ADXL202 vary somewhat from device to device (see the
data sheet for details). So this formula can only be
used for low accuracy measurements. For higher
accuracy measurements, the actual offset and scale values must be substituted.
()
Acceleration in
g
, the acceleration calculation will be inaccu-
Duty Cycle Duty Cycle at
g
=
g
. Therefore to calculate acceleration
()
g =
g
output and the sensitivity of the
–
Duty Cycle per
g
and 12.5% duty
TT
()–%
12 50
.%
12 5
g
0
g
In addition, the result of this equation would be a number in the range of ±2 for an ADXL202. In general, it is
inconvenient to use real numbers in calculations with a
small microcontroller since floating point mathematics
would be required to get meaningful results. A preferred
method for calculation of acceleration with a small
microcontroller using fixed point math is included in
this application note, along with two simple methods of
calibration to find the actual offset and scale values.
This application note outlines methods to decode the duty
cycle output, conversion from duty cycle to acceleration
(or tilt angle), and calibration of the ADXL202. These methods are geared toward use with 8-bit microcontrollers
having limited computational capability.
Decoding the Output
The most direct way to decode the duty cycle output is
shown in Figure 1. A counter is started at the rising edge
of the X output (Ta = 0). The count at the falling edge
(Tb) is recorded, and the timer is stopped at the next rising edge of the X output (Tc). This process is then
repeated for the Y output (Td, Te, and Tf).
REV. 0
T1
T2
X
OUT
Ta
Y
OUT
Figure 1. Basic Decode Technique for the ADXL202
Tb
Tc
Td
T2
T1
Te
© Analog Devices, Inc., 2002
Tf
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While this technique is very easy to understand, you can
only acquire one sample of acceleration from both axes
every three cycles (i.e., 3 ⫻ T2) since you must wait for
the next rising edge of X
after Tf.
OUT
Note that while T2 is nominally constant, it does change
over temperature and contains some jitter. For systems
that do not require resolutions of better than 100 m
T2 may be measured only once. For more accurate
measurements, several T2 measurements should
be made and averaged. The average should be
updated periodically to account for T2 drift over
temperature.
T1
T2
X
OUT
Ta
Tb Te
An Improved PWM Decode Scheme
Since the duty cycle modulator (DCM) uses the same triangle wave reference for the X and Y channels, the
midpoints of the T1 of each period must be coincident. This
is illustrated in Figure 2. Here it is shown that even
though the X and Y duty cycle outputs are different,
g
,
the midpoints of T1 are synchronized. Therefore, an
improved PWM decode technique can be used to speed up
the data acquisition time. Figure 2 shows the sequence of
events. A counter is started at the rising edge of the X output (Ta = 0). The count at the falling edge of the X output
(Tb) is recorded. Then the counts at the rising and falling
edges of the Y output (Tc and Td) are recorded. A flow chart
outlining this method of calibration is shown in Figure 3.
Y
OUT
T1
Tg
Tc
T2
Tf
Td
Figure 2. High Speed Decoding Technique for the ADXL202
By definition:T1x = Tb – Ta = Tb (if the counter is zero at Ta)
T1y
= Td –
T2x
= T2y = Te – Ta = Tg –
Tc
Tf
Since the midpoints of the high states of the X and Y duty cycle signals are coincident:
T
2 = [Td – ((Td – Tc)/2)] – [(Tb – Ta)/2]
T
2 = [Td – ((Td – Tc)/2)] – [Tb/2] (if the counter is zero at Ta)
The advantages of this system of decoding are:
1. One sample of acceleration from both axes can be acquired every two
2.
T
2 is only calculated once for both the X and Y signals.
T
2 cycles.
–2–
REV. 0
START TIMER AT Ta
RECORD TIME AT Tb
RECORD TIME AT Tc
RECORD TIME AT Td
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T1x = Tb
T1y = Td – Tc
T2 = [Td –
((Td – Tc)/2)] – [(Tb – Ta )/ 2 ) ]
DONE
Figure 3. Flow Chart for High Speed Decoding Technique for the ADXL202
REV. 0
–3–