Analog Devices AN574 Application Notes

AN-574

a

APPLICATION NOTE

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel: [phone] • Fax: [phone] • www.analog.com

A Tamper-Resistant Watt-Hour Energy Meter Based on the AD7751

with a Current Transformer and a Low Resistant Shunt

by William Koon

INTRODUCTION

This application note describes a low cost, high accu­racy IEC1036 Class 1 watt-hour meter based on the
AD7751. The meter described is intended for use in
single phase, two-wire distribution systems.

The AD7751 is a low-cost, single chip solution for electri­cal energy measurement. The most distinctive feature of
the AD7751 is that it continuously monitors the phase
and neutral (return) currents. A FAULT condition occurs
if the two currents differ by more than 12.5%. Power cal­culation will be based on the larger of the two currents.
The meter calculates power correctly even if one of the
two wires does not carry any current. AD7751 provides
an effective way to combat any attempt to return the
current through earth, a very simple yet effective way of
meter tampering. The AD7751 comprises of two ADCs,
reference circuit and all the signal processing neces­sary for the calculation of real (active) power. The
AD7751 also includes direct drive capability for electro­mechanical counters (i.e., the energy register) and has
a high-frequency pulse output for calibration and
communications purposes.

This application note should be used in conjunction with
the AD7751 data sheet. The data sheet provides detailed
information on the functionality of the AD7751 and will
be referenced several times in this application note.

DESIGN GOALS

The international Standard IEC1036 (1996-09)—

Alternat­ing current watt-hour meters for active energy (Classes
1 and 2)

, was used as the primary specification for this
design. For readers more familiar with the ANSI C12.16
specification, see the section at the end of this applica­tion which compares the IEC1036 and ANSI C12.16
standards. This section explains the key IEC1036 specifi­cations in terms of their ANSI equivalents.

The design greatly exceeds this basic specification for
many of the accuracy requirements, e.g., accuracy at
unity power factor and at low (PF = ±0.5) power factor. In
addition, the dynamic range performance of the meter
has been extended to 500. The IEC1036 standard speci­fies accuracy over a range of 5% I

to I

B

—see Table I.

MAX

Typical values for I

are 400% to 600% of IB. Table I

MAX

outlines the accuracy requirements for a static watt­hour meter. The current range (dynamic range) for
accuracy is specified in terms of I

(basic current).

B

Table I. Accuracy Requirements

Current Value

1

0.05 IB ≤ I < 0.1 I

≤ I ≤ I

0.1 I

B

MAX

≤ I ≤ 0.2 I

0.1 I

B

2

PF

1 ±1.5% ±2.5%

B

1 ±1.0% ±2.0%

0.5 Lag ±1.5% ±2.5%

B

Percentage Error Limits
Class 1 Class 2

0.8 Lead ±1.5% —

0.2 IB ≤ I ≤ I

MAX

0.5 Lag ±1.0% ±2.0%

0.8 Lead ±1.0% —

NOTES

1

The current ranges for specified accuracy shown in Table I are expressed
in terms of the basic current (IB). The basic current is defined in IEC1036
(1996-09) section 3.5.1.2 as the value of current in accordance with which
the relevant performance of a transformer operated meter is fixed. I
is the maximum current at which accuracy is maintained.

2

Power Factor (PF) in Table I relates the phase relationship between the
fundamental (45 Hz to 65 Hz) voltage and current waveforms. PF in this
case can be simply defined as
between pure sinusoidal current and voltage.

3

Class index is defined in IEC1036 (1996-09) section 3.5.5 as the limits of
the permissible percentage error. The percentage error is defined as:

Percen

tage Error =

energy registered by meter true energy

PF = cos(θ)

true energy

, where θ is the phase angle

−

MAX

×100%

The schematic in Figure 1 shows the implementation of
a tamper-resistant, low-cost watt-hour meter using the
AD7751. A current transformer (CT) is used to detect the
current in the neutral wire, and the current flowing in the
phase is monitored by a current shunt. These two cur­rent sensors provide the current to voltage conversion
needed by the AD7751 and a simple divider network
attenuates the line voltage. The energy register (kWh) is
a simple electromechanical counter that uses a two­phase stepper motor. The AD7751 provides direct drive
capability for this type of counter. The AD7751 also pro­vides a high-frequency output at the CF pin for the meter
constant (3200 imp/kWh). Thus a high-frequency output
is available at the LED and optoisolator output. This
high-frequency output is used to speed up the calibra­tion process and provides a means of quickly verifying

3

REV. 0

© Analog Devices, Inc., 2001

AN-574

LOAD

–

+

–

+

PHASE

NEUTRAL

K1

K3

R6

R7

2.7
56

K4

K2

SOLDER JUMPERS

CALIBRATION
NETWORK
30%

J5

18k

J4

39k

J3

75k

J2

150k

J1

300k

FAULT TOLERANT ENERGY METER

= 40A, Ib = 5A, CLASS 1 (5% Ib – I

I

MAX

+

C12

C20
33nF

J21

R13

2.7k

R4A
1k

R4B
1k

10F

R25

330k

220F

6.3V

1.05k

R2

1k

+

C6

100nF

Z1

C17

10nF

X2

R5A

100

J18

J19

R10

R11

680

C21
33nF

CALIBRATION

NETWORK

J10
560

J9

1.2k

J8

2.2k

J7

5.1k

J6

9.1k

R24

330k

J22

J20

3%

R12

1.3k

Z3

J17

J16

R8

R9

82

160

330

J23

Z4

R5B

100

R18

R23

R17

R22

R16

R21

R15

R20

R14

R19

K5

K6

R1

1k

33nF

R3

33nF

33nF

33nF

33nF

C11
100nF

R33

10

P3 P1P2

AVDD AC/DC DVDD

P4

V1A

C1

P5

V1B

C3

P6

V1N

C2

P7

V2N

C4

P8

V2P

C5

P10

REF

C7

C18

470nF

MOV1
S20K275

U1

AD7751

IN/OUT

RESET AGND DGND

R27
10k

V

DD

R26

470

1N4744A

P11P9

D2

V

DD

DEVP

FAULT

CLKOUT

CLKIN

SCF

D2

1N4004

C13
100nF

P23

F1

P23

F2

P22

CF

P20

P19

P18

P17

P16

G0

P15

G1

P14

S0

P13

S1

P12

P21

POWER SUPPLY

81

C19

+

470F
35V

MAX

C14

+

10F

6.3V

3.579545MHz

Y1

C9
22pF

G0 = 1
G1 = 1
S0 = 1
S1 = 0
SCF = 0

U2

7805

2,3,6,7

)

TO IMPULSE COUNTER/
STEPPER MOTOR

D1

U3

1

2

PS2501-1

0R

K7

C16

100IMP/kWhr

C15

K8

CALIBRATION LED
HP HLMP-D150

4

3200IMP/kWhr

3

JUMPERS
USE 0
RESISTORS

0R

K9

K10

C10
22pF

R29

820

V

V

+5V

820

D4

DD

R28
10k

J15

J14

J13

J12

J11

C8
100nF

DD

Z2

R30

R32

20

R31

20

FAULT LED
HP HLMP-D150

240V

Figure 1. Tamper-Resistant Single Phase Watt-Hour Meter Based on the AD7751

meter functionality and accuracy in a production envi­ronment. The meter is calibrated in a two-step process:

Step 1. With current passing through only Channel
V1A’s shunt, the meter is first calibrated by varying
the line voltage attenuation using the resistor network
R14 to R23.

Step 2. With current passing through only Channel
V1B’s CT, the small gain mismatch between the CT’ in
Channel V1B and the shunt in Channel V1A is cali­brated by shorting out the appropriate resistor in the
resistor network R8 to R13.

DESIGN EQUATIONS

The AD7751 produces an output frequency which is pro­portional to the time average value of the product of two
voltage signals. The input voltage signals are applied at
V1 and V2. The detailed functionality of the AD7751 is
explained in the AD7751 data sheet—see

Operation

section. The AD7751 data sheet also provides

Theory Of

an equation which relates the output frequency on F1
and F2 (counter drive) to the product of the rms signal
levels at V1 and V2. This equation is shown here again
for convenience and will be used to determine the cor­rect signal scaling at V2 in order to calibrate the meter to
a fixed constant.

Frequency

.

=

2

V

REF

−

14

(1)

V V Gain F

×× × ×

574 1 2

The meter shown in Figure 1 is designed to operate at a
line voltage of 240 V and a maximum current (I

MAX

) of
40 A. However by correctly scaling the signals on Chan­nel 1 and Channel 2, a meter operating of any line
voltage and maximum current could be designed.

The basic current (I
and the current range for accuracy will be 5% I

) for this meter is selected as 5 A,

B

to I

B

MAX

or
a dynamic range of 160 (maintains 1% accuracy from
250 mA to 40 A). The electromechanical register (kWh)
will have a constant of 100 imp/kWh, i.e., 100 impulses

–2–

REV. 0

AN-574

from the AD7751 will be required in order to register
1 kWh. IEC1036 section 4.2.11 specifies that electromag­netic registers have their lowest values numbered in ten
division, each division being subdivided into ten parts.
Hence a display with a five plus one digits is used, i.e.,
10,000s, 1,000s, 100s, 10s, 1s, 1/10s. The meter constant
(for calibration and test) is selected as 3200 imp/kWh.
The on-chip reference circuit of the AD7751 has a tem­perature coefficient of typically 30 ppm/°C. However, on
A grade parts this specification is not guaranteed and
may be as high as 80 ppm/°C. At 80 ppm/°C the AD7751
error at –20°C/+60°C would be approximately +0.65%,
assuming a calibration at 25°C.

Shunt Selection

The shunt size (500 µΩ) is selected to maximize the use
of the dynamic range on Channel V1A (current Channel
A). However, there are some important considerations
when selecting a shunt for an energy metering applica­tion. First, minimize the power dissipation in the shunt.
The maximum rated current for this design is 40 A,
therefore the maximum power dissipated in the shunt is

2

(40 A)

× 500 µΩ = 800 mW. IEC1036 calls for a maximum

power disposition of 2 W (including power supply). Sec­ondly, the higher power dissipation may make it difficult
to manage the thermal issues. Although the shunt is
manufactured from Manganin material which is an alloy
with a low temperature coefficient of resistance, high
temperatures may cause significant error at heavy
loads. A third consideration is the ability of the meter to
resist attempts to tamper by shorting the circuit exter­nally. With a very low value of shunt resistance, the
effects of externally shorting the shunt are very much
minimized. Therefore, the shunt should always be
made as small as possible, but this must be offset
against the signal range on V1A (30 mV rms with a gain
of 16). If the shunt is made too small, it will not be pos­sible to meet the IEC1036 accuracy requirements at light
loads. A shunt value of 500 µΩ was considered a good
compromise for this design.

Current Transformer (CT) Selection

The CTs and their burden resistors should be selected to
match the shunt selected for V1B input. However there
are some important considerations when selecting the
CTs and the burden resistors for energy metering appli­cation. First, one need to select CTs that have good
linearity in both their gain and phase characteristics
over the range of current specified in the accuracy
requirement. For IEC1036, the range is between 5% I
I

. CT manufacturers often recommend the burden

MAX

to

B

resistance to be as small as possible to preserve linear­ity over large current range. A burden resistance of less
than 15 Ω is recommended. Second, CT introduces a
phase shift between primary and secondary current. The
phase shift can contribute to a significant error at low
power factor. Note that at power factor of 0.5, a phase
shift as small as 0.1° translates to 0.3% error in the

power reading. In this design, the phase of the CT chan­nel (V1B) is shifted to match the phase shift introduced
by the CT to eliminate any phase mismatch between the
current and voltage channel. This is achieved by mov­ing the corner frequency of the antialiasing filter in the
current channel input—see Corrected Phase Matching
between Channels and Antialias Filters in this applica­tion note. In this design, a 5000 turn CT was chosen. The
nominal value of the burden resistor can be found by the
following calculation:

Burden Resistor = CT Turn Ratio × Shunt Resistance

Design Calculations

Design parameters:
Line Voltage = 240 V (Nominal)
I

= 40 A (IB = 5 A)

MAX

Counter = 100 imp/kWh
Meter Constant = 3200 imp/kWh

Shunt Resistance = 500 µΩ
CT Turn Ratio = 1:5000
Nominal Burden Resistor = 500 µΩ × 5000 = 2.5 Ω

100 imp/hour = 100 ÷ 3600 sec = 0.027777 Hz
Meter will be calibrated at I
Power dissipation at I
Frequency on F1 (and F2) at I

(5 A).

B

= 240 V × 5 A = 1.2 kW

B

= 1.2 × 0.027777 Hz

B

= 0.03333333 Hz

Voltage across the shunt at I

(V1A) = 5A × 500 µΩ =

B

2.5 mV.

To select the F
AD7751 data sheet—

Meter Application

frequency for Equation 1, see the

1-4

Selecting a Frequency for an Energy

. From Tables V and VI in the AD7751
data sheet it can be seen that the best choice of fre­quency for a meter with I

= 40 A is 3.4 Hz (F2). This

MAX

frequency selection is made by the logic inputs S0 and
S1—see Table II in the AD7751 data sheet. The CF
frequency selection (meter constant) is selected by
using the logic input SCF. The two available options are
64 × F1(6400 imp/kWh) or 32 × F1(3200 imp/kWh). For
this design, 3200 imp/kWh is selected by setting SCF
logic low. With a meter constant of 3200 imp/kWh and a
maximum current of 40 A, the maximum frequency from
CF is 8.53 Hz. Many calibration benches used to verify
meter accuracy still use optical techniques. This limits
the maximum frequency which can be reliably read to
about 10 Hz. The only remaining unknown from Equa­tion 1 is V2 or the signal level on Channel 2 (the
voltage channel).

From Equation 1 on the previous page:

0 03333333

.

=

2

2

5

.

mV V Hz

××××

574 25 2 16 34

.. .

Hz

where:

V

2 = 266.8 mV rms

REV. 0

–3–

AN-574

Therefore, in order to calibrate the meter, the line voltage
needs to be attenuated down to 266.8 mV.

CALIBRATING THE METER: VOLTAGE CHANNEL
CALIBRATION

From the previous section it can be seen that the meter
is simply calibrated by attenuating the line voltage down
to 266.8 mV. The line voltage attenuation is carried out
by a simple resistor divider as shown in Figure 2. The
attenuation network should allow a calibration range of
at least ±30% to allow for CT/burden and the current
shunt resistance tolerances and the on-chip reference
tolerance of ±8%—see AD7751 data sheet.

J5

R18

R17

J4

J3

R16

R15

J2

R14

J1

R23

R22

R21

R20

R19

J10

R4B

J9

R14 + R15 +....+ R24 + R25 >> R4B

J8

f

= 1/(2..R4B.C5)

–3dB

J7

J6

R24

R25

266.8mV

C5

240V

Figure 2. Attenuation Network for Calibrating the
Voltage Channel (V2)

In addition, the topology of the network is such that the
phase matching between Channel 1 and Channel 2 is
preserved, even when the attenuation is being adjusted—
see Correct Phase Matching between Channels in this
application note.

As can be seen from Figure 2, the –3 dB frequency of this
network is determined by R4B and C5. Even with all the
jumpers closed, the total resistance of R24 and R25
(660 kΩ) is still much greater than R4B (1 kΩ). Hence
varying the resistance of the resistor chain R14 to R23
will have little effect on the –3 dB frequency of the net­work. The network shown in Figure 2 allows the line
voltage to be attenuated and adjusted in the range
190 mV to 363 mV with a resolution of 10 bits or 169 µV.
This is achieved by using the binary weighted resister
chain R14 to R23. This will allow the meter to be accu­rately calibrated using a successive approximation
technique.

During calibration, with current passing only the V1B
channel (current shunt side), starting with J1 each
jumper is closed in order of ascendance, e.g., J1, J2, J3
etc. If the calibration frequency on CF, i.e., 32 × 100 imp/
kWh (at I

= 5 A, CF frequency is expected to be 1.0667 Hz)

B

is exceeded when any jumper is closed, it should be
opened again. All jumpers are tested, J10 being the last
jumper. Note jumper connections are made with solder­ing together the jumper pins across the resistors in the
network. This approach is preferred over the use of trim
pots, as the stability of the latter over time and environ­mental conditions is questionable.

Since the AD7751 transfer function is extremely linear,
a one-point calibration (usually at I

) at unity power fac-

B

tor is all that is needed to calibrate the meter. If the
correct precautions have been taken at the design
stage, no calibration will be necessary at low power
factor (e.g., PF = 0.5).

CALIBRATING THE METER: MATCHING THE SHUNT AND
THE CT INPUTS

A calibration network, consisting of eight resistors and six
jumpers, is used to compensate gain variation between
the CT that is monitoring the phase current and the
shunt which detects the neutral currents. Because such
mismatch is often small, a more accurate calibration
network is used. In this design, a six-resistor parallel
resistor network is used for this purpose.

Because the signal at V1A and V1B must be the same to
provide accurate billing at both normal and fault mode,
Equation (2) shows the necessary condition for the V1A
and V1B signals to be the same.

R

B

=

R

S

N

where:

N

is the turn ratio of the CT.

R

is the CT’s burden resistance.

B

R

is the shunt resistance.

S

In this design, N = 5000, and RS = 500 µΩ, the nominal
value of R

is calculated to be at 2.5 Ω.

B

To generate the ±3% calibration range, the maximum
resistance (with J16 to J21 open) should be 2.5 Ω × 1.03
= 2.575 Ω and the minimum resistance (with J16 to J21
closed) should be 2.5 Ω × 0.97 = 2.425 Ω. The calibration
range is 2.575 – 2.425 = 0.15 Ω. Figure 3 shows the imple-
mentation of the calibration network in this design.

CURRENT TRANSFORMER
1:5000

J20

J19

R6 R7

J16 J17 J21

R8 R9 R13

J18

R10

R11

R12

Figure 3. Calibration Network for V1A and V1B Mismatch

R6 and R7 will produce the upper limit of the resistance
(2.575 Ω), and closing R8 to R13 will produce the lower
limit (2.425 Ω). R8 to R13 are binary weighted resistors,
i.e., closing jumper J16 will have twice as much effect to
the output than closing jumper J17. Again, successive
approximation technique is used to calibrate channel
matching.

During calibration, with current passing only the V1A
channel (CT side), the resistance is reduced by closing
appropriate jumpers J16 to J21. Starting from J16, each

–4–

(2)

R3

V1B

C3

R2

V1N

C2

REV. 0

AN-574

jumper is closed. By putting extra resistor in parallel, the
total burden resistance is reduced and thus the output
signal is attenuated. If the calibration frequency falls
below the expected value after a jumper is closed, the
jumper should be opened again.

Note that similar to the voltage calibration network, the
phase angle is preserved to be the same as that of Chan­nel V1A by selecting the appropriate resistance values
used in the network.

CORRECT PHASE MATCHING BETWEEN CHANNELS

The AD7751 is internally phase-matched over the fre­quency range 40 Hz to 1 kHz. Correct phase matching is
important in an energy metering application because
any phase mismatch between channels will translate
into significant errors at low power factor. This is easily
illustrated with the following example. Figure 4 shows
the voltage and current waveforms for an inductive
load. In the example shown, the current lags the voltage
by 60° (PF = 0.5). Assuming pure sinusoidal conditions,
the power is easily calculated as V rms × I rms × cos (60°).

INSTANTANEOUS REAL
POWER SIGNAL

INSTANTANEOUS REAL
POWER SIGNAL

V.I.

2

PF = 1

PF = 0.5

COS(60)

V.

2

I

CURRENT

VOLTAGE

CURRENT

INSTANTANEOUS
POWER SIGNAL

VOLTAGE

INSTANTANEOUS
POWER SIGNAL

60

Figure 4 . Voltage and Current Waveform
(Inductive Load)

If, however, a phase error (␾e) is introduced externally
to the AD7751, e.g., in the antialias filters, the error is
calculated as:

[

cos

(δ°) –

cos

(δ° + φe)]/

cos

(δ°) × 100% (3)

See Note 3 in Table I. Where δ is the phase angle between
voltage and current and φ

is the external phase error.

e

With a phase error of 0.2°, for example, the error at PF = 0.5
(60°) is calculated as 0.6%. As this example demon­strates, even a very small phase error will produce a
large measurement error at low power factor.

ANTIALIAS FILTERS

As mentioned in the previous section, one possible
source of external phase errors are the antialias filters
on Channel 1 and Channel 2. The antialias filters are low­pass filters that are placed before the analog inputs of
any ADC. They are required to prevent a possible distor­tion due to sampling called aliasing. Figure 5 illustrates
the effects of aliasing.

ALIASING EFFECTS

IMAGE

FREQUENCIES

0

450 900 2

FREQUENCY – kHz

Figure 5. Aliasing Effects

Figure 5 shows how aliasing effects could introduce
inaccuracies in an AD7751-based meter design. The
AD7751 uses two ⌺-⌬ ADCs to digitize the voltage and
current signals. These ADCs have a very high sampling
rate, i.e., 900 kHz. Figure 5 shows how frequency com­ponents (arrows shown in black) above half the
sampling frequency (also know as the Nyquist fre­quency), i.e., 450 kHz get imaged or folded back down
below 450 kHz (arrows shown in grey). This will happen
with all ADCs no matter what the architecture. In the
example shown it can be seen that only frequencies near
the sampling frequency, i.e., 900 kHz, will move into the
band of interest for metering, i.e., 0 kHz–2 kHz. This fact
will allow us to use a very simple LPF (Low-Pass Filter)
to attenuate these high frequencies (near 900 kHz) and
so prevent distortion in the band of interest.

The simplest form of LPF is the simple RC filter. This is a
single-pole filter with a roll-off or attenuation of
–20 dBs/dec.

CHOOSING THE FILTER –3 dB FREQUENCY

As well as having a magnitude response, all filters also
have a phase response. The magnitude and phase
response of a simple RC filter (R = 1 kΩ, C = 33 nF) are
shown in Figures 6 and 7. From Figure 6 it is seen that
the attenuation at 900 kHz for this simple LPF is greater
than 40 dB. This is enough attenuation to ensure no ill
effects due to aliasing.

REV. 0

–5–

AN-574

0dB

–20dB

–40dB

–60dB

10 100 1.0k 10k 100k 1.0M

FREQUENCY – Hz

Figure 6. RC Filter Magnitude Response

0

–20

–40

–60

–80

–0.4

(50Hz, –0.481)

(R = 900, C = 29.7nF)

–0.5

(50Hz, –0.594)

(R = 1k, C = 33nF)

–0.6

(50Hz, –0.718)

–0.7

(R = 1.1k, C = 36.3nF)

–0.8

45 50 55

FREQUENCY – Hz

Figure 8. Phase Shift at 50 Hz Due to Component
Tolerances

Note this is also why precautions were taken with the
design of the calibration network on Channel 2 (voltage
channel). Calibrating the meter by varying the resis­tance of the attenuation network will not vary the –3 dB
frequency and hence the phase response of the net­work on Channel 2—see Calibrating the Meter:
Voltage Channel Calibration. Shown in Figure 9 is a
plot of phase lag at 50 Hz when the resistance of the
calibration network is varied from 660 kΩ (J1–J10
closed) to 1.2 MΩ (J1–J10 open).

–100

10 100 1.0k 10k 100k 1.0M

FREQUENCY – Hz

Figure 7. RC Filter Phase Response

As explained in the last section, the phase response can
introduce significant errors if the phase response of the
LPFs on both Channel 1 and Channel 2 are not matched.
Phase mismatch can easily occur due to poor compo­nent tolerances in the LPF. The lower the –3 dB
frequency in the LPF (antialias filter), the more pro­nounced these errors will be at the fundamental
frequency component or the line frequency. Even with
the corner frequency set at 4.8 kHz (R = 1 kΩ, C = 33 nF),
the phase errors due to poor component tolerances can
be significant. Figure 8 illustrates the point. In Figure 8,
the phase response for the simple LPF is shown at 50 Hz
for R = 1 kΩ ± 10%, C = 33 nF ± 10%. Remember a phase
shift of 0.1°–0.2° can cause measurement errors of 0.6%
at low power factor. This design uses resistors of 1% tol­erance and capacitors of 10% tolerance for the antialias
filters to reduce the possible problems due to phase
mismatch. Alternatively the corner frequency of the
antialias filter could be pushed out to 10 kHz–15 Hz.
However, the corner frequency should not be made too
high. This could allow enough high-frequency compo­nents to be aliased and cause accuracy problems in a
noisy environment.

–0.591

–0.592

J1–J10 CLOSED
(50Hz, –0.59308)

–0.593

J1–J10 OPEN

–0.594

–0.595

49.9 50.0 50.1

(50Hz, –0.59348)

FREQUENCY – Hz

Figure 9. Phase Shift Due to Calibration

For the resistor network used for matching the shunt and
the CT in V1A and V1B, the calibration network has no
phase shift property. The antialiasing filter for the CT has a
larger phase lag to offset the slight phase lead intro­duced by the CT. This is achieved by using a larger
resistor in the RC network.

–6–

REV. 0

COMPENSATING FOR PARASITIC SHUNT INDUCTANCE

WITHOUT PARASITIC SHUNT INDUCTANCE
WITH PARASITIC SHUNT INDUCTANCE

10 100 1k 10k 100k 1M

–100

–80

–60

–40

–20

–0

–50dB

–40dB

–30dB

–20dB

–10dB

0dB

FREQUENCY – Hz

MAGNITUDE

PHASE

When used at low frequencies a shunt can be consid­ered as a purely resistive element with no significant
reactive elements. However, under certain situations
even a small amount of stray inductance can cause
undesirable effects when a shunt is used in a practical
data acquisition system. The problem is very noticeable
when the resistance of the shunt is very low, in the order
of 200 µΩ. Shown below is an equivalent circuit for the
shunt used in this design. There are three connections to
the shunt. One pair of connections provide the current
sense inputs (V1A and V1N) and the third connection is
the ground reference for the system.

AN-574

The shunt resistance is shown as R

(500 µΩ). R

SH1

resistance between the V1N input terminal and the system
ground reference point. The main parasitic elements
(inductance) are shown as L

SH1

and L

. Figure 10 also

SH2

shows how the shunt is connected to the AD7751 inputs
(V1A and V1N) through the antialiasing filters. The func­tion of the antialiasing filters is explained in the previous
section and their ideal magnitude and phase responses
are shown in Figures 6 and 7.

L

R

W1

1

V1A

C

R

SH1

L

SH1

L

W2

R

SH2

L

SH2

L

GND

1

OUT

SHUNT

R

2

C

R

GND

V1N

2

GND

PHASE

IN

Figure 10. Equivalent Circuit for the Shunt

Canceling the Effects of the Parasitic Shunt Inductance

The effect of the parasitic shunt inductance is shown in
Figure 11. The plot shows the phase and magnitude
response of the antialias filter network with and without
(dashed) a parasitic inductance of 3 nH. As can be seen
from the plot, both the gain and phase response of the
network are effected. The attenuation at 1 MHz is now
only about –15 dB which could cause some repeatability
and accuracy problems in a noisy environment. More
importantly, a phase mismatch may now exist between
the current and voltage channels. Assuming the network
on Channel 2 has been designed to match the ideal
phase response of Channel 1, there now exists a phase
mismatch of 0.1° at 50 Hz. Note that 0.1 will cause a

0.3% measurement error at PF = ±0.5. See Equation (3)
in Correct Phase Matching Between Channels section.

500

SH2

is the

V1A
V1N

GND

Figure 11. Effect of Parasitic Shunt Inductance on the
Antialiasing Network

The problem is caused by the addition of a zero into the
antialias network. Using the simple model for the shunt
shown in Figure 10, the location of the zero is given as
R

SH1/LSH1

(in radians/sec).

One way of canceling the effects of this additional zero
in the network is to add an additional pole at the (or
close to) same location. The addition of an extra RC on
each analog input of V1A and V1N will achieve the addi­tional pole required. The new antialias network for
Channel V1A is shown in Figure 12. To simplify the
calculation and demonstrate the principle, the Rs and Cs
of the network are assumed to be the same.

j

POLE #1

3 1 5 1

–   

()

2 RC 4 RC

POLE #2

3 1 5 1

–  – 

()

2 RC 4 RC



ZERO #1

–(RSH/LSH)

2 R2 C2

S

R

1

 S3RC  1

R

C

C

Figure 12. Shunt Inductance Compensation Network

The location of the pole #1 is given as:

For

R

= 500 µΩ,

SH

1

Pole



321541

#1

=× + ×



RC RCRL



L

= 3 nH, C = 33 nF.

SH

1



SH

1

=



SH



1

REV. 0

–7–

AN-574

R is calculated as approximately 476 Ω (Use 470 Ω).

The location of Pole #1 is 166,667 rads or 26.53 kHz.

This places the location of Pole # 2 at:

Pole



321541



RC RC





kHz#.2

3 920=× + ×

=




To ensure phase matching between Channel 1 and
Channel 2, the pole at Channel 2 must also be positioned
at this location. With C = 33 nF, the new value of resistance
for the antialias filters on Channel 2 is approximately

1.23 kΩ (use 1.2 kΩ).

Figure 13 shows the effect of the compensation network
on the phase and magnitude response of the antialias
network in Channel 1. The dashed line shown the response
of Channel 2 using practical values for the newly calcu­lated component values, i.e., 1.2 kΩ and 33 nF. The solid
line shows the response of Channel 1 with the parasitic
shunt inductance included. Notice phase and magnitude
responses match very closely. This is the objective of
the compensation network.

–0

0dB

–20

–10dB

–40

–60

–80

–100

–20dB

PHASE

–30dB

–40dB

WITHOUT PARASITIC SHUNT INDUCTANCE

–50dB

WITH PARASITIC SHUNT INDUCTANCE

10 100 1k 10k 100k 1M

FREQUENCY – Hz

MAGNITUDE

Figure 13. Antialiasing Network Phase and Frequency
Response after Compensation

The method of compensation works well when the poles
due to shunt inductance are greater than 25 kHz or so. If
zero is at a much higher frequency, its effects may simply
be eliminated by placing an extra RC on Channel 1 with
a pole that is a decade greater than that of the original
antialiasing filter. In this design, extra RC filters (R5A,
C20, and R5B, C21) are used for the purpose of eliminat­ing the parasitic inductance.

NO LOAD THRESHOLD

The AD7751 has on-chip anticreep functionality. The
AD7751 will not produce a pulse on CF, F1, or F2 if the
output frequency falls below a certain level. This feature
ensures that the energy meter will not register energy
when no load is connected. IEC 1036 (1996-09), Section

4.6.4 specifies the start-up current as being not more
than 0.4% I

at PF = 1. With IB = 5 A, the meter has to start

B

registering energy at 20 mA. For this design, the start
current is calculated at 7.8 mA or 0.15% I

—see No Load

B

Threshold on the AD7751 data sheet.

POWER SUPPLY DESIGN

This design uses a simple low-cost power supply based
on a capacitor divider network, i.e., C18 and C19. Most of
the line voltage is dropped across C18, a 470 nF, 250 V
metalized polyester film capacitor. The impedance of
C18 dictates the effective VA rating of the supply. How­ever, the size of C18 is constrained by the power
consumption specification in IEC1039. The total power
consumption in the voltage circuit including power sup­ply is specified in Section 4.4.1.1 of IEC1039 (1996-9).
The total power consumption in each phase is 2 W and
10 VA under nominal conditions. The nominal VA rating
of the supply in this design is 8.5 VA. The total power
dissipation is approximately 0.59 W. Together with the
power dissipated in the shunt at 40 A load, the total
power consumption of the meter is 1.39 W. Figure 14
shows the basic power supply design.

240V

R26

V1

D2C18

D3

C19

+

U2

8

7805

2, 3, 6, 7

V2

1

5V
V

DD

I

Figure 14. Power Supply

The plots shown in Figures 15, 16, 17, and 18 show the
PSU performance under heavy load (50 A) with the line
voltage varied from 180 V to 250 V. By far the biggest
load on the power supply is the current required to drive
the stepper motor which has a coil impedance of about
400 Ω. This is clearly seen by looking at V1 (voltage on
C19) in the plots below. Figure 16 shows the current
drawn from the supply. Refer to Figure 14 when review­ing the following simulation plots.

Care should be taken when selecting a shunt to ensure
its parasitic inductance is small. This is especially true
of shunts with small values of resistance, e.g.,
<200 µΩ. Note the smaller the shunt resistance, the
lower the zero frequency for a given parasitic induc­tance (Zero = R

SH1/LSH1

).

–8–

REV. 0