Analog Devices AN559 Application Notes

AN-559
a
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com
A Low Cost Watt-Hour Energy Meter Based on the AD7755
By Anthony Collins
INTRODUCTION
The AD7755 is a low-cost, single-chip solution for elec­trical energy measurement. The AD7755 is comprised of two ADCs, reference circuit, and all the signal process­ing necessary for the calculation of real (active) power. The AD7755 also includes direct drive capability for elec­tromechanical counters (i.e., the energy register), and has a high-frequency pulse output for calibration and communications purposes.
This application note should be used in conjunction with the AD7755 data sheet. The data sheet provides detailed information on the functionality of the AD7755 and will be referenced several times in this application note.
DESIGN GOALS
The international Standard IEC1036 (1996-09) –
Alternat­ing Current Watt-Hour Meters for Active Energy (Classes 1 and 2)
, was used as the primary specification for this design. For readers more familiar with the ANSI C12.16 specification, see the section at the end of this applica­tion note, which compares the IEC1036 and ANSI C12.16 standards. This section explains the key IEC1036 specifi­cations in terms of their ANSI equivalents.
The design greatly exceeds this basic specification for many of the accuracy requirements, e.g., accuracy at unity­power factor and at low (PF = ±0.5) power factor. In addi­tion, the dynamic range performance of the meter has been extended to 500. The IEC1036 standard specifies accuracy over a range of 5% Ib to I values for I
are 400% to 600% of Ib. Table I outlines the
MAX
—see Table I. Typical
MAX
accuracy requirements for a static watt-hour meter. The current range (dynamic range) for accuracy is specified in terms of Ib (basic current).
Current Value
0.05 Ib < I < 0.1 Ib 1 ±1.5% ±2.5%
< I < I
0.1 Ib
0.1 Ib
< I < 0.2 Ib 0.5 Lag ±1.5% ±2.5%
< I < I
0.2 Ib
NOTES
1
The current ranges for specified accuracy shown in Table I are expressed in terms of the basic current (Ib). The basic current is defined in IEC1036 (1996–09) section 3.5.1.1 as the value of current in accordance with which the relevant performance of a direct connection meter is fixed. I
is the maximum current at which accuracy is maintained.
MAX
2
Power Factor (PF) in Table I relates the phase relationship between the fundamental (45 Hz to 65 Hz) voltage and current waveforms. PF in this case can be simply defined as PF = cos( φ), where φ is the phase angle between pure sinusoidal current and voltage.
3
Class index is defined in IEC1036 (1996–09) section 3.5.5 as the limits of the permissible percentage error. The percentage error is defined as:
Percentage Error
The schematic in Figure 1 shows the implementation of a simple, low-cost watt-hour meter using the AD7755. A shunt is used to provide the current-to-voltage conver­sion needed by the AD7755 and a simple divider network attenuates the line voltage. The energy register (kWh) is a simple electromechanical counter that uses a two-phase stepper motor. The AD7755 provides direct drive capability for this type of counter. The AD7755 also provides a high-frequency output at the CF pin for the meter constant (3200 imp/kWh). Thus a high-frequency output is available at the LED and opto-isolator output. This high-frequency output is used to speed up the calibration process and provides a means of quickly verifying meter functionality and accuracy in a production environment. The meter is calibrated by varying the line voltage attenuation using the resistor network R5 to R14.
Table I. Accuracy Requirements
3
1
MAX
Percentage Error Limits Class 1 Class 2
PF
2
1 ±1.0% ±2.0%
0.8 Lead ±1.5%
MAX
0.5 Lag ±1.0% ±2.0%
0.8 Lead ±1.0%
Energy
Registered by Meter – True Energy
True Energy
100%
REV. A
AN-559
NEUTRAL
LOAD
PHASE
V
U1
REVP
NC
CLKOUT
CLKIN
SCF
DGND
POWER SUPPLY
8
U2
7805
2,3,6,7
DD
C12
C13
P1
P24
F1
P23
F2
P22
CF
P20
P19
P18
Y1
P17
G0
P16
G1
P15
S0
P14
S1
P13
P12
NC = NO CONNECT
V
DD
1
5V
+
V
C9
C8
Z2
DD
R17
J15
J14
J13
J12
J11
C7
TO IMPULSE COUNTER/ STEPPER MOTOR
R20
R19
R18
CALIBRATION
D1
LED
1
2
U3
PS2501-1
JUMPERS USE 0RESISTOR
C15
C14
4
3
K5
K6
100 imp/kWhr
K7
3200 imp/kWhr
K8
CALIBRATION NETWORK
R9
R14
R8
R13
R7
R12
R6
R11
R5
R10
K3
K4
Z3
Z4
J10
J9
C19
J8
J7
J6
R15 R16
AD780
Z1
C16
V
U4
4
K1
350
+
K2
JUMPERS USE 0RESISTOR
J5
J4
J3
J2
J1
DD
2
6
+
C11
R1
R2
R3
R4
+
C5 C6
EXTERNAL REFERENCE (OPTIONAL)
C17
MOV1
C10
P3 P2
AVDD AC/DC DVDD
P4
NC
P5
V1P
C1
P6
V1N
C2
P7
V2N
C3
P8
V2P
C4
P10
REF
IN/OUT
RESET
P9 P11 P21 R23
V
DD
R21 D2
D3
C18
R22
AD7755
AGND
+
220V
Figure 1. Simple Single-Phase Watt-Hour Meter Based on the AD7755
DESIGN EQUATIONS
The AD7755 produces an output frequency that is pro­portional to the time average value of the product of two voltage signals. The input voltage signals are applied at V1 and V2. The detailed functionality of the AD7755 is explained in the AD7755 data sheet, Theory Of Opera­tion section. The AD7755 data sheet also provides an equation that relates the output frequency on F1 and F2 (counter drive) to the product of the rms signal levels at V1 and V2. This equation is shown here again for convenience and will be used to determine the correct signal scaling at V2 in order to calibrate the meter to a fixed constant.
Frequency
=
×× × ×8.06 1
2
2
V
REF
1–4
(1)
V V Gain F
The meter shown in Figure 1 is designed to operate at a line voltage of 220 V and a maximum current (I
MAX
) of
40 A. However, by correctly scaling the signals on Channel 1 and Channel 2, a meter operating of any line voltage and maximum current could be designed.
The four frequency options available on the AD7755 will allow similar meters (i.e., direct counter drive) with an I
of up to 120 A to be designed. The basic current (Ib)
MAX
for this meter is selected as 5 A and the current range for accuracy will be 2% Ib to I
, or a dynamic range of 400
MAX
(100 mA to 40 A). The electromechanical register (kWh) will have a constant of 100 imp/kWh, i.e., 100 impulses from the AD7755 will be required in order to register 1 kWh. IEC1036 section 4.2.11 specifies that electromag­netic registers have their lowest values numbered in ten division, each division being subdivided into ten parts. Hence a display with a five plus one digits is used, i.e., 10,000s, 1,000s, 100s, 10s, 1s, 1/10s. The meter constant (for calibration and test) is selected as 3200 imp/kWh.
–2–
REV. A
AN-559
Design Calculations
Design parameters:
Line voltage = 220 V (nominal) I
= 40 A (Ib = 5 A)
MAX
Counter = 100 imp/kWh Meter constant = 3200 imp/kWh Shunt size = 350 µΩ 100 imp/hour = 100/3600 sec = 0.027777 Hz Meter will be calibrated at Ib (5A) Power dissipation at Ib = 220 V × 5 A = 1.1 kW Frequency on F1 (and F2) at Ib = 1.1 × 0.027777 Hz = 0.0305555 Hz
Voltage across shunt (V1) at Ib = 5 A × 350 µΩ = 1.75 mV.
Figure 2. Final Implementation of the AD7755 Meter
AD7755 Reference
The schematic in Figure 1 also shows an optional reference circuit. The on-chip reference circuit of the AD7755 has a temperature coefficient of typically 30 ppm/°C. However, on A Grade parts this specification is not guaranteed and may be as high as 80 ppm/°C. At 80 ppm/°C the AD7755 error at –20°C/+60°C could be as high as 0.65%, assuming a calibration at 25°C.
Shunt Selection
The shunt size (350 µΩ) is selected to maximize the use of the dynamic range on Channel V1 (current channel). However there are some important considerations when selecting a shunt for an energy metering application. First, minimize the power dissipation in the shunt. The maximum rated current for this design is 40 A, therefore, the maximum power dissipated in the shunt is (40 A) 350 µΩ = 560 mW. IEC1036 calls for a maximum power dissipation of 2 W (including power supply). Secondly, the higher power dissipation may make it difficult to manage the thermal issues. Although the shunt is manufactured from Manganin material, which is an alloy with a low temperature coefficient of resistance, high temperatures may cause significant error at heavy loads. A third consideration is the ability of the meter to resist attempts to tamper by shorting the phase circuit. With a very low value of shunt resistance the effects of externally shorting the shunt are very much minimized. Therefore, the shunt should always be made as small as possible, but this must be offset against the signal range on V1 (0 mV–20 mV rms with a gain of 16). If the shunt is made too small it will not be possible to meet the IEC1036 accuracy requirements at light loads. A shunt value of 350 µΩ was considered a good compromise for this design.
2
×
To select the F data sheet, Selecting a Frequency for an Energy Meter Application section. From Tables V and VI in the AD7755 data sheet it can be seen that the best choice of fre­quency for a meter with I frequency selection is made by the logic inputs S0 and S1—see Table II in the AD7755 data sheet. The CF fre­quency selection (meter constant) is selected by using the logic input SCF. The two available options are 64 F1(6400 imp/kWh) or 32 × F1(3200 imp/kWh). For this design, 3200 imp/kWh is selected by setting SCF logic low. With a meter constant of 3200 imp/kWh and a maximum current of 40 A, the maximum frequency from CF is 7.82 Hz. Many calibration benches used to verify meter accuracy still use optical techniques. This limits the maximum frequency that can be reliably read to about 10 Hz. The only remaining unknown from equation 1 is V2 or the signal level on Channel 2 (the voltage channel).
From Equation 1 on the previous page:
0 030555
.
Therefore, in order to calibrate the meter the line volt­age needs to be attenuated down to 248.9 mV.
CALIBRATING THE METER
From the previous section it can be seen that the meter is simply calibrated by attenuating the line voltage down to 248.9 mV. The line voltage attenuation is carried out by a simple resistor divider as shown in Figure 3. The attenuation network should allow a calibration range of at least ±30% to allow for shunt tolerances and the on-chip reference tolerance of ±8%—see AD7755 data sheet. In addition, the topology of the network is such that the phase-matching between Channel 1 and Channel 2 is preserved, even when the attenuation is being adjusted (see Correct Phase Matching Between Channels section).
frequency for Equation 1 see the AD7755
1–4
= 40 A is 3.4 Hz (F2). This
MAX
8 06 1 75 2 16 3 4
Hz
.. .
=
V2 = 248.9 mV rms
mV V Hz
××××
25
.
2
REV. A
–3–
AN-559
248.9mV
R9
J5
J4
J3
J2
J1
R14
R8
R13
R7
R12
R6
R11
R5
R10
J10
J9
J8
J7
J6
R15 R16
R4 C4
R5 + R6 + ............. + R15 + R16 >> R4
1/(2..R4.C4)
f
–3dB
220V
Figure 3. Attenuation Network
As can be seen from Figure 3, the –3 dB frequency of this network is determined by R4 and C4. Even with all the jumpers closed, the resistance of R15 (330 k) and R16 (330 k) is still much greater than R4 (1 k). Hence vary­ing the resistance of the resistor chain R5 to R14 will have little effect on the –3 dB frequency of the network. The network shown in Figure 3 allows the line voltage to be attenuated and adjusted in the range 175 mV to 333 mV with a resolution of 10 bits or 154 µV. This is achieved by using the binary weighted resistor chain R5 to R14. This will allow the meter to be accurately cali­brated using a successive approximation technique. Starting with J1, each jumper is closed in order of ascendance, e.g., J1, J2, J3, etc. If the calibration fre­quency on CF, i.e., 32 × 100 imp/hr (0.9777 Hz), is exceeded when any jumper is closed, it should be opened again. All jumpers are tested, J10 being the last jumper. Note jumper connections are made with 0 fixed resistors which are soldered into place. This approach is preferred over the use of trim pots, as the stability of the latter over time and environmental conditions is questionable.
Since the AD7755 transfer function is extremely linear a one-point calibration (Ib) at unity power factor, is all that is needed to calibrate the meter. If the correct precau­tions have been taken at the design stage, no calibration will be necessary at low-power factor (PF = 0.5). The next section discusses phase matching for correct calcu­lation of energy at low-power factor.
If, however, a phase error (φ
) is introduced externally to
e
the AD7755, e.g., in the antialias filters, the error is cal­culated as:
[cos(δ°) – cos(δ°+ φ
)]/cos(δ°) × 100% (2)
e
See Note 3 on Table I. Where δ is the phase angle between voltage and current and φ
is the external phase error.
e
With a phase error of 0.2°, for example, the error at PF = 0.5 (60°) is calculated as 0.6%. As this example demonstrates, even a very small phase error will pro­duce a large measurement error at low power factor.
PF = 1
V.I
PF = 0.5
V.I COS(60)
2
2
CURRENT
VOLTAGE
VOLTAGE
CURRENT
INSTANTANEOUS POWER SIGNAL
INSTANTANEOUS POWER SIGNAL
60
INSTANTANEOUS REAL POWER SIGNAL
INSTANTANEOUS REAL POWER SIGNAL
Figure 4. Voltage and Current (Inductive Load)
ANTIALIAS FILTERS
As mentioned in the previous section, one possible source of external phase errors are the antialias filters on Channel 1 and Channel 2. The antialias filters are low­pass filters that are placed before the analog inputs of any ADC. They are required to prevent a possible distortion due to sampling called aliasing. Figure 5 illustrates the effects of aliasing.
CORRECT PHASE MATCHING BETWEEN CHANNELS
The AD7755 is internally phase-matched over the fre­quency range 40 Hz to 1 kHz. Correct phase matching is important in an energy metering application because any phase mismatch between channels will translate into significant measurement error at low-power fac­tor. This is easily illustrated with the following example. Figure 4 shows the voltage and current waveforms for an inductive load. In the example shown, the current lags the voltage by 60° (PF = –0.5). Assuming pure sinu­soidal conditions, the power is easily calculated as V rms × I rms × cos (60°).
–4–
0
IMAGE
FREQUENCIES
2
Figure 5. Aliasing Effects
450
FREQUENCY – kHz
900
REV. A
AN-559
Figure 5 shows how aliasing effects could introduce inac­curacies in an AD7755-based meter design. The AD7755 uses two Σ-∆ ADCs to digitize the voltage and current signals. These ADCs have a very high sampling rate, i.e., 900 kHz. Figure 5 shows how frequency components (arrows shown in black) above half the sampling fre­quency (also know as the Nyquist frequency), i.e., 450 kHz is imaged or folded back down below 450 kHz (arrows shown dashed). This will happen with all ADCs no mat­ter what the architecture. In the example shown it can be seen that only frequencies near the sampling frequency, i.e., 900 kHz, will move into the band of interest for meter­ing, i.e., 0 kHz–2 kHz. This fact will allow us to use a very simple LPF (Low-Pass Filter) to attenuate these high fre­quencies (near 900 kHz) and so prevent distortion in the band of interest.
The simplest form of LPF is the simple RC filter. This is a single-pole filter with a roll-off or attenuation of –20 dBs/dec.
Choosing the Filter –3 dB Frequency
As well as having a magnitude response, all filters also have a phase response. The magnitude and phase response of a simple RC filter (R = 1 k, C = 33 nF) are shown in Figures 6 and 7. From Figure 6 it is seen that the attenuation at 900 kHz for this simple LPF is greater than 40 dBs. This is enough attenuation to ensure no ill effects due to aliasing.
0
–20
dB
–40
0
20
40
DEGREES
60
80
100
1k10010
FREQUENCY – Hz
10k
100k 1M
Figure 7. RC Filter Phase Response
As explained in the last section, the phase response can introduce significant errors if the phase response of the LPFs on both Channel 1 and Channel 2 are not matched. Phase mismatch can easily occur due to poor component tolerances in the LPF. The lower the –3 dB frequency in the LPF (antialias filter) the more pronounced these errors will be at the fundamental frequency component or the line frequency. Even with the corner frequency set at
4.8 kHz (R = 1 k, C = 33 nF) the phase errors due to poor component tolerances can be significant. Figure 8 illus­trates the point. In Figure 8, the phase response for the simple LPF is shown at 50 Hz for R = 1 kΩ ± 10%, C = 33 nF ± 10%. Remember a phase shift of 0.2° can causes mea­surement errors of 0.6% at low-power factor. This design uses resistors of 1% tolerance and capacitors of 10% tolerance for the antialias filters to reduce the pos­sible problems due to phase mismatch. Alternatively the corner frequency of the antialias filter could be pushed out to 10 kHz–15 Hz. However, the corner frequency should not be made too high, as this could allow enough high-frequency components to be aliased and so cause accuracy problems in a noisy environment.
REV. A
–60
1k10010
FREQUENCY – Hz
10k
100k 1M
Figure 6. RC Filter Magnitude Response
–5–
0.4
0.5
0.6
DEGREES
0.7
0.8
45
FREQUENCY – Hz
(50Hz, –0.481) (R = 900, C = 29.7nF)
(50Hz, –0.594) (R = 1k, C = 33nF)
(50Hz, –0.718) (R = 1.1k, C = 36.3nF)
50
55
Figure 8. Phase Shift at 50 Hz Due to Component Tolerances
AN-559
L
SH2
L
GND
R
GND
GND
R
SH2
R
SH1
L
SH1
L
W2
R2
R1
L
W1
V1N
V1P
C2
C1
IN
OUT
PHASE
V1N
V1P
SHUNT 330
GND
FREQUENCY – Hz
10
–100
10k
100k 1M
1k
100
50dB
40dB
30dB
20dB
10dB
0dB
80
60
40
20
0
PHASE
MAGNITUDE
Note that this is also why precautions were taken with the design of the calibration network on Channel 2 (volt­age channel). Calibrating the meter by varying the resistance of the attenuation network will not vary the –3 dB frequency and hence the phase response of the network on Channel 2—see Calibrating the Meter sec­tion. Shown in Figure 9 is a plot of phase lag at 50 Hz when the resistance of the calibration network is varied from 660 k (J1–J10 closed) to 1.26 M (J1–J10 open).
0.591
0.592
0.593
DEGREES
0.594
0.595
J1–J10 OPEN (50Hz, –0.59348)
49.9 50.0 FREQUENCY – Hz
Figure 9. Phase Shift Due to Calibration
COMPENSATING FOR PARASITIC SHUNT INDUCTANCE
When used at low frequencies a shunt can be considered a purely resistive element with no significant reactive ele­ments. However, under certain situations even a small amount of stray inductance can cause undesirable effects when a shunt is used in a practical data acquisition sys­tem. The problem is very noticeable when the resistance of the shunt is very low, in the order of 200 µΩ. Shown below is an equivalent circuit for the shunt used in the AD7755 reference design. There are three connections to the shunt. One pair of connections provides the cur­rent sense inputs (V1P and V1N) and the third connection is the ground reference for the system.
J1–J10 CLOSED (50Hz, –0.59308)
50.1
Figure 10. Equivalent Circuit for the Shunt
Canceling the Effects of the Parasitic Shunt Inductance
The effect of the parasitic shunt inductance is shown in Figure 11. The plot shows the phase and magnitude response of the antialias filter network with and without (dashed) a parasitic inductance of 2 nH. As can be seen from the plot, both the gain and phase response of the network are affected. The attenuation at 1 MHz is now only about –15 dB, which could cause some repeatabil­ity and accuracy problems in a noisy environment. More importantly, a phase mismatch may now exist between the current and voltage channels. Assuming the network on Channel 2 has been designed to match the ideal phase response of Channel 1, there now exists a phase mismatch of 0.1° at 50 Hz. Note that 0.1° will cause a
0.3% measurement error at PF = ±0.5. See Equation 2 (Correct Phase Matching Between Channels).
The shunt resistance is shown as R
(350 µΩ). R
SH1
the resistance between the V1N input terminal and the system ground reference point. The main parasitic ele­ments (inductance) are shown as L
SH1
and L 10 also shows how the shunt is connected to the AD7755 inputs (V1P and V1N) through the antialias filters. The function of the antialias filters is explained in the previ­ous section and their ideal magnitude and phase responses are shown in Figures 6 and 7.
. Figure
SH2
SH2
is
Figure 11. Effect of Parasitic Shunt Inductance on the Antialias Network
The problem is caused by the addition of a zero into the antialias network. Using the simple model for the shunt shown in Figure 10, the location of the zero is given as R
SH1/LSH1
radians.
One way to cancel the effects of this additional zero in the network is to add an additional pole at (or close to) the same location. The addition of an extra RC on each analog input of Channel 1 will achieve the additional
–6–
REV. A
AN-559
FREQUENCY – Hz
10
–100
10k 100k 1M
1k
100
50dB
40dB
30dB
20dB
10dB
0dB
80
60
40
20
0
MAGNITUDE
PHASE
pole required. The new antialias network for Channel 1 is shown in Figure 12. To simplify the calculation and demonstrate the principle, the Rs and Cs of the network are assumed to have the same value.
j
POLE #1
POLE #2
3 2
RR
5
11
RC
4
RC
C
H (s) =
3
11
2
RC
ZERO #1
–(RSH/LSH)
2R2C2
S
+ S3RC + 1
+
1
5
4
RC
C
Figure 12. Shunt Inductance Compensation Network
Figure 12 also gives an expression for the location of the poles of this compensation network. The purpose of Pole #1 is to cancel the effects of the zero due to the shunt inductance. Pole #2 will perform the function of the antialias filters as described in the Antialias Filters section. The following illustrates a sample calculation for a shunt of 330 µΩ with a parasitic inductance of 2 nH.
The location of the pole #1 is given as:
321541
−× + ×
RC
For
R
= 330 µΩ,
SH
1
R
is calculated as approximately 480 (use 470 Ω).
L
SH
= 2 nH,
1
 
RC
C
= 33 nF
R
1
SH
=
L
1
SH
The location of Pole #1 is 165,000 rads or 26.26 kHz.
This places the location of Pole # 2 at:
321
−× + ×
RC541RC
=
3.838 kHz
 
To ensure phase-matching between Channel 1 and Channel 2, the pole at Channel 2 must also be positioned at this location. With C = 33 nF, the new value of resistance for the antialias filters on Channel 2 is approximately
1.23 k(use 1.2 kΩ).
Figure 13 shows the effect of the compensation network on the phase and magnitude response of the antialias network in Channel 1. The dashed line shows the response of Channel 2 using practical values for the
newly calculated component values, i.e., 1.2 k and 33 nF. The solid line shows the response of Channel 1 with the parasitic shunt inductance included. Notice phase and magnitude responses match very closely with the ideal response—shown as a dashed line. This is the objective of the compensation network.
Figure 13. Antialias Network Phase and Magnitude Response after Compensation
The method of compensation works well when the pole due to shunt inductance is less than 25 kHz or so. If zero is at a much higher frequency its effects may simply be eliminated by placing an extra RC on Channel 1 with a pole that is a decade greater than that of the antialias filter, e.g., 100 and 33 nF.
Care should be taken when selecting a shunt to ensure its parasitic inductance is small. This is especially true of shunts with small values of resistance, e.g., <200 µΩ. Note that the smaller the shunt resistance, the lower the zero frequency for a given parasitic inductance (Zero = R
SH1/LSH1
).
POWER SUPPLY DESIGN
This design uses a simple low-cost power supply based on a capacitor divider network, i.e., C17 and C18. Most of the line voltage is dropped across C17, a 470 nF 250 V metalized polyester film capacitor. The impedance of C17 dictates the effective VA rating of the supply. How­ever the size of C17 is constrained by the power consumption specification in IEC1036. The total power consumption in the voltage circuit, including power sup­ply, is specified in section 4.4.1.1 of IEC1036 (1996-9). The total power consumption in each phase is 2 W and 10 VA under nominal conditions. The nominal VA rating of the supply in this design is 7 VA. The total power dissi­pation is approximately 0.5 W. Together with the power dissipated in the shunt at 40 A load, the total power con­sumption of the meter is 1.06 W. Figure 14 shows the basic power supply design.
REV. A
–7–
Loading...
+ 15 hidden pages