ANALOG DEVICES ADUM7510 Service Manual

5-Channel, 1 kV

Data Sheet

FEATURES

RoHS-compliant, 16-lead, QSOP package Low power operation: 5 V

1.2 mA per channel maximum @ 0 Mbps to 2 Mbps

2.8 mA per channel maximum @ 10 Mbps High temperature operation: 105°C Up to 10 Mbps data rate (NRZ) Low default output state 1000 V rms isolation rating

Safety and regulatory approvals (pending)

UL recognition

1000 V rms for 1 minute per UL 1577

APPLICATIONS

General-purpose, unidirectional, multichannel isolation

GENERAL DESCRIPTION

The ADuM75101 is a unidirectional 5-channel isolator based on the Analog Devices, Inc., iCoupler® technology. In contrast to the ADuM1510, the ADuM7510 has a lower isolation rating, offering a reduced cost option for applications that can accept a 1 kV ac isolation. Combining high speed CMOS and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices.

By avoiding the use of LEDs and photodiodes, iCoupler devices eliminate the design difficulties commonly associated with optocouplers. The typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects are eliminated with the simple iCoupler digital

Unidirectional Digital Isolator

ADuM7510

FUNCTIONAL BLOCK DIAGRAM

DD1

ADuM7510

GND

V V

V V V

GND

ENCODE DECODE

Figure 1.

interfaces and stable performance characteristics. The need for external drivers and other discrete components is eliminated with these iCoupler products. Furthermore, iCoupler devices run at one-tenth to one-sixth the power consumption of optocouplers at comparable signal data rates.

The ADuM7510 isolator provides five independent isolation channels supporting data rates up to 10 Mbps. Each side operates with the supply voltage of 4.5 V to 5.5 V. Unlike other optocoupler alternatives, the ADuM7510 isolator has a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions.

DD2

GND

07632-001

Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADuM7510 Data Sheet

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics—5 V Operation................................ 3

Package Characteristics ............................................................... 4

Insulation and Safety-Related Specifications ............................ 4

Recommended Operating Conditions ...................................... 4

Regulatory Information ............................................................... 4

REVISION HISTORY

2/12—Rev. A to Rev. B

Created Hyperlink for Safety and Regulatory Approvals

Entry in Features Section ................................................................. 1

Change to Printed Circuit Board (PCB) Layout Section ............ 8

1/10—Revision A: Initial Version

Absolute Maximum Ratings ............................................................5

ESD Caution...................................................................................5

Pin Configuration and Function Descriptions ..............................6

Typical Performance Characteristics ..............................................7

Applications Information .................................................................8

Printed Circuit Board (PCB) Layout ..........................................8

Propagation Delay-Related Parameters ......................................8

DC Correctness and Magnetic Field Immunity..............................8

Power Consumption .....................................................................9

Power-Up/Power-Down Considerations ...................................9

Outline Dimensions ....................................................................... 10

Ordering Guide .......................................................................... 10

Rev. B | Page 2 of 12

Data Sheet ADuM7510

Input Quiescent Supply Current per Channel

DDI (Q)

0.4

0.7

DDO (Q)

DD1

DD1 (Q)

DD2

DD2 (Q)

DD1

DD1 (10)

DD2

DD2 (10)

OEH

OCL

ODL

OEL

SWITCHING SPECIFICATIONS

PHL

PLH

PHL

PSK

PSKCD

Logic High Output7

transient magnitude = 800 V

DDI (D)

DDO (D)

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V OPERATION

All voltages are relative to their respective ground. 4.5 V ≤ V over the entire recommended operation range, unless otherwise noted; all typical specifications are at T

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

≤ 5.5 V, 4.5 V ≤ V

DD1

≤ 5.5 V; all minimum/maximum specifications apply

DD2

= 25°C, V

DD1

= V

DD2

= 5 V.

Output Quiescent Supply Current per Channel I

0.3 0.5 mA

Total Supply Current, Five Channels1

Supply Current, Quiescent I

Supply Current, 10 Mbps Data Rate I

Supply Current, 10 Mbps Data Rate I Input Currents IIA, IIB, IIC, IID, I Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages V

Logic Low Output Voltages V

2.0 3.5 mA VIA = VIB = VIC = VID = VIE = 0 V

1.5 2.5 mA VIA = VIB = VIC = VID = VIE = 0 V

7.7 10 mA 5 MHz logic signal frequency

3.3 4.0 mA 5 MHz logic signal frequency

−10 +1 +10 µA VIA, VIB, VIC, VID, VIE ≥ 0 V V V

, V

OAH

OBH

, V

OCH

ODH

, V

OAL

OBL

, V

2.0 V

0.8 V

− 0.4 4.8 V IOx = −4 mA, VIx = VIH

DD2

0.2 0.4 V IOx = +4 mA, VIx = VIL

, V

Minimum Pulse Width2 PW 100 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 10 Mbps CL = 15 pF, CMOS signal levels Propagation Delay4 t Pulse-Width Distortion, |t

− t

, t

20 27 40 ns CL = 15 pF, CMOS signal levels

PWD 5 ns CL = 15 pF, CMOS signal levels

Change vs. Temperature 5 ps/°C CL = 15 pF, CMOS signal levels Propagation Delay Skew5 t Channel-to-Channel Matching6 t

30 ns CL = 15 pF, CMOS signal levels

5 ns CL = 15 pF, CMOS signal levels Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns CL = 15 pF, CMOS signal levels Common-Mode Transient Immunity at

|CMH| 10 15 kV/µs VIx = V

DD1/VDD2

, VCM = 1000 V,

Common-Mode Transient Immunity at

Logic Low Output

Refresh Rate fr 1.2 Mbps Input Dynamic Supply Current per Channel8 I Output Dynamic Supply Current per Channel8 I

Supply current values are for all five channels combined, running at identical data rates. Output supply current values are specified with no output load present. The

supply current associated with an individual channel, operating at a given data rate, can be calculated as described in the Power Consumption section. See Figure 4 through Figure 6 for information on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See Figure 7 and Figure 8 for total I

and I

DD1

The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. Operation below the minimum pulse width is not

recommended.

The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.

propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. t

PHL

measured from the 50% level of the rising edge of the V

is the magnitude of the worst-case difference in t

PSK

load within the recommended operating conditions.

Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels within the same component.

CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 V × V

rate that can be sustained while maintaining V transient magnitude is the range over which the common mode is slewed.

Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 4 through Figure 6 for infor-

mation on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current for a given data rate.

supply currents as a function of the data rate for the ADuM7510.

DD2

|CML| 10 15 kV/µs VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

0.14 mA/Mbps

0.045 mA/Mbps

propagation delay is

signal to the 50% level of the rising edge of the VOx signal.

and/or t

PHL

< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The

that is measured between units at the same operating temperature, supply voltages, and output

PLH

. CML is the maximum common-mode voltage slew

DD2

Rev. B | Page 3 of 12

PLH

ADuM7510 Data Sheet

Resistance (Input-to-Output)1

I-O

1012 Ω

I-O

Rated Dielectric Insulation Voltage

1000

V rms

1 minute duration

DD1

DD2

PACKAGE CHARACTERISTICS

Table 2.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Capacitance (Input-to-Output)

2.2 pF f = 1 MHz Input Capacitance2 CI 4.0 pF IC Junction-to-Ambient Thermal Resistance, QSOP θJA 76 °C/W Thermocouple located at center of

package underside

The device is considered a 2-terminal device. Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.

Input capacitance is from any input data pin to ground.

INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 3.

Parameter Symbol Value Unit Test Conditions/Comments

Minimum External Air Gap QSOP Package (Clearance) L(I01) 3.8 min mm Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking QSOP Package (Creepage) L(I02) 3.8 min mm Measured from input terminals to output terminals,

shortest distance path along body Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) Maximum Working Voltage Compatible with 50 Years

354 V peak Continuous peak voltage across the isolation barrier

IORM

Service Life

RECOMMENDED OPERATING CONDITIONS

All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on immunity to external magnetic fields.

Table 4.

Parameter Symbol Min Max Unit

Operating Temperature TA −40 +105 °C Supply Voltages V

, V

4.5 5.5 V

Input Signal Rise and Fall Times 1.0 ms

REGULATORY INFORMATION

The ADuM7510 is approved by the organization listed in Table 5.

Table 5.

UL (Pending)

Recognized under UL 1577 component recognition program1 Single/basic insulation, 1000 V rms isolation voltage File E214100

In accordance with UL 1577, each ADuM7510 is proof tested by applying an insulation test voltage of 1200 V rms for 1 sec (current leakage detection limit = 5 µA).

Rev. B | Page 4 of 12

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