8.25 mA per channel maximum @ 25 Mbps
Bidirectional communication
Up to 25 Mbps data rate (NRZ)
3 V/5 V level translation
High temperature operation: 105°C
High common-mode transient immunity: >15 kV/μs
APPLICATIONS
General-purpose, multichannel isolation
SPI interface/data converter isolation
RS-232/RS-422/RS-485 transceivers
Industrial field bus isolation
ADuM7440/ADuM7441/ADuM7442
GENERAL DESCRIPTION
The ADuM744x1 are 4-channel digital isolators based on the
Analog Devices, Inc., iCoupler® technology. Combining high
speed CMOS and monolithic air core transformer technologies,
these isolation components provide outstanding performance
characteristics superior to the alternatives, such as optocoupler
devices and other integrated couplers.
The ADuM744x family of quad 1 kV digital isolation devices
is packaged in a small 16-lead QSOP. While most 4-channel
isolators come in 16-lead wide SOIC packages, the ADuM744x
frees almost 70% of board space and yet can still withstand high
isolation voltage and meet regulatory requirements such as UL
and CSA standards (pending). In addition to the space savings,
the ADuM744x offers a lower price than 2.5 kV or 5 kV
isolators where only functional isolation is needed.
This family, like many Analog Devices isolators, offers very
low power consumption, consuming one-tenth to one-sixth
the power of comparable isolators at comparable data rates up
to 25 Mbps. Despite the low power consumption, all models of
the ADuM744x provide low pulse width distortion (< 5 ns for
C grade). In addition, every model has an input glitch filter to
protect against extraneous noise disturbances.
The ADuM744x isolators provide four independent isolation
channels in a variety of channel configurations and two data
rates (see the Ordering Guide) up to 25 Mbps. All models
operate with the supply voltage on either side ranging from
3.0 V to 5.5 V, providing compatibility with lower voltage
systems as well as enabling voltage translation functionality
across the isolation barrier. All products also have an output
default high logic state in the absence of the input power.
1
Protected by U.S. Patents 5,952,849, 6,873,065 and 7,075,329. Other patents
pending.
FUNCTIONAL BLOCK DIAGRAMS
V
GND
V
GND
DD1A
V
V
V
DD1B
1
ADuM7440
2
1
3
ENCODEDECODE
V
IA
4
ENCODEDECODE
IB
5
ENCODEDECODE
IC
6
ENCODEDECODE
ID
7
8
1
Figure 1. ADuM7440
16
V
DD2A
15
GND
2
14
V
OA
13
V
OB
12
V
OC
11
V
OD
10
V
DD2B
9
GND
2
08340-001
DD1A
GND
DD1B
GND
V
V
V
V
OD
1
ADuM7441
2
1
3
ENCODEDECODE
IA
4
ENCODEDECODE
IB
5
ENCODEDECODE
IC
6
DECODEENCODE
7
8
1
Figure 2. ADuM7441
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
All typical specifications are at TA = 25°C, V
operation range of 4.5 V ≤ V
are tested with C
= 15 pF, and CMOS signal levels, unless otherwise noted.
L
≤ 5.5 V, 4.5 V ≤ V
DD1
Table 1.
DD1
= V
= 5 V. Minimum/maximum specifications apply over the entire recommended
DD2
≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
DD2
Parameter Symbol
Unit Test Conditions
SWITCHING SPECIFICATIONS
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
Pulse Width Distortion PWD 10 25 2 5 ns |t
, t
50 75 29 40 50 ns 50% input to 50% output
− t
|
Change vs. Temperature 5 3 ps/°C
Propagation Delay Skew
t
20 10 ns
Channel Matching
Codirectional t
Opposing-Direction t
25 2 4 ns 30 3 6 ns
Jitter 2 2 ns
1
t
is the magnitude of the worst-case difference in t
PSK
recommended operating conditions.
or t
that is measured between units a t the same operating temperature, supply voltages, and output load within the
PHL
PLH
Table 2.
ParameterSymbol
SUPPLY CURRENT
ADuM7440 I
I
ADuM7441 I
I
ADuM7442 I
I
4.3 5.4 28 35 mA
2.5 3.6 6.0 11 mA
DD2
4.1 4.9 18 26 mA
3.6 4.7 8.5 14 mA
DD2
3.2 4.0 15 20 mA
3.2 4.0 12 17 mA
DD2
UnitTest Conditions
Table 3. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH 0.7 V
Logic Low Input Threshold VIL 0.3 V
Logic High Output Voltages VOH V
V
V
V
− 0.1 5.0 V IOx = −20 µA, VIx = V
− 0.4 4.8 V IOx = −4 mA, VIx = V
Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 µA, VIx = V
0.2 0.4 V IOx = 4 mA, VIx = V
Input Current per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ V
Supply Current per Channel
Quiescent Input Supply Current I
Quiescent Output Supply Current I
0.76 0.95 mA
0.57 0.73 mA
Dynamic Output Supply Current I
AC SPECIFICATIONS
Common-Mode Transient Immunity
Refresh Rate fr 1.2 Mbps
1
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
common-mode voltage edges.
0.05 mA/Mbps
|CM| 15 25 kV/µs VIx = V
, VCM = 1000 V,
DDx
transient magnitude = 800 V
> 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling
Rev. C | Page 3 of 20
O
ADuM7440/ADuM7441/ADuM7442 Data Sheet
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, V
operation range of 3.0 V ≤ V
are tested with C
= 15 pF and CMOS signal levels, unless otherwise noted.
L
≤ 3.6 V, 3.0 V ≤ V
DD1
Table 4.
A Grade C Grade
Parameter Symbol
SWITCHING SPECIFICATIONS
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
Pulse Width Distortion PWD 10 25 2 5 ns |t
Change vs. Temperature 5 3 ps/°C
Pulse Width PW 250 40 ns Within PWD limit
Propagation Delay Skew
1
t
PSK
Channel Matching
Codirectional t
Opposing-Direction t
PSKCD
PSKOD
Jitter 2 2 ns
1
t
is the magnitude of the worst-case difference in t
PSK
within the recommended operating conditions.
Table 5.
1 Mbps—A, C Grades 25 Mbps—C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
SUPPLY CURRENT
ADuM7440 I
I
ADuM7441 I
I
ADuM7442 I
I
3.0 3.8 20 28 mA
DD1
1.8 2.3 4.0 5.0 mA
DD2
2.8 3.5 14 20 mA
DD1
2.5 3.3 5.5 7.5 mA
DD2
2.2 2.7 10 13 mA
DD1
2.2 2.8 8.4 11 mA
DD2
= V
DD1
, t
60 85 37 51 66 ns 50% input to 50% output
PLH
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
DD2
≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
DD2
Min Typ Max Min
Typ Max
Unit Test Conditions
− t
|
PLH
PHL
20 10 ns
25 3 5 ns
30 4 7 ns
or t
that is measured between units at the same operating temperature, supply voltages, and output load
PHL
PLH
Table 6. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH 0.7 V
Logic Low Input Threshold VIL 0.3 V
Logic High Output Voltages VOH V
V
Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V
0.2 0.4 V IOx = 4 mA, VIx = V
Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ V
DDx
− 0.2 3.3 V IOx = −20 μA, VIx = V
DDx
− 0.4 3.1 V IOx = −4 mA, VIx = V
DDx
V
DDx
V
DDx
IxH
IxH
IxL
IxL
Supply Current per Channel
Quiescent Input Supply Current I
Quiescent Output Supply Current I
Dynamic Input Supply Current I
Dynamic Output Supply Current I
0.50 mA
DDI(Q)
0.41 mA
DDO(Q)
0.18 mA/Mbps
DDI(D)
0.02 mA/Mbps
DDO(D)
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.8 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 15 20 kV/μs
= V
Ix
DDx
, VCM = 1000 V,
V
transient magnitude = 800 V
Refresh Rate fr 1.1 Mbps
1
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 4 of 20
Data Sheet ADuM7440/ADuM7441/ADuM7442
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
All typical specifications are at TA = 25°C, V
mended operation range of 4.5 V ≤ V
specifications are tested with C
DD1
= 15 pF and CMOS signal levels, unless otherwise noted.
L
Table 7.
A Grade C Grade
Parameter Symbol
SWITCHING SPECIFICATIONS
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
Pulse Width Distortion PWD 10 25 2 5 ns |t
Change vs. Temperature 5 3 ps/°C
Pulse Width PW 250 40 ns Within PWD limit
Propagation Delay Skew
1
t
PSK
Channel Matching
Codirectional t
Opposing-Direction t
PSKCD
PSKOD
Jitter 2 2 ns
1
t
is the magnitude of the worst-case difference in t
PSK
within the recommended operating conditions.
Table 8.
Parameter
Symbol
SUPPLY CURRENT
ADuM7440 I
I
ADuM7441 I
I
ADuM7442 I
I
4.4 5.5 28 35 mA
DD1
1.6 2.1 3.5 4.5 mA
DD2
3.7 5.0 19 27 mA
DD1
2.2 2.8 5.2 7.0 mA
DD2
3.2 3.9 15 20 mA
DD1
2.0 2.6 7.8 12 mA
DD2
= 5 V, V
DD1
≤ 5.5 V, 3.0 V ≤ V
Min Typ Max Min Typ Max
, t
55 80 30 42 55 ns 50% input to 50% output
PLH
= 3.3 V. Minimum/maximum specifications apply over the entire recom-
DD2
≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching
DD2
UnitTest Conditions
− t
PHL
|
PLH
20 10 ns
25 2 5 ns
30 3 6 ns
or t
that is measured between units at the same operating temperature, supply voltages, and output load
PHL
PLH
1 Mbps—A, C Grades 25 Mbps—C Grade
Min Typ Max Min Typ Max
Unit
Test Conditions
Table 9. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH 0.7 V
Logic Low Input Threshold VIL 0.3 V
Logic High Output Voltages VOH V
V
Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V
0.2 0.4 V IOx = 4 mA, VIx = V
Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ V
DDx
− 0.1 V
DDx
− 0.4 V
DDx
V IOx = −20 μA, VIx = V
DDx
− 0.2 V IOx = −4 mA, VIx = V
DDx
V
DDx
V
DDx
IxH
IxH
IxL
IxL
Supply Current per Channel
Quiescent Input Supply Current I
Quiescent Output Supply Current I
Dynamic Input Supply Current I
Dynamic Output Supply Current I
0.77 mA
DDI(Q)
0.40 mA
DDO(Q)
0.26 mA/Mbps
DDI(D)
0.02 mA/Mbps
DDO(D)
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity
1
|CM| 15 20 kV/μs
= V
Ix
DDx
, VCM = 1000 V,
V
transient magnitude = 800 V
Refresh Rate fr 1.2 Mbps
1
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 5 of 20
ADuM7440/ADuM7441/ADuM7442 Data Sheet
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION
All typical specifications are at TA = 25°C, V
mended operation range of 3.0 V ≤ V
specifications are tested with C
DD1
= 15 pF and CMOS signal levels, unless otherwise noted.
L
Table 10.
A Grade C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
SWITCHING SPECIFICATIONS
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
Pulse Width Distortion PWD 10 25 2 5 ns |t
Change vs. Temperature 5 3 ps/°C
Pulse Width PW 250 40 ns Within PWD limit
Propagation Delay Skew
1
t
PSK
Channel Matching
Codirectional t
Opposing-Direction t
PSKCD
PSKOD
Jitter 2 2 ns
1
t
is the magnitude of the worst-case difference in t
PSK
within the recommended operating conditions.
Table 11.
1 Mbps—A, C Grades 25 Mbps—C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
SUPPLY CURRENT
ADuM7440 I
I
ADuM7441 I
I
ADuM7442 I
I
DD1
DD2
DD1
DD2
DD1
DD2
= 3.3 V, V
DD1
≤ 3.6 V, 4.5 V ≤ V
, t
55 80 31 46 60 ns 50% input to 50% output
PLH
= 5 V. Minimum/maximum specifications apply over the entire recom-
DD2
≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching
DD2
− t
|
PLH
PHL
20 10 ns
25 2 5 ns
30 3 7 ns
or t
that is measured between units at the same operating temperature, supply voltages, and output load
PHL
PLH
2.7 3.3 18 24
2.5 3.3 5.7 8.0
2.5 3.3 12 20
3.6 4.6 8.0 11
2.0 2.4 8.9 13
3.2 4.0 12 15
mA
mA
mA
mA
mA
mA
Table 12. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH 0.7 V
Logic Low Input Threshold VIL 0.3 V
Logic High Output Voltages VOH V
V
Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V
0.2 0.4 V IOx = 4 mA, VIx = V
Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ V
DDx
− 0.1 V
DDx
− 0.4 V
DDx
V IOx = −20 μA, VIx = V
DDx
− 0.2 V IOx = −4 mA, VIx = V
DDx
V
DDx
V
DDx
IxH
IxH
IxL
IxL
Supply Current per Channel
Quiescent Input Supply Current I
Quiescent Output Supply Current I
Dynamic Input Supply Current I
Dynamic Output Supply Current I
0.50 0.60 mA
DDI(Q)
0.61 0.73 mA
DDO(Q)
0.17 mA/Mbps
DDI(D)
0.03 mA/Mbps
DDO(D)
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 15 20 kV/μs
= V
Ix
DDx
, VCM = 1000 V,
V
transient magnitude = 800 V
Refresh Rate fr 1.1 Mbps
1
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 6 of 20
Loading...
+ 14 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.