ANALOG DEVICES ADSP-TS101 Service Manual
ADSP-TS101 TigerSHARC® Processor
Programming Reference
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
Revision 1.1, February 2005
Part Number
82-001997-01
a
Copyright Information
© 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, Blackfin, EZ-ICE, EZ-KIT Lite, SHARC,
TigerSHARC, the TigerSHARC logo, and VisualDSP++ are registered
trademarks of Analog Devices, Inc.
SuperScalar is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xvii
Intended Audience ........................................................................ xvii
Manual Contents ......................................................................... xviii
What’s New in This Manual ........................................................... xix
Technical or Customer Support ....................................................... xx
Supported Processors ....................................................................... xx
Product Information ...................................................................... xxi
MyAnalog.com ........................................................................ xxii
Processor Product Information ................................................. xxii
Related Documents ............................................................... xxiii
Online Technical Documentation ........................................... xxiv
Accessing Documentation From VisualDSP++ ..................... xxv
Accessing Documentation From Windows ........................... xxv
Accessing Documentation From the Web ............................ xxvi
Printed Manuals ..................................................................... xxvi
VisualDSP++ Documentation Set ....................................... xxvi
Hardware Tools Manuals .................................................... xxvi
ADSP-TS101 TigerSHARC Processor Programming Reference iii
CONTENTS
Processor Manuals ............................................................. xxvi
Data Sheets ...................................................................... xxvii
Conventions .............................................................................. xxviii
INTRODUCTION
DSP Architecture ......................................................................... 1-6
Compute Blocks ..................................................................... 1-8
Arithmetic Logic Unit (ALU) .............................................. 1-9
Multiply Accumulator (Multiplier) .................................... 1-11
Bit Wise Barrel Shifter (Shifter) ........................................ 1-11
Integer Arithmetic Logic Unit (IALU) ................................... 1-12
Program Sequencer ............................................................... 1-13
Quad Instruction Execution .............................................. 1-15
Relative Addresses for Relocation ...................................... 1-16
Nested Call and Interrupt ................................................. 1-16
Context Switching ............................................................ 1-16
Internal Memory and Other Internal Peripherals .................... 1-16
Internal Buses ................................................................... 1-17
Internal Transfer ............................................................... 1-18
Data Accesses ................................................................... 1-18
Quad Data Access ............................................................. 1-18
Booting ................................................................................ 1-19
Scalability and Multiprocessing ............................................. 1-19
Emulation and Test Support .................................................. 1-20
iv ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
Instruction Line Syntax and Structure .......................................... 1-20
Instruction Notation Conventions ......................................... 1-22
Unconditional Execution Support .......................................... 1-23
Conditional Execution Support .............................................. 1-24
Instruction Parallelism Rules ....................................................... 1-24
General Restriction ................................................................ 1-36
Compute Block Instruction Restrictions ................................. 1-37
IALU Instruction Restrictions ................................................ 1-39
Sequencer Instruction Restrictions ......................................... 1-45
COMPUTE BLOCK REGISTERS
Register File Registers .................................................................... 2-5
Compute Block Selection ......................................................... 2-7
Register Width Selection ......................................................... 2-8
Operand Size and Format Selection ........................................ 2-10
Registers File Syntax Summary ............................................... 2-13
Numeric Formats ........................................................................ 2-16
IEEE Single-Precision Floating-Point Data Format ................. 2-16
Extended Precision Floating-Point Format .............................. 2-19
Fixed-Point Formats .............................................................. 2-19
ADSP-TS101 TigerSHARC Processor Programming Reference v
CONTENTS
ALU
ALU Operations ........................................................................... 3-5
ALU Instruction Options ........................................................ 3-7
Signed/Unsigned Option .................................................... 3-8
Saturation Option .............................................................. 3-8
Extension (ABS) Option ..................................................... 3-9
Truncation Option ............................................................. 3-9
Return Zero (MAX/MIN) Option .................................... 3-10
Fractional/Integer Option ................................................. 3-11
ALU Execution Status ........................................................... 3-11
AN — ALU Negative ....................................................... 3-13
AV — ALU Overflow ....................................................... 3-13
AI — ALU Invalid ............................................................ 3-14
AC — ALU Carry ............................................................ 3-14
ALU Execution Conditions ................................................... 3-14
ALU Static Flags ................................................................... 3-15
ALU Examples ........................................................................... 3-16
Example Parallel Addition of Byte Data ................................. 3-18
Example Sideways Addition of Byte Data ............................... 3-19
Example Parallel Result (PR) Register Usage .......................... 3-19
CLU Examples ........................................................................... 3-21
CLU Data Types and Sizes .................................................... 3-22
TMAX Function ................................................................... 3-23
Trellis Function ..................................................................... 3-24
vi ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
Despread Function ................................................................ 3-26
CLU Execution Status ........................................................... 3-27
ALU Instruction Summary .......................................................... 3-28
MULTIPLIER
Multiplier Operations ................................................................... 4-4
Multiplier Instruction Options ................................................ 4-8
Signed/Unsigned Option ................................................... 4-10
Fractional/Integer Option ................................................. 4-10
Saturation Option ............................................................. 4-11
Truncation Option ............................................................ 4-12
Clear/Round Option ......................................................... 4-14
Complex Conjugate Option .............................................. 4-16
Multiplier Result Overflow (MR4) Register ............................ 4-17
Multiplier Execution Status ................................................... 4-18
Multiplier Execution Conditions ............................................ 4-20
Multiplier Static Flags ............................................................ 4-21
Multiplier Examples .................................................................... 4-21
Multiplier Instruction Summary .................................................. 4-23
SHIFTER
Shifter Operations ......................................................................... 5-3
Logical Shift Operation ........................................................... 5-5
Arithmetic Shift Operation ...................................................... 5-6
Bit Manipulation Operations ................................................... 5-7
ADSP-TS101 TigerSHARC Processor Programming Reference vii
CONTENTS
Bit Field Manipulation Operations .......................................... 5-8
Bit Field Conversion Operations ........................................... 5-11
Bit Stream Manipulation Operations ..................................... 5-11
Shifter Instruction Options ................................................... 5-14
Sign Extended Option ...................................................... 5-15
Zero Filled Option ........................................................... 5-15
Shifter Execution Status ........................................................ 5-15
Shifter Execution Conditions ................................................ 5-16
Shifter Static Flags ................................................................ 5-17
Shifter Examples ......................................................................... 5-17
Shifter Instruction Summary ....................................................... 5-19
IALU
IALU Operations .......................................................................... 6-5
IALU Arithmetic, Logical, and Function Operations ................ 6-5
IALU Instruction Options .................................................. 6-6
Integer Data ................................................................... 6-7
Signed/Unsigned Option ................................................ 6-8
Circular Buffer Option ................................................... 6-8
Bit Reverse Option ......................................................... 6-9
Computed Jump Option ................................................. 6-9
IALU Execution Status ..................................................... 6-10
JN/KN–IALU Negative ................................................ 6-11
JV/KV–IALU Overflow ................................................ 6-11
JC/KC–IALU Carry ...................................................... 6-11
viii ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
IALU Execution Conditions .............................................. 6-12
IALU Static Flags .............................................................. 6-13
IALU Data Addressing and Transfer Operations ..................... 6-13
Direct and Indirect Addressing .......................................... 6-14
Normal, Merged, and Broadcast Memory Accesses ............. 6-16
Data Alignment Buffer (DAB) Accesses ............................. 6-23
Circular Buffer Addressing ................................................ 6-27
Bit Reverse Addressing ...................................................... 6-31
Universal Register Transfer Operations .............................. 6-35
Immediate Extension Operations ....................................... 6-36
IALU Examples ........................................................................... 6-37
IALU Instruction Summary ......................................................... 6-39
PROGRAM SEQUENCER
Sequencer Operations ................................................................... 7-7
Conditional Execution ........................................................... 7-12
Branching Execution ............................................................. 7-16
Looping Execution ................................................................ 7-19
Interrupting Execution .......................................................... 7-20
Instruction Pipeline Operations ................................................... 7-26
Instruction Alignment Buffer (IAB) ....................................... 7-31
Branch Target Buffer (BTB) ................................................... 7-34
Conditional Branch Effects on Pipeline .................................. 7-44
ADSP-TS101 TigerSHARC Processor Programming Reference ix
CONTENTS
Dependency and Resource Effects on Pipeline ........................ 7-55
Stall From Compute Block Dependency ............................ 7-56
Stall from Bus Conflict ..................................................... 7-59
Stall From Compute Block Load Dependency ................... 7-62
Stall From IALU Load Dependency .................................. 7-63
Stall From Load (From External Memory) Dependency ..... 7-64
Stall From Conditional IALU Load Dependency ............... 7-64
Interrupt Effects on Pipeline ................................................. 7-66
Interrupt During Conditional Instruction ......................... 7-68
Interrupt During Interrupt Disable Instruction ................. 7-70
Exception Effects on Pipeline ................................................ 7-72
Sequencer Examples .................................................................... 7-72
Sequencer Instruction Summary .................................................. 7-76
INSTRUCTION SET
ALU Instructions .......................................................................... 8-2
Add/Subtract .......................................................................... 8-3
Add/Subtract With Carry/Borrow ............................................ 8-6
Average ................................................................................... 8-8
Absolute Value/Absolute Value of Sum or Difference .............. 8-10
Negate .................................................................................. 8-13
Maximum/Minimum ............................................................ 8-14
Viterbi Maximum/Minimum ................................................. 8-17
Increment/Decrement ........................................................... 8-20
Compare ............................................................................... 8-22
x ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
Clip ...................................................................................... 8-24
Sum ...................................................................................... 8-26
Ones Counting ...................................................................... 8-28
Parallel Result Register ........................................................... 8-29
Bit FIFO Increment .............................................................. 8-30
Parallel Absolute Value of Difference ...................................... 8-32
Sideways Sum ........................................................................ 8-34
Add/Subtract (Dual Operation) ............................................. 8-36
Pass ....................................................................................... 8-37
Logical AND/AND NOT/OR/XOR/NOT ............................ 8-38
Expand ................................................................................. 8-40
Compact ............................................................................... 8-45
Merge ................................................................................... 8-49
Add/Subtract (Floating-Point) ................................................ 8-51
Average (Floating-Point) ........................................................ 8-53
Maximum/Minimum (Floating-Point) ................................... 8-55
Absolute Value (Floating-Point) ............................................. 8-57
Negate (Floating-Point) ......................................................... 8-60
Compare (Floating-Point) ...................................................... 8-62
Floating- to Fixed-Point Conversion ...................................... 8-64
Fixed- to Floating-Point Conversion ...................................... 8-66
Floating-Point Normal to Extended Word Conversion ............ 8-68
Floating-Point Extended to Normal Word Conversion ............ 8-70
Clip (Floating-Point) ............................................................. 8-72
ADSP-TS101 TigerSHARC Processor Programming Reference xi
CONTENTS
Copysign (Floating-Point) ..................................................... 8-74
Scale (Floating-Point) ............................................................ 8-76
Pass (Floating-Point) ............................................................. 8-78
Reciprocal (Floating-Point) ................................................... 8-80
Reciprocal Square Root (Floating-Point) ................................ 8-82
Mantissa (Floating-Point) ...................................................... 8-85
Logarithm (Floating-Point) ................................................... 8-87
Add/Subtract (Dual Operation, Floating-Point) ..................... 8-89
CLU Instructions ....................................................................... 8-91
Trellis Maximum (CLU) ........................................................ 8-92
Maximum (CLU) .................................................................. 8-99
Trellis Registers (CLU) ........................................................ 8-104
Despread (CLU) ................................................................. 8-106
Add/Compare/Select (CLU) ................................................ 8-113
Permute (Byte Word, CLU) ................................................. 8-117
Permute (Short Word, CLU) ............................................... 8-119
Multiplier Instructions .............................................................. 8-121
Multiply (Normal Word) ..................................................... 8-122
Multiply-Accumulate (Normal Word) .................................. 8-125
Multiply-Accumulate/Move (Dual Operation,
Normal Word) ................................................................. 8-130
Multiply (Quad-Short Word) .............................................. 8-138
Multiply-Accumulate (Quad-Short Word) ........................... 8-141
Multiply-Accumulate (Dual Operation,
Quad-Short Word) ........................................................... 8-146
xii ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
Complex Multiply-Accumulate (Short Word) ....................... 8-152
Complex Multiply-Accumulate/Move (Dual Operation,
Short Word) ..................................................................... 8-156
Multiply (Floating-Point, Normal/Extended Word) .............. 8-163
Multiplier Result Register .................................................... 8-165
Compact Multiplier Result .................................................. 8-171
Shifter Instructions ................................................................... 8-175
Arithmetic/Logical Shift ...................................................... 8-176
Rotate ................................................................................. 8-179
Field Extract ........................................................................ 8-181
Field Deposit ....................................................................... 8-183
Field/Bit Mask .................................................................... 8-185
Get Bits ............................................................................... 8-187
Put Bits ............................................................................... 8-189
Bit Test ............................................................................... 8-191
Bit Clear/Set/Toggle ............................................................ 8-192
Extract Leading Zeros .......................................................... 8-194
Extract Exponent ................................................................. 8-195
XSTAT/YSTAT Register ...................................................... 8-196
Block Floating-Point ............................................................ 8-197
BFOTMP Register .............................................................. 8-199
IALU (Integer) Instructions ....................................................... 8-200
Add/Subtract (Integer) ......................................................... 8-202
Add/Subtract With Carry/Borrow (Integer) .......................... 8-204
Average (Integer) ................................................................. 8-206
ADSP-TS101 TigerSHARC Processor Programming Reference xiii
CONTENTS
Compare (Integer) .............................................................. 8-208
Maximum/Minimum (Integer) ............................................ 8-210
Absolute Value (Integer) ...................................................... 8-212
Logical AND/AND NOT/OR/XOR/NOT (Integer) ............ 8-213
Arithmetic Shift/Logical Shift (Integer) ............................... 8-215
Left Rotate/Right Rotate (Integer) ....................................... 8-217
IALU (Load/Store/Transfer) Instructions ................................... 8-218
Universal Register Load (Data Addressing) ........................... 8-220
Universal Register Store (Data Addressing) .......................... 8-221
Data Register Load and DAB Operation
(Data Addressing) ............................................................ 8-222
Data Register Store (Data Addressing) ................................. 8-224
Universal Register Transfer .................................................. 8-226
Sequencer Instructions .............................................................. 8-228
Jump/Call ........................................................................... 8-230
Computed Jump/Call .......................................................... 8-232
Return (from Interrupt) ...................................................... 8-234
Reduce (Interrupt to Subroutine) ........................................ 8-236
If – Do (Conditional Execution) ......................................... 8-237
If – Else (Conditional Sequencing and Execution) ................ 8-238
Static Flag Registers ............................................................ 8-239
Idle ..................................................................................... 8-240
BTB Invalid ........................................................................ 8-241
xiv ADSP-TS101 TigerSHARC Processor Programming Reference
CONTENTS
Trap .................................................................................... 8-242
Emulator Trap ..................................................................... 8-243
No Operation ...................................................................... 8-244
QUICK REFERENCE
ALU Quick Reference .................................................................. A-2
Multiplier Quick Reference .......................................................... A-6
Shifter Quick Reference ............................................................... A-8
IALU Quick Reference ............................................................... A-10
Sequencer Quick Reference ........................................................ A-13
REGISTER/BIT DEFINITIONS
INSTRUCTION DECODE
Instruction Structure .................................................................... C-1
Compute Block Instruction Format .............................................. C-3
ALU Instructions .................................................................... C-4
ALU Fixed-Point, Arithmetic and Logical
Instructions (CU=00) ...................................................... C-5
ALU Fixed-Point, Data Conversion
Instructions (CU=01) ...................................................... C-7
ALU Floating-Point, Arithmetic and Logical
Instructions (CU=01) .................................................... C-10
CLU Instructions ............................................................. C-12
Multiplier Instructions ......................................................... C-14
ADSP-TS101 TigerSHARC Processor Programming Reference xv
CONTENTS
Shifter Instructions ............................................................... C-18
Shifter Instructions Using Single Normal-Word
Operands and Single Register ......................................... C-18
Shifter Instructions Using Single Long-Word
or Dual Normal-Word Operands and Dual Register ........ C-19
Shifter Instructions Using Short or Byte Operands
and Single or Dual Registers ........................................... C-20
Shifter Instructions Using Single Operand ......................... C-22
IALU (Integer) Instruction Format .............................................. C-24
IALU Move Instruction Format .................................................. C-25
IALU Load Data Instruction Format ........................................... C-27
IALU Load/Store Instruction Format .......................................... C-28
IALU Immediate Extension Format ............................................. C-32
Sequencer Instruction Format ..................................................... C-33
Sequencer Flow Control Instructions ..................................... C-33
Sequencer Direct Jump/Call Instruction Format .................... C-34
Sequencer Indirect Jump Instruction Format .......................... C-36
Condition Codes .................................................................. C-39
Compute Block Conditions .............................................. C-39
IALU Conditions ............................................................. C-40
Sequencer and External Conditions ................................... C-40
Sequencer Immediate Extension Format ...................................... C-41
Miscellaneous Instruction Format ............................................... C-42
INDEX
xvi ADSP-TS101 TigerSHARC Processor Programming Reference
PREFACE
Thank you for purchasing and developing systems using TigerSHARC®
processors from Analog Devices.
Purpose of This Manual
The ADSP-TS101 TigerSHARC Processor Programming Reference contains
information about the DSP architecture and DSP assembly language for
TigerSHARC processors. These are 32-bit, fixed- and floating-point digital signal processors from Analog Devices for use in computing,
communications, and consumer applications.
The manual provides information on how assembly instructions execute
on the TigerSHARC processor’s architecture along with reference information about DSP operations.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the appropriate hardware reference manuals and data sheets) that
describe your target architecture.
ADSP-TS101 TigerSHARC Processor Programming Reference xvii
Manual Contents
Manual Contents
The manual consists of:
• Chapter 1, “Introduction”
Provides a general description of the DSP architecture, instruction
slot/line syntax, and instruction parallelism rules.
• Chapter 2, “Compute Block Registers”
Provides a description of the compute block register file, register
naming syntax, and numeric formats.
• Chapter 3, “ALU”
Provides a description of the arithmetic logic unit (ALU) and communications logic unit (CLU) operation, includes ALU/CLU
instruction examples, and provides the ALU instruction summary.
• Chapter 4, “Multiplier”
Provides a description of the multiply-accumulator (multiplier)
operation, includes multiplier instruction examples, and provides
the multiplier instruction summary.
• Chapter 5, “Shifter”
Provides a description of the bit wise, barrel shifter (shifter) operation, includes shifter instruction examples, and provides the shifter
instruction summary.
• Chapter 6, “IALU”
Provides a description of the integer arithmetic logic unit (IALU)
and data alignment buffer (DAB) operation, includes IALU
instruction examples, and provides the IALU instruction summary.
• Chapter 7, “Program Sequencer”
Provides a description of the program sequencer operation, the
instruction alignment buffer (IAB), the branch target buffer
(BTB), and the instruction pipeline. This chapter also includes a
program sequencer instruction summary.
xviii ADSP-TS101 TigerSHARC Processor Programming Reference
• Chapter 8, “Instruction Set”
Describes the ADSP-TS101 processor instruction set in detail,
starting with an overview of the instruction line and instruction
types.
• Appendix A, “Quick Reference”
Contains a concise description of the ADSP-TS101 processor
assembly language. It is intended to be used as an assembly programming reference.
• Appendix B, “Register/Bit Definitions”
Provides register and bit name definitions to be used in
ADSP-TS101 processor programs.
• Appendix C, “Instruction Decode”
Identifies operation codes (opcodes) for instructions. Use this
chapter to learn how to construct opcodes.
Preface
L
This programming reference is a companion document to the
ADSP-TS101 TigerSHARC Processor Hardware Reference.
What’s New in This Manual
Revision 1.1 of the ADSP-TS101 TigerSHARC Processor Programming Reference corrects and closes all open Tool Anomaly Reports (TARs) against
this manual, adds figure titles that were missing, and updates Web site and
contact numbers. These changes affect the preface, various chapters,
appendices, and the index.
ADSP-TS101 TigerSHARC Processor Programming Reference xix
Technical or Customer Support
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in any of the following ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
dsptools.support@analog.com
• E-mail processor questions to
embedded.support@analog.com
dsp.support@analog.com
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The following is the list of Analog Devices, Inc. processors supported in
VisualDSP++®.
xx ADSP-TS101 TigerSHARC Processor Programming Reference
Preface
TigerSHARC (ADSP-TSxxx) Processors
The name “TigerSHARC” refers to a family of floating-point and
fixed-point [8-bit, 16-bit, and 32-bit] processors. VisualDSP++ currently
supports the following TigerSHARC processors:
ADSP-TS101, ADSP-TS201, ADSP-TS202, and ADSP-TS203
SHARC® (ADSP-21xxx) Processors
The name “SHARC” refers to a family of high-performance, 32-bit,
floating-point processors that can be used in speech, sound, graphics, and
imaging applications. VisualDSP++ currently supports the following
SHARC processors:
ADSP-21020, ADSP-21060, ADSP-21061, ADSP-21062,
ADSP-21065L, ADSP-21160, ADSP-21161, ADSP-21261,
ADSP-21262, ADSP-21266, ADSP-21267, ADSP-21363, ADSP-21364,
and ADSP-21365
Blackfin® (ADSP-BFxxx) Processors
The name “Blackfin” refers to a family of 16-bit, embedded processors.
VisualDSP++ currently supports the following Blackfin processors:
ADSP-BF531, ADSP-BF532 (formerly ADSP-21532), ADSP-BF533,
ADSP-BF535 (formerly ADSP-21535), ADSP-BF561, AD6532, and
AD90747
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at www.analog.com. Our Web site provides information about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
ADSP-TS101 TigerSHARC Processor Programming Reference xxi
Product Information
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration
Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as a means to select the
information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit the Analog
Devices Web site at www.analog.com/processors, which provides access
to technical publications, data sheets, application notes, product overviews, and product announcements.
xxii ADSP-TS101 TigerSHARC Processor Programming Reference
Preface
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
embedded.support@analog.com
dsp.support@analog.com
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
• Access the FTP Web site at
ftp ftp.analog.com (or ftp 137.71.25.69)
ftp://ftp.analog.com
Related Documents
The following publications that describe the ADSP-TS101 TigerSHARC
processor (and related processors) can be ordered from any Analog Devices
sales office:
• ADSP-TS101S TigerSHARC Embedded Processor Data Sheet
• ADSP-TS101 TigerSHARC Processor Hardware Reference
• ADSP-TS101 TigerSHARC Processor Programming Reference
For information on product related development software and Analog
Devices processors, see these publications:
• VisualDSP++ User's Guide for TigerSHARC Processors
• VisualDSP++ C/C++ Compiler and Library Manual for Tiger-
SHARC Processors
• VisualDSP++ Assembler and Preprocessor Manual for TigerSHARC
Processors
ADSP-TS101 TigerSHARC Processor Programming Reference xxiii
Product Information
• VisualDSP++ Linker and Utilities Manual for TigerSHARC
Processors
• VisualDSP++ Kernel (VDK) User's Guide
Visit the Technical Library Web site to access all processor and tools
manuals and data sheets:
http://www.analog.com/processors/technical_library
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .PDF files of most manuals are also provided.
Each documentation file type is described as follows.
File Description
.CHM Help system files and manuals in Help format
.HTM or
.HTML
.PDF VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the
Internet Explorer 4.0 (or higher).
Viewing and printing the .PDF files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
.HTML files requires a browser, such as
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD-ROM at any time
by running the Tools installation. Access the online documentation from
the VisualDSP++ environment, Windows® Explorer, or the Analog
Devices Web site.
xxiv ADSP-TS101 TigerSHARC Processor Programming Reference
Preface
Accessing Documentation From VisualDSP++
From the VisualDSP++ environment:
• Access VisualDSP++ online Help from the Help menu’s Contents,
Search, and Index commands.
• Open online Help from context-sensitive user interface items (toolbar buttons, menu commands, and windows).
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (.
CHM) are located in the Help folder, and .PDF files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Using Windows Explorer
• Double-click the vdsp-help.chm file, which is the master Help system, to access all the other .CHM files.
• Double-click any file that is part of the VisualDSP++ documentation set.
Using the Windows Start Button
• Access VisualDSP++ online Help by clicking the Start button and
choosing Programs, Analog Devices, VisualDSP++, and
VisualDSP++ Documentation.
• Access the
.PDF files by clicking the Start button and choosing
Programs, Analog Devices, VisualDSP++, Documentation for
Printing, and the name of the book.
ADSP-TS101 TigerSHARC Processor Programming Reference xxv
Product Information
Accessing Documentation From the Web
Download manuals at the following Web site:
http://www.analog.com/processors/technical_library
Select a processor family and book title. Download archive (.ZIP) files, one
for each manual. Use any archive management software, such as WinZip,
to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir.
Hardware Tools Manuals
To purchase EZ-KIT Lite® and In-Circuit Emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
xxvi ADSP-TS101 TigerSHARC Processor Programming Reference
Preface
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
ADSP-TS101 TigerSHARC Processor Programming Reference xxvii
Conventions
Conventions
Text conventions used in this manual are identified and described as
follows.
Example Description
Close command
(File menu)
{this | that} Alternative items in syntax descriptions appear within curly brackets
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
and separated by vertical bars; read the example as this or that. One
or the other is required.
rated by vertical bars; read the example as an optional
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of this.
letter gothic font.
Note: For correct operation, ...
A Note: provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution: identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this or that.
Warn in g: Injury to device users may result if ...
A Warning: identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for devices
users. In the online version of this book, the word Wa rnin g appears
instead of this symbol.
xxviii ADSP-TS101 TigerSHARC Processor Programming Reference
Preface
L
Additional conventions, which apply only to specific chapters, may
appear throughout this document.
ADSP-TS101 TigerSHARC Processor Programming Reference xxix
Conventions
xxx ADSP-TS101 TigerSHARC Processor Programming Reference
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