ANALOG DEVICES ADSP2106x Service Manual

Engineer To Engineer Note EE-109
Technical Notes on using Analog Devices’ DSP components and development tools
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March 23, 2000 (bk)
The ADSP-21060/2/1 devices feature a single timer. One timer might be enough for most of typical signal processing applications, but even not for all of them. If additional timers are required, unused SPORT channels can be used to realize them.
How does it work?
The SHARC features two serial port devices. Since the transmit and receive units of both of the ports have separate and independent bit rate generators and interrupt logic, up to four additional timers can be realized.
Two 16-Bit registers, xCLKDIV and xFSDIV control the timer period. The following equation is used to calculate the interrupt rate ir:
=
ir
( ) ( )
Please note, xFSDIV shouldn’t be less than SLEN which controls the serial word length (=SLEN+1) from 3 up to 32 bits. If f 50MHz the maximum timer period without DMA operation is around 85 seconds.
The following example code demonstrates the initialization of the receive channel of SPORT1:
setup_rx1: /* global interrupt enable */
bit set MODE1 IRPTEN;
fCLKIN
xFSDIVxCLKDIV
11 ++
CLKIN
is
/* enable SPORT1 receive interrupt */ bit set IMASK SPR1I;
/* 0x2000 cycles */ r0 = 0x1FFF0000; dm(RDIV1) = r0;
/* enable, 4 bit, RFS and RCLK internal, early RFS */ r0 = 0x00006431; dm(SRCTL1) = r0;
Initialization of RX1 for timer operation
The initialization sequence for the transmit channel differs only by the bit DITFS for data independent transmission:
setup_tx1: /* global interrupt enable */
bit set MODE1 IRPTEN; /* enable transmit interrupt */
bit set IMASK SPR1I; /* 0x2000 cycles */
r0 = 0x1FFF0000; dm(TDIV1) = r0;
/* enable, 4 bit, RFS and RCLK internal, early RFS */ r0 = 0x0000E431; /* DITFS = 1 */ dm(STCTL1) = r0;
Initialization of TX1 for timer operation
Of course, the serial ports have been designed for inter-chip communication. Once enabled, the SPORTs will activate the dedicated pins. To avoid the need of external glue the SPORTs should be programmed for fully internal operation. Then, all the pins except Rx work as output. Rx has an internal pull-up of 50 and
can be left open, too. The frame sync signals indicate a timer overrun. The bit LxFS controls the signal polarity, wheras the pulse width depend on LAFS, SLEN and xCLKDIV.
a
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