Low noise (0.1 Hz to 10.0 Hz): 3.5 μV p-p @ 2.5 V output
No external capacitor required
Low temperature coefficient
A Grade: 10 ppm/°C maximum
B Grade: 3 ppm/°C maximum
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
ADR430: 4.1 V to 18 V
ADR431: 4.5 V to 18 V
ADR433: 5.0 V to 18 V
ADR434: 6.1 V to 18 V
ADR435: 7.0 V to 18 V
ADR439: 6.5 V to 18 V
High output source and sink current: +30 mA and −20 mA
Wide temperature range: −40°C to +125°C
APPLICATIONS
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments
PIN CONFIGURATIONS
1
TP
ADR43x
V
2
IN
TOP VIEW
NC
3
(Not to Scale)
GND
4
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT )
Figure 1. 8-Lead MSOP (RM-8)
1
TP
ADR43x
V
2
IN
TOP VIEW
NC
3
(Not to Scale)
GND
4
NOTES
1. NC = NO CONNEC
. TP = TEST PIN (DO NOT CONNECT)
Figure 2. 8-Lead SOIC_N (R-8)
8
TP
NC
7
6
V
OUT
5
TRIM
04500-001
TP
8
7
NC
6
V
OUT
TRIM
5
04500-041
GENERAL DESCRIPTION
The ADR43x series is a family of XFET® voltage references
featuring low noise, high accuracy, and low temperature drift
performance. Using Analog Devices, Inc., patented temperature
drift curvature correction and XFET (eXtra implanted junction
FET) technology, voltage change vs. temperature nonlinearity in
the ADR43x is minimized.
The XFET references operate at lower current (800 µA) and
l
ower supply voltage headroom (2 V) than buried Zener
references. Buried Zener references require more than 5 V
headroom for operation. The ADR43x XFET references are
the only low noise solutions for 5 V systems.
The ADR43x family has the capability to source up to 30 mA of
utput current and sink up to 20 mA. It also comes with a trim
o
terminal to adjust the output voltage over a 0.5% range without
compromising performance.
The ADR43x is available in 8-lead MSOP and 8-lead narrow
SO
IC packages. All versions are specified over the extended
industrial temperature range of −40°C to +125°C.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Changes to Format............................................................. Universal
Changes to the Ordering Guide ................................................... 20
12/03—Revision 0: Initial Version
Rev. D | Page 2 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
SPECIFICATIONS
ADR430 ELECTRICAL CHARACTERISTICS
VIN = 4.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.045 2.048 2.051 V
B Grade 2.047 2.048 2.049 V
INITIAL ACCURACY V
A Grade ±3 mV
±0.15 %
B Grade ±1 mV
±0.05 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 4.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 560 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.5 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 60 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
OUTPUT VOLTAGE HYSTERESIS V
RIPPLE REJECTION RATIO RRR fIN = 1 kHz –70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
1
OERR
= 0 μF 10 μs
L
∆VO 1000 hours 40 ppm
20 ppm
O_HYS
4.1 18 V
V
IN
Rev. D | Page 3 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ADR431 ELECTRICAL CHARACTERISTICS
VIN = 4.5 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.497 2.500 2.503 V
B Grade 2.499 2.500 2.501 V
INITIAL ACCURACY V
A Grade ±3 mV
±0.12 %
B Grade ±1 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 4.5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 580 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.5 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 80 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
OUTPUT VOLTAGE HYSTERESIS V
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
1
OERR
= 0 μF 10 μs
L
∆VO 1000 hours 40 ppm
20 ppm
O_HYS
4.5 18 V
IN
Rev. D | Page 4 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ADR433 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.996 3.000 3.004 V
B Grade 2.9985 3.000 3.0015 V
INITIAL ACCURACY V
A Grade ±4 mV
±0.13 %
B Grade ±1.5 mV
±0.05 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN
LOAD REGULATION ∆VO/∆IL
∆VO/∆IL
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 590 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.75 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 90 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
1
OUTPUT VOLTAGE
HYSTERESIS
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE V
SUPPLY VOLTAGE
HEADROOM
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
OERR
= 5 V to 18 V, −40°C < TA <
V
IN
5 20 ppm/V
+125°C
= 0 mA to 10 mA, VIN = 6 V,
I
L
−40°C < T
= −10 mA to 0 mA, VIN = 6 V,
I
L
−40°C < T
= 0 μF 10 μs
L
< +125°C
A
< +125°C
A
15 ppm/mA
15 ppm/mA
∆VO 1000 hours 40 ppm
V
20 ppm
O_HYS
5.0 18 V
IN
V
− VO 2 V
IN
Rev. D | Page 5 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ADR434 ELECTRICAL CHARACTERISTICS
VIN = 6.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 4.091 4.096 4.101 V
B Grade 4.0945 4.096 4.0975 V
INITIAL ACCURACY V
A Grade ±5 mV
±0.12 %
B Grade ±1.5 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 6.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 595 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 6.25 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 100 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
OUTPUT VOLTAGE HYSTERESIS V
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
1
OERR
= 0 μF 10 μs
L
∆VO 1000 hours 40 ppm
20 ppm
O_HYS
6.1 18 V
IN
Rev. D | Page 6 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ADR435 ELECTRICAL CHARACTERISTICS
VIN = 7.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 4.994 5.000 5.006 V
B Grade 4.998 5.000 5.002 V
INITIAL ACCURACY V
A Grade ±6 mV
±0.12 %
B Grade ±2 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 7 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 620 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10 Hz 8 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 115 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
OUTPUT VOLTAGE HYSTERESIS V
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE OPERATING RANGE VIN 7.0 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
1
OERR
= 0 μF 10 μs
L
∆VO 1000 hours 40 ppm
20 ppm
O_HYS
Rev. D | Page 7 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ADR439 ELECTRICAL CHARACTERISTICS
VIN = 6.5 V to 18 V, IL = 0 mV, TA = 25°C, unless otherwise noted.
Table 7.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 4.4946 4.500 4.5054 V
B Grade 4.498 4.500 4.502 V
INITIAL ACCURACY V
A Grade ±5.5 mV
±0.12 %
B Grade ±2 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 6.5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 6.5 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 6.5 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 600 800 μA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 7.5 μV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 110 nV/√Hz
TURN-ON SETTLING TIME tR C
LONG-TERM STABILITY
OUTPUT VOLTAGE HYSTERESIS V
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE OPERATING RANGE VIN 6.5 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
1
OERR
= 0 μF 10 μs
L
∆VO 1000 hours 40 ppm
20 ppm
O_HYS
Rev. D | Page 8 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 8.
Parameter Rating
Supply Voltage 20 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature, Soldering (60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Default conditions: ±5 V, CL = 5 pF, G = 2, Rg = Rf = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, f = 1 MHz, TA = 25°C, unless otherwise noted.
0.8
2.5009
2.5007
0.7
+125°C
2.5005
2.5003
2.5001
OUTPUT VOLTAGE (V)
2.4999
2.4997
2.4995
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (° C)
Figure 3. ADR431 Output Voltage vs. Temperature
4.0980
4.0975
4.0970
AGE (V)
4.0965
4.0960
OUTPUT VOL
4.0955
0.6
0.5
SUPPLY CURRENT (mA)
0.4
0.3
04500-015
Figure 6. ADR435 Supply Current vs. Input Vo
700
650
600
550
500
SUPPLY CURRENT (µA)
450
+25°C
–40°C
81046121416
INPUT VOLTAGE (V)
ltage
04500-018
4.0950
–40 –25 –1 0 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 4. ADR434 Output Voltage vs. Temperature
5.0025
5.0020
5.0015
AGE (V)
5.0010
5.0005
OUTPUT VOL
5.0000
4.9995
4.9990
–40 –25 –1 0 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 5. ADR435 Output Voltage vs. Temperature
04500-016
04500-017
Rev. D | Page 10 of 24
400
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 7. ADR435 Supply Current vs. Temperature
0.60
0.58
0.56
0.54
0.52
0.50
0.48
0.46
SUPPLY CURRENT (mA)
0.44
0.42
0.40
101268141618
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
Figure 8. ADR431 Supply Current vs. Input Vo
ltage
04500-019
04500-020
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
A
A
A
www.BDTIC.com/ADI
610
2.5
580
550
520
490
460
SUPPLY CURRENT (µA)
430
400
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 9. ADR431 Supply Current vs. Temperature
15
12
9
TION (ppm/mA)
6
LOAD REGUL
3
0
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
IL= 0mA to 10mA
Figure 10. ADR431 Load Regulation vs. Temperature
15
IL= 0mA to 10mA
2.0
–40°C
1.5
+25°C
1.0
+125°C
DIFFERENTIAL VOLTAGE (V)
0.5
0
04500-021
–5–100510
LOAD CURRENT (mA)
04500-024
Figure 12. ADR431 Minimum Input/Output
Dif
ferential Voltage vs. Load Current
1.9
1.8
1.7
1.6
1.5
1.4
1.3
MINIMUM HEADROOM (V)
1.2
1.1
1.0
–40 –25 –10 52 0 35 50 65 80 95 110 125
04500-022
TEMPERATURE (°C)
NO LOAD
04500-025
Figure 13. ADR431 Minimum Headroom vs. Temperature
2.5
12
9
TION (ppm/mA)
6
LOAD REGUL
3
0
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
04500-023
Figure 11. ADR435 Load Regulation vs. Temperature
Rev. D | Page 11 of 24
2.0
–40°C
1.5
L VOLTAGE (V)
1.0
DIFFERENTI
0.5
0
+25°C
+125°C
–5–100510
LOAD CURRENT (mA)
04500-026
Figure 14. ADR435 Minimum Input/Output
ferential Voltage vs. Load Current
Dif
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
A
www.BDTIC.com/ADI
1.9
1.7
1.5
1.3
MINIMUM HEADROOM (V)
1.1
NO LOAD
CL = 0.01µF
NO INPUT CAPACITOR
V
V
= 2V/DIV
IN
= 1V/DIV
O
0.9
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 15. ADR435 Minimum Headroom vs. Temperature
20
16
12
TION (ppm/V)
8
4
LINE REGUL
0
–4
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
VIN=7V TO18V
Figure 16. ADR435 Line Regulation vs. Temperature
CIN = 0.01µF
NO LOAD
= 1V/DIV
V
O
TIME = 4µ s/DIV
04500-027
Figure 18. ADR431 Turn-On Respons
V
= 1V/DIV
O
= 2V/DIV
V
IN
04500-028
e, 0.01 μF Load Capacitor
CIN = 0.01µF
NO LOAD
TIME = 4µ s/DIV
04500-031
4500-032
Figure 19. ADR431 Turn-Off Response
BYPASS CAPACIT OR = 0µF
LINE
INTERRUPTI ON
VIN = 500mV/DIV
= 2V/DIV
V
IN
TIME = 4µs/DIV
4500-030
Figure 17. ADR431 Turn-On Response
Rev. D | Page 12 of 24
= 50mV/DIV
V
O
TIME = 100µs/DIV
Figure 20. ADR431 Line Transient Respo
nse, No Capacitors
04500-033
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
V
= 500mV/DIV
IN
LINE
INTERRUPTI ON
2µV/DIV
BYPASS CAPACITO R = 0.1µF
= 50mV/DIV
V
O
TIME = 100µ s/DIV
04500-034
Figure 21. ADR431 Line Transient Response, 0.1 μF Bypass Capacitor
1µV/DIV
TIME = 1s/DIV
04500-035
Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise
TIME = 1s/DIV
Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise
50µV/DIV
TIME = 1s/ DIV
Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise
14
12
10
04500-037
04500-038
50µV/DIV
TIME = 1s/ DIV
04500-036
Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise
Rev. D | Page 13 of 24
8
6
NUMBER OF PARTS
4
2
0
–110 –90 –70 –50 –30 –10 10 30 50 70 90 110
DEVIATIO N (PPM)
Figure 26. ADR431 Typical Hysteresis
04500-029
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
50
45
40
35
30
25
20
15
OUTPUT IM PEDANCE (Ω)
10
5
0
10010k1k100k
FREQUENCY ( Hz)
Figure 27. Output Imped
R
D
A
ance vs. Frequency
4
3
3
ADR435
ADR430
04500-039
10
–10
–30
–50
–70
–90
RIPPLE REJECT ION (dB)
–110
–130
–150
101001k10k100k1M
FREQUENCY ( Hz)
04500-040
Figure 28. Ripple Rejection Ratio
Rev. D | Page 14 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
(
)
V
+θ×
=
V
www.BDTIC.com/ADI
THEORY OF OPERATION
The ADR43x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
t
emperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The primary
advantage of an XFET reference is its correction term, which is
~30 times lower and requires less correction than that of a band
gap reference. Because most of the noise of a band gap reference
comes from the temperature compensation circuitry, the XFET
results in much lower noise.
Figure 29 shows the basic topology of the ADR43x series. The
emperature correction term is provided by a current source
t
with a value designed to be proportional to absolute temperature.
The general equation is
OUT
P
IR1VGV×−= (1)
PTAT
where:
G is the gain of the reciprocal of the divider ratio.
V
is the difference in pinch-off voltage between the two JFETs.
∆
P
I
is the positive temperature coefficient correction current.
PTAT
ADR43x devices are created by on-chip adjustment of R2
and R3 t
o achieve 2.048 V or 2.500 V, respectively, at the
reference output.
R2
R3
GND
IN
V
OUT
04500-002
I
I
PTAT
1
**
*EXTRA CHANNEL IMPLANT
V
= G(ΔV
OUT
Figure 29. Simplified Schematic Device
Pow
I
1
ΔV
P
R1
– R1 × I
P
er Dissipation Considerations
PTAT
)
ADR43x
The ADR43x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.1 V
to 18 V. When these devices are used in applications at higher
currents, users should use the following equation to account for
the temperature effects due to the power dissipation increases:
TPT
DJ
(2)
AJA
where:
T
and TA are the junction and ambient temperatures, respectively.
J
P
is the device power dissipation.
D
is the device package thermal resistance.
θ
JA
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
connected from V
to GND. The circuit in Figure 30
OUT
illustrates the basic configuration for the ADR43x family of
references. Other than a 0.1 µF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
1
TP
IN
+
10µF
0.1µF
Figure 30. Basic Voltage Reference Configuration
2
ADR43x
TOP VIEW
3
NC
(Not to Scale)
GND
4
NOTES:
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT )
TP
8
NC
7
V
OUT
6
5
TRIM
0.1µF
04500-003
NOISE PERFORMANCE
The noise generated by the ADR43x family of references is
typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band
for ADR430, ADR431, and ADR433. Figure 22 shows the
z to 10.0 Hz noise of the ADR431, which is only 3.5 µV p-p.
0.1 H
The noise measurement is made with a band-pass filter made
of a 2-pole high-pass filter with a corner frequency at 0.1 Hz
and a 2-pole low-pass filter with a corner frequency at 10.0 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active
circuits to settle and the time for the thermal gradients on the
chip to stabilize. Figure 17 and Figure 18 show the turn-on
ettling time for the ADR431.
s
Rev. D | Page 15 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
APPLICATIONS
ACTIVATOR
LEFT
SOURCE FIBER
GIMBAL + SENSOR
MEMS MIRROR
AMPL
DAC
PREAMP
ADC
AMPL
DAC
DESTINATION
FIBER
ACTIVATOR
RIGHT
ADR431
ADR431
ADR431
OUTPUT ADJUSTMENT
The ADR43x trim terminal can be used to adjust the output
voltage over a ±0.5% range. This feature allows the system
designer to trim system errors out by setting the reference to a
voltage other than the nominal. This is also helpful if the part is
used in a system at temperature to trim out any error. Adjustment
of the output has negligible effect on the temperature performance of the device. To avoid degrading temperature coefficients,
both the trimming potentiometer and the two resistors need to
be low temperature coefficient types, preferably <100 ppm/°C.
INPUT
LASER BEAM
CONTROL
ELECTRONICS
V
IN
V
OUT
ADR43x
TRIM
GND
Figure 31. Output Trim Adjustment
R1
470kΩ
OUTPUT
R
10kΩ
10kΩ (ADR430)
R2
15kΩ (ADR431)
VO = ±0.5%
P
4500-004
REFERENCE FOR CONVERTERS IN OPTICAL
NETWORK CONTROL CIRCUITS
In Figure 32, the high capacity, all-optical router network
employs arrays of micromirrors to direct and route optical
signals from fiber to fiber without first converting them to
electrical form, which reduces the communication speed. The
tiny micromechanical mirrors are positioned so that each is
illuminated by a single wavelength that carries unique information and can be passed to any desired input and output fiber.
The mirrors are tilted by the dual-axis actuators, which are
controlled by precision ADCs and DACs within the system.
Due to the microscopic movement of the mirrors, not only is
the precision of the converters important but the noise
associated with these controlling converters is also extremely
critical. Total noise within the system can be multiplied by the
number of converters employed. Therefore, to maintain the
stability of the control loop for this application, the ADR43x,
with its exceptionally low noise, is necessary.
DSP
GND
Figure 32. All-Optica
l Router Network
NEGATIVE PRECISION REFERENCE WITHOUT
PRECISION RESISTORS
In many current-output CMOS DAC applications, where the
output signal voltage must be of the same polarity as the reference voltage, it is required to reconfigure a current-switching
DAC into a voltage-switching DAC through the use of a 1.25 V
reference, an operational amplifier, and a pair of resistors.
Using a current-switching DAC directly requires an additional
operational amplifier at the output to reinvert the signal. A
negative voltage reference is desirable because an additional
operational amplifier is not required for either reinversion
(current-switching mode) or amplification (voltage-switching
mode) of the DAC output voltage. In general, any positive
voltage reference can be converted to a negative voltage
reference through the use of an operational amplifier and a
pair of matched resistors in an inverting configuration. The
disadvantage of this approach is that the largest single source of
error in the circuit is the relative matching of the resistors used.
A negative reference can easily be generated by adding a preci-
n operational amplifier, such as the OP777 or the OP193, and
sio
configuring it as shown in Figure 33. V
therefore, the negative reference can be taken directly from the
output of the amplifier. The operational amplifier must be dual
supply and have low offset and rail-to-rail capability if negative
supply voltage is close to the reference output.
is at virtual ground;
OUT
04500-005
Rev. D | Page 16 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
V
V
V
V
V
www.BDTIC.com/ADI
+
DD
2
V
IN
V
6
OUT
ADR43x
GND
4
A1
–V
DD
–V
REF
4500-006
Figure 33. Negative Reference
HIGH VOLTAGE FLOATING CURRENT SOURCE
The circuit in Figure 34 can be used to generate a floating
current source with minimal self heating. This particular
configuration can operate on high supply voltages determined
by the breakdown voltage of the N-channel JFET.
+
S
SST111
VISHAY
2
V
IN
V
OUT
6
ADR43x
GND
4
OP90
Figure 34. High Voltage Floating Current Source
2N3904
R
2.1kΩ
–V
S
L
04500-007
KELVIN CONNECTION
In many portable instrumentation applications, where PC board
cost and area go hand in hand, circuit interconnects are very
often of dimensionally minimum width. These narrow lines can
cause large voltage drops if the voltage reference is required to
provide load currents to various functions. In fact, circuit interconnects can exhibit a typical line resistance of 0.45 mΩ/square
(1 oz. Cu, for example). Force and sense connections, also
referred to as Kelvin connections, offer a convenient method of
eliminating the effects of voltage drops in circuit wires. Load
currents flowing through wiring resistance produce an error
V
= R × IL) at the load. However, the Kelvin connection of
(
ERROR
Figure 35 overcomes the problem by including the wiring
re
sistance within the forcing loop of the operational amplifier.
Because the amplifier senses the load voltage, the operational
amplifier loop control forces the output to compensate for the
wiring error and to produce the correct voltage at the load.
IN
2
ADR43x
6
V
OUT
GND
4
Figure 35. Advantage of Kelvin Connection
A1
OP191
+
R
LW
V
IN
V
OUT
SENSE
R
LW
V
OUT
FORCE
R
L
04500-008
DUAL-POLARITY REFERENCES
Dual-polarity references can easily be made with an operational
amplifier and a pair of resistors. To avoid defeating the accuracy
obtained by ADR43x, it is imperative to match the resistance
tolerance as well as the temperature coefficient of all the
components.
IN
1µF0.1µF
Figure 36. +5 V and −5 V References Using ADR435
+10V
Figure 37. +2.5 V and −2.5 V References Using ADR435
2
V
GND
2
V
IN
ADR435
GND
4
IN
ADR435
U1
4
V
OUT
U1
TRIM
V
OUT
TRIM
5
6
6
5
5.6kΩ
5.6kΩ
10kΩ
5kΩ
+2.5
R1
R2
–2.5V
R1
R3
+10V
V+
OP1177
U2
V–
–
10V
V+
OP1177
U2
V–
–10V
10kW
+5V
R2
–5V
04500-009
04500-010
Rev. D | Page 17 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
PROGRAMMABLE CURRENT SOURCE
Together with a digital potentiometer and a Howland current
pump, ADR435 forms the reference source for a programmable
current as
RR2
+
2
⎛
A
⎜
⎜
I×
=
L
⎜
⎜
⎝
and
D
V×=
W
N
2
where:
D is the decimal equivalent of the input code.
N is the number of bits.
In addition, R1' and R2' must be equal to
respectively. In theory, R2
achieve the necessary current within the A2 output current
driving capability. In this example, OP2177 can deliver a
maximum output current of 10 mA. Because the current pump
employs both positive and negative feedback, C1 and C2
capacitors are needed to ensure that the negative feedback
prevails and, therefore, avoids oscillation. This circuit also
allows bidirectional current flow if the V
digital potentiometer are supplied with the dual-polarity
references, as shown in
V
DD
2
V
IN
TRIM
5
ADR435
U1
V
6
OUT
GND
4
⎞
B
⎟
R1
⎟
V
(3)
R
2
B
V
REF
W
⎟
⎟
⎠
(4)
R1 and (R2
can be made as small as needed to
B
and VB inputs of the
A
+ R2B),
A
Figure 38.
C1
10pF
R1'
50kΩ
U2
AD5232
A
B
V
DD
V+
W
OP2177
A1
V–
V
SS
C2
10pF
R1
50kΩ
Figure 38. Programmable Current Source
R2'
1kΩ
V
DD
V+
OP2177
A2
V–
V
SS
R2
1kΩ
+
VL
–
R2
B
10Ω
A
I
L
I
L
04500-011
PROGRAMMABLE DAC REFERENCE VOLTAGE
By employing a multichannel DAC, such as a quad, 12-bit
voltage output DAC (AD7398), one of its internal DACs
and an ADR43x voltage reference can be used as a common
programmable V
configuration is shown in Figure 39.
V
REFA
DAC A
V
REFB
DAC B
V
REFC
DAC C
V
REFD
DAC D
The relationship of V
and the ratio of R1 and R2, given by
=
V
REFX
where:
D is the decimal equivalent of the input code.
N is the number of bits.
V
The ADR43x family has a number of features that make it ideal
for use with ADCs and DACs. The exceptional low noise, tight
temperature coefficient, and high accuracy characteristics make
the ADR43x ideal for low noise applications such as cellular
base station applications.
Another example of an ADC for which the ADR431 is well
uited is the AD7701. Figure 40 shows the ADR431 used as
s
e precision reference for this converter. The AD7701 is a 16-bit
th
ADC with on-chip digital filtering intended for the measurement
of wide dynamic range
those representing chemical, physical, or biological processes.
It contains a charge-balancing Σ- ADC, a calibration
microcontroller with on-chip static RAM, a clock oscillator,
and a serial communications port.
+5
NALO
SUPPLY
0.1µF
10µF
0.1µF
RANGES
SELECT
CALIBRATE
ANALOG
INPUT
ANALOG
GROUND
–5V
ANALOG
SUPPLY
0.1µF
Figure 40. Voltage Reference for the AD7701 16-Bit ADC
and low frequency signals, such as
AD7701
2
V
IN
V
OUT
ADR431
GND
4
0.1µF
10µF
AV
DD
V
6
REF
BP/UP
CAL
A
IN
AGND
AV
SS
DV
SLEEP
MODE
DRDY
CS
SCLK
SDATA
CLKIN
CLKOUT
SC1
SC2
DGND
DV
DD
SS
0.1µF
DATA READY
READ (TRANSMI T)
SERIAL CL OCK
SERIAL CLOCK
0.1µF
04500-013
PRECISION BOOSTED OUTPUT REGULATOR
A precision voltage output with boosted current capability can
be realized with the circuit shown in Figure 41. In this circuit,
U
2 forces V
to be equal to V
O
N1. Therefore, the load current is furnished by V
configuration, a 50 mA load is achievable at V
ate heat is generated on the MOSFET, and higher current can be
achieved with a replacement of the larger device. In addition,
for a heavy capacitive load with step input, a buffer can be
added at the output to enhance the transient response.
V
IN
2
V
IN
U1
ADR431
V
6
OUT
TRIM
5
GND
4
Figure 41. Precision Boo
by regulating the turn-on of
REF
N1
5V
2N7002
+
V+
U2
AD8601
V–
–
sted Output Regulator
. In this
IN
of 5 V. Moder-
IN
R
L
25Ω
V
O
04500-014
Rev. D | Page 19 of 24
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
5
4
SEATING
PLANE
5.15
4.90
4.65
1.10 MAX
0.23
0.08
8°
0°
0.80
0.60
0.40
3.20
3.00
2.80
PIN 1
0.95
0.85
0.75
0.15
0.00
COPLANARITY
1
0.65 BSC
0.38
0.22
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 42. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dim
ensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DES IGN.
85
1
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-A A
BSC
6.20 (0.2441)
5.80 (0.2284)
4
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
45°
012407-A
Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]