Analog Devices ADR425BR-REEL7, ADR425BR-REEL, ADR425BR, ADR425ARM-REEL7, ADR425AR-REEL7 Datasheet
...
REV. B
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a
ADR420/ADR421/ADR423/ADR425
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Ultraprecision Low Noise, 2.048 V/2.500 V/
3.00 V/5.00 V XFET
®
Voltage References
PIN CONFIGURATION
Surface-Mount Packages
8-Lead SOIC
8-Lead Mini_SOIC
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
TP
V
IN
NIC
GND
TP
NIC
V
OUT
TRIM
ADR42x
FEATURES
Low Noise (0.1 Hz to 10 Hz)
ADR420: 1.75 V p-p
ADR421: 1.75 V p-p
ADR423: 2.0 V p-p
ADR425: 3.4 V p-p
Low Temperature Coefficient: 3 ppm/C
Long-Term Stability: 50 ppm/1000 Hours
Load Regulation: 70 ppm/mA
Line Regulation: 35 ppm/V
Low Hysteresis: 40 ppm Typical
Wide Operating Range
ADR420: 4 V to 18 V
ADR421: 4.5 V to 18 V
ADR423: 5 V to 18 V
ADR425: 7 V to 18 V
Quiescent Current: 0.5 mA Maximum
High Output Current: 10 mA
Wide Temperature Range: –40C to +125C
APPLICATIONS
Precision Data Acquisition Systems
High-Resolution Converters
Battery-Powered Instrumentation
Portable Medical Instruments
Industrial Process Control Systems
Precision Instruments
Optical Network Control Circuits
GENERAL DESCRIPTION
The ADR42x series are ultraprecision second-generation XFET
voltage references featuring low noise, high accuracy, and excellent
long-term stability in a SOIC and Mini_SOIC footprints. Patented
temperature drift curvature correction technique and XFET (eXtra
implanted junction FET) technology minimize nonlinearity of the
voltage change with temperature. The XFET architecture offers
superior accuracy and thermal hysteresis to the bandgap
references. It also operates at lower power and lower supply
headroom than the Buried Zener references.
The superb noise, stable, and accurate characteristics of ADR42x
make them ideal for precision conversion applications such as
optical network and medical equipment. The ADR42x trim
terminal can also be used to adjust the output voltage over a
±0.5% range without compromising any other performance. The
ADR42x series voltage references offer two electrical grades and
are specified over the extended industrial temperature range
of –40°C to +125°C. Devices are available in 8-lead SOIC-8 or
30% smaller 8-lead Mini_SOIC-8 packages.
XFET is a registered trademark of Analog Devices, Inc.
Table I. ADR42x Products
Output Initial
ADR420 Voltage Accuracy Tempco
Products V
O
mV % ppm/°C
ADR420 2.048 1, 3 0.05, 0.15 3, 10
ADR421 2.50 1, 3 0.04, 0.12 3, 10
ADR423 3.00 1.5, 4 0.04, 0.12 3, 10
ADR425 5.00 2, 6 0.04, 0.12 3, 10
REV. B
–2–
ADR42x–SPECIFICATIONS
ADR420 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.045 2.048 2.051 V
Initial Accuracy V
OERR
–3 +3 mV
–0.15 +0.15 %
Output Voltage B Grade V
O
2.047 2.048 2.049 V
Initial Accuracy V
OERR
–1 +1 mV
–0.05 +0.05 %
Temperature Coefficient A Grade TCV
O
–40°C < TA < +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
VIN = 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 1.75 µV p-p
Voltage Noise Density e
N
1 kHz 60 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
ADR421 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.497 2.500 2.503 V
Initial Accuracy V
OERR
–3 +3 mV
–0.12 +0.12 %
Output Voltage B Grade V
O
2.499 2.500 2.501 V
Initial Accuracy V
OERR
–1 +1 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < TA < +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
VIN = 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 1.75 µV p-p
Voltage Noise Density e
N
1 kHz 80 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
REV. B
–3–
ADR420/ADR421/ADR423/ADR425
ADR423 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.996 3.000 3.004 V
Initial Accuracy V
OERR
–4 +4 mV
–0.13 +0.13 %
Output Voltage B Grade V
O
2.9985 3.000 3.0015 V
Initial Accuracy V
OERR
–1.5 +1.5 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < TA < +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
− V
O
2V
Line Regulation ∆V
O
/∆V
IN
VIN = 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density e
N
1 kHz 90 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
ADR425 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
4.994 5.000 5.006 V
Initial Accuracy V
OERR
–6 +6 mV
–0.12 +0.12 %
Output Voltage B Grade V
O
4.998 5.000 5.002 V
Initial Accuracy V
OERR
–2 +2 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < TA < +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
VIN = 7 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 3.4 µV p-p
Voltage Noise Density e
N
1 kHz 110 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
(@ VIN = 7.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
REV. B
–4–
A
DR420/ADR421/ADR423/ADR425
Package Type θ
JA
*
Unit
8-Lead Mini_SOIC (RM) 190 °C/W
8-Lead SOIC (R) 130 °C/W
*θJA is specified for the worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for surface-mount packages.
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
ADR42x . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C
*Absolute maximum ratings apply at 25°C, unless otherwise noted.
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Description
1, 8 TP Test Pin. There are actual connections in TP
pins but they are reserved for factory testing
purposes. Users should not connect anything to TP pins, otherwise the device may
not function properly.
2V
IN
Input Voltage
3, 7 NIC No Internal Connect. NICs have no internal
connections.
4 GND Ground Pin = 0 V
5 TRIM Trim Terminal. It can be used to adjust the
output voltage over a ±0.5% range without
affecting the temperature coefficient.
6V
OUT
Output Voltage
PIN CONFIGURATIONS
Mini_SOIC-8
ADR42x
8
7
6
5
1
2
3
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
TP
V
IN
NIC
GND
TP
NIC
V
OUT
TRIM
SOIC-8
8
7
6
5
TP
NIC
V
OUT
TRIM
ADR42x
1
2
3
4
TP
V
IN
NIC
GND
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
Output Initial Temperature Number of
Temperature
Voltage Accuracy Coefficient Package Package Top Parts per Range
Model V
O
mV % ppm/°C Description Option Mark Reel °C
ADR420AR 2.048 3 0.15 10 SOIC SO-8 ADR420 98 –40 to +125
ADR420AR-Reel7 2.048 3 0.15 10 SOIC SO-8 ADR420 3,000 –40 to +125
ADR420BR 2.048 1 0.05 3 SOIC SO-8 ADR420 98 –40 to +125
ADR420BR-Reel7 2.048 1 0.05 3 SOIC SO-8 ADR420 3,000 –40 to +125
ADR420ARM-Reel7 2.048 3 0.15 10 Mini_SOIC RM-8 R4A 1,000 –40 to +125
ADR421AR 2.50 3 0.12 10 SOIC SO-8 ADR421 98 –40 to +125
ADR421AR-Reel7 2.50 3 0.12 10 SOIC SO-8 ADR421 3,000 –40 to +125
ADR421BR 2.50 1 0.04 3 SOIC SO-8 ADR421 98 –40 to +125
ADR421BR-Reel7 2.50 1 0.04 3 SOIC SO-8 ADR421 3,000 –40 to +125
ADR421ARM-Reel7 2.50 3 0.12 10 Mini_SOIC RM-8 R5A 1,000 –40 to +125
ADR423AR 3.00 4 0.13 10 SOIC SO-8 ADR423 98 –40 to +125
ADR423AR-Reel7 3.00 4 0.13 10 SOIC SO-8 ADR423 3,000 –40 to +125
ADR423BR 3.00 1.5 0.04 3 SOIC SO-8 ADR423 98 –40 to +125
ADR423BR-Reel7 3.00 1.5 0.04 3 SOIC SO-8 ADR423 3,000 –40 to +125
ADR423ARM-Reel7 3.00 4 0.13 10 Mini_SOIC RM-8 1,000 –40 to +125
ADR425AR 5.00 6 0.12 10 SOIC SO-8 ADR425 98 –40 to +125
ADR425AR-Reel7 5.00 6 0.12 10 SOIC SO-8 ADR425 3,000 –40 to +125
ADR425BR 5.00 2 0.04 3 SOIC SO-8 ADR425 98 –40 to +125
ADR425BR-Reel7 5.00 2 0.04 3 SOIC SO-8 ADR425 3,000 –40 to +125
ADR425ARM-Reel7 5.00 6 0.12 10 Mini_SOIC RM-8 R7A 1,000 –40 to +125
ORDERING GUIDE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD42x features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
ADR420/ADR421/ADR423/ADR425
–5–
PARAMETER DEFINITIONS
Temperature Coefficient
The change of output voltage over the operating temperature
range and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:
TCV ppm C
VT VT
VCTT
O
OO
O
/
()– ()
()(– )
°
()
=
°×
×
21
21
6
25
10
where
V
O
(25°C) = VO at 25°C
V
O
(T1) = VO at Temperature 1
V
O
(T2) = VO at Temperature 2.
Line Regulation
The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage
Load Regulation
The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load regulation is
expressed in either microvolts per milliampere, parts-per-million
per milliampere, or ohms of dc output resistance.
Long-Term Stability
Typical shift of output voltage at 25°C on a sample of parts
subjected to operation life test of 1000 hours at 125°C:
∆∆VVt Vt
V ppm
Vt Vt
Vt
OO O
O
OO
O
=
=×
()– ()
()
()– ()
()
01
01
0
6
10
where
V
O
(t0) = VO at 25°C at Time 0
V
O
(t1) = VO at 25°C after 1,000 hours operation at 125°C.
Thermal Hysteresis
Thermal hysteresis is defined as the change of output voltage
after the device is cycled through temperature from +25°C to
–40°C to +125°C and back to +25°C. This is a typical value
from a sample of parts put through such a cycle.
VVCV
V ppm
VCV
VC
O HYS O O TC
O HYS
OOTC
O
__
_
_
()–
()
()–
()
=°
=
°
°
×
25
25
25
10
6
where
V
O
(25°C) = VO at 25°C
V
O_TC
= VO at 25°C after temperature cycle at +25°C to –40°C
to +125°C and back to +25°C.
Input Capacitor
Input capacitors are not required on the ADR42x. There is no
limit for the value of the capacitor used on the input, but a 1 µF to
10 µF capacitor on the input will improve transient response in
applications where the supply suddenly changes. An additional
0.1 µF in parallel will also help to reduce noise from the supply.
Output Capacitor
The ADR42x does not need output capacitors for stability
under any load condition. An output capacitor, typically 0.1 µF,
will filter out any low-level noise voltage and will not affect
the operation of the part. On the other hand, the load transient
response can be improved with an additional 1 µF to 10 µF
output capacitor in parallel. A capacitor here will act as a source
of stored energy for sudden increase in load current. The only
parameter that will degrade, by adding an output capacitor, is
turn-on time and it depends on the size of the capacitor chosen.
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