Analog Devices ADM8691ARN, ADM8691AN, ADM8690ARN, ADM8690AN, ADM8695ARW Datasheet
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REV. 0
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a
Microprocessor
Supervisory Circuits
ADM8690–ADM8695
FEATURES
Upgrade for ADM690/ADM695, MAX690–MAX695
Specified Over Temperature
Low Power Consumption (0.7 mW)
Precision Voltage Monitor
Reset Assertion Down to 1 V V
CC
Low Switch On-Resistance 0.7 V Normal,
7 V in Backup
High Current Drive (100 mA)
Watchdog Timer—100 ms, 1.6 s, or Adjustable
400 nA Standby Current
Automatic Battery Backup Power Switching
Extremely Fast Gating of Chip Enable Signals (3 ns)
Voltage Monitor for Power Fail
Available in TSSOP Package
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
FUNCTIONAL BLOCK DIAGRAMS
ADM8691
ADM8693
ADM8695
4.65V
1
RESET AND
WATCHDOG
TIMEBASE
RESET
GENERATOR
WATCHDOG
TRANSITION DETECTOR
WATCHDOG
TIMER
1.3V
V
OUT
CE
OUT
LOW LINE
RESET
RESET
WATCHDOG
OUTPUT (WDO)
POWER FAIL
OUTPUT (PFO)
V
BATT
V
CC
CE
IN
OSC IN
OSC SEL
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
BATT ON
1
VOLTAGE DETECTOR = 4.65V (ADM8691, ADM8695)
4.40V (ADM8693)
ADM8690
ADM8692
ADM8694
4.65V
1
V
OUT
RESET
POWER FAIL
OUTPUT (PFO)
V
BATT
V
CC
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
1
VOLTAGE DETECTOR = 4.65V (ADM8690, ADM8694)
4.40V (ADM8692)
2
RESET PULSE WIDTH = 50ms (AD8690, ADM8692)
200ms (ADM8694)
WATCHDOG
TRANSITION DETECTOR
(1.6s)
RESET
GENERATOR
2
1.3V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
GENERAL DESCRIPTION
The ADM8690–ADM8695 family of supervisory circuits offers
complete single chip solutions for power supply monitoring and
battery control functions in microprocessor systems. These
functions include µP reset, backup battery switchover, watchdog
timer, CMOS RAM write protection and power failure warning.
The complete family provides a variety of configurations to satisfy most microprocessor system requirements.
The ADM8690, ADM8692 and ADM8694 are available in
8-pin DIP packages and provide:
1. Power-on reset output during power-up, power-down and
brownout conditions. The
RESET output remains opera-
tional with V
CC
as low as 1 V.
2. Battery backup switching for CMOS RAM, CMOS
microprocessor or other low power logic.
3. A reset pulse if the optional watchdog timer has not been
toggled within a specified time.
4. A 1.3 V threshold detector for power fail warning, low battery
detection or to monitor a power supply other than +5 V.
The ADM8691, ADM8693 and ADM8695 are available in
16-pin DIP and small outline packages (including TSSOP) and
provide three additional functions:
1. Write protection of CMOS RAM or EEPROM.
2. Adjustable reset and watchdog timeout periods.
3. Separate watchdog timeout, backup battery switchover, and
low V
CC
status outputs.
The ADM8690–ADM8695 family is fabricated using an advanced epitaxial CMOS process combining low power consumption (0.7 mW), extremely fast Chip Enable gating (3 ns)
and high reliability.
RESET assertion is guaranteed with VCC as
low as 1 V. In addition, the power switching circuitry is designed for minimal voltage drop thereby permitting increased
output current drive of up to 100 mA without the need of an
external pass transistor.
ADM8690–ADM8695–SPECIFICA TIONS
Parameter Min Typ Max Units Test Conditions/Comments
BATTERY BACKUP SWITCHING
V
CC
Operating Voltage Range
ADM8690, ADM8691, ADM8694, ADM8695 4.75 5.5 V
ADM8692, ADM8693 4.5 5.5 V
V
BATT
Operating Voltage Range
ADM8690, ADM8691, ADM8694, ADM8695 2.0 4.25 V
ADM8692, ADM8693 2.0 4.0 V
V
OUT
Output Voltage VCC – 0.005 VCC – 0.0025 V I
OUT
= 1 mA
V
CC
– 0.2 VCC – 0.125 V I
OUT
≤ 100 mA
V
OUT
in Battery Backup Mode V
BATT
– 0.005 V
BATT
– 0.002 V I
OUT
= 250 µA, VCC < V
BATT
– 0.2 V
Supply Current (Excludes I
OUT
) 140 200 µAI
OUT
= 100 µA
Supply Current in Battery Backup Mode 0.4 1 µAV
CC
= 0 V, V
BATT
= 2.8 V
Battery Standby Current 5.5 V > V
CC
> V
BATT
+ 0.2 V
(+ = Discharge, – = Charge) –0.1 +0.02 µAT
A
= +25°C
Battery Switchover Threshold 70 mV Power-Up
V
CC
– V
BATT
50 mV Power-Down
Battery Switchover Hysteresis 20 mV
BATT ON Output Voltage 0.3 V I
SINK
= 3.2 mA
BATT ON Output Short Circuit Current 55 mA BATT ON = V
OUT
= 4.5 V Sink Current
0.5 2.5 25 µA BATT ON = 0 V Source Current
RESET AND WATCHDOG TIMER
Reset Voltage Threshold
ADM8690, ADM8691, ADM8694, ADM8695 4.5 4.65 4.73 V
ADM8692, ADM8693 4.25 4.4 4.48 V
Reset Threshold Hysteresis 40 mV
Reset Timeout Delay
ADM8690, ADM8691, ADM8692, ADM8693 35 50 70 ms OSC SEL = HIGH
ADM8694, ADM8695 140 200 280 ms OSC SEL = HIGH
Watchdog Timeout Period, Internal Oscillator 1.0 1.6 2.25 s Long Period
70 100 140 ms Short Period
Watchdog Timeout Period, External Clock 3840 4064 4097 Cycles Long Period
768 1011 1025 Cycles Short Period
Minimum WDI Input Pulse Width 50 ns V
IL
= 0.4, VIH = 3.5 V
RESET Output Voltage @ VCC = +1 V 4 20 mV I
SINK
= 10 µA, VCC = 1 V
RESET, LOW LINE Output Voltage 0.05 0.4 V I
SINK
= 1.6 mA, VCC = 4.25 V
3.5 V I
SOURCE
= 1 µA
RESET, WDO Output Voltage 0.4 V I
SINK
= 1.6 mA
3.5 V I
SOURCE
= 1 µA
Output Short Circuit Source Current 1 10 25 µA
Output Short Circuit Sink Current 25 mA
WDI Input Threshold Note 1
Logic Low 0.8 V
Logic High 3.5 V
WDI Input Current 1 10 µA WDI = V
OUT
–10 –1 µA WDI = 0 V
POWER FAIL DETECTOR
PFI Input Threshold 1.25 1.3 1.35 V V
CC
= +5 V
PFI Input Current –25 ±0.01 +25 nA
PFO Output Voltage 0.4 V I
SINK
= 3.2 mA
3.5 V I
SOURCE
= 1 µA
PFO Short Circuit Source Current 1 3 25 µA PFI = Low, PFO = 0 V
PFO Short Circuit Sink Current 25 mA PFI = High, PFO = V
OUT
CHIP ENABLE GATING
CE
IN
Threshold 0.8 V V
IL
3.0 V V
IH
CE
IN
Pull-Up Current 3 µA
CE
OUT
Output Voltage 0.4 V I
SINK
= 3.2 mA
V
OUT
– 1.5 V I
SOURCE
= 3.0 mA
V
OUT
– 0.05 V I
SOURCE
= 1 µA, VCC = 0 V
CE Propagation Delay 3 7 ns
REV. 0
–2–
(VCC = Full Operating Range, V
BATT
= +2.8 V, TA = T
MIN
to
T
MAX
unless otherwise noted)
Parameter Min Typ Max Units Test Conditions/Comments
OSCILLATOR
OSC IN Input Current ±2 µA
OSC SEL Input Pull-Up Current 5 µA
OSC IN Frequency Range 0 500 kHz OSC SEL = 0 V
OSC IN Frequency with External Capacitor 4 kHz OSC SEL = 0 V, C
OSC
= 47 pF
NOTE
1
WDI is a three level input which is internally biased to 38% of VCC and has an input impedance of approximately 5 MΩ.
Specifications subject to change without notice.
ADM8690–ADM8695
REV. 0
–3–
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . . –0.3 V to V
OUT
+ 0.5 V
Input Current
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Power Dissipation, N-8 DIP . . . . . . . . . . . . . . . . . . . .400 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 120°C/W
Power Dissipation, N-16 DIP . . . . . . . . . . . . . . . . . . .600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 135°C/W
Power Dissipation, RU-16 DIP . . . . . . . . . . . . . . . . . . 600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W
Power Dissipation, R-16 SOIC . . . . . . . . . . . . . . . . . .600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 110°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . .–55°C to +125°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
ORDERING GUIDE
Model Temperature Range Package Options*
ADM8690AN –40°C to +85°C N-8
ADM8690ARN –40°C to +85°C SO-8
ADM8691AN –40°C to +85°C N-16
ADM8691ARN –40°C to +85°C R-16A
ADM8691ARW –40°C to +85°C R-16
ADM8691ARU –40°C to +85°C RU-16
ADM8692AN –40°C to +85°C N-8
ADM8692ARN –40°C to +85°C SO-8
ADM8693AN –40°C to +85°C N-16
ADM8693ARN –40°C to +85°C R-16A
ADM8693ARW –40°C to +85°C R-16
ADM8693ARU –40°C to +85°C RU-16
ADM8694AN –40°C to +85°C N-8
ADM8694ARN –40°C to +85°C SO-8
ADM8695AN –40°C to +85°C N-16
ADM8695ARW –40°C to +85°C R-16
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADM8690–ADM8695 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
*N = Plastic DIP; R = Small Outline (Wide); R = Small Outline (Narrow);
RU = Thin Shrink Small Outline; SO = Small Outline.
ADM8690–ADM8695
REV. 0
–4–
PIN FUNCTION DESCRIPTION
Mnemonic Function
V
CC
Power Supply Input: +5 V Nominal.
V
BATT
Backup Battery Input.
V
OUT
Output Voltage, VCC or V
BATT
is internally switched to V
OUT
depending on which is at the highest potential. V
OUT
can supply up to 100 mA to power CMOS RAM. Connect V
OUT
to VCC if V
OUT
and V
BATT
are not used.
GND 0 V. Ground reference for all signals.
RESET Logic Output. RESET goes low if
1. V
CC
falls below the Reset Threshold
2. The watchdog timer is not serviced within its timeout period.
The reset threshold is typically 4.65 V for the ADM8690/ADM8691/ADM8694/ADM8695 and 4.4 V for the ADM8692
and ADM8693.
RESET remains low for 50 ms (ADM8690/ADM8691/ADM8692/ADM8693) or 200 ms (ADM8694/
ADM8695) after V
CC
returns above the threshold. RESET also goes low for 50 (200) ms if the watchdog timer is
enabled but not serviced within its timeout period. The
RESET pulse width can be adjusted on the ADM8691/ADM8693/
ADM8695 as shown in Table I. The
RESET output has an internal 3 µA pull up, and can either connect
to an open collector Reset bus or directly drive a CMOS gate without an external pull-up resistor.
WDI Watchdog Input. WDI is a three level input. If WDI remains either high or low for longer than the watchdog timeout
period,
RESET pulses low and WDO goes low. The timer resets with each transition on the WDI line. The watchdog
timer may be disabled if WDI is left floating or is driven to midsupply.
PFI Power Fail Input. PFI is the noninverting input to the Power Fail Comparator when PFI is less than 1.3 V,
PFO
goes low. Connect PFI to GND or V
OUT
when not used.
PFO Power Fail Output. PFO is the output of the Power Fail Comparator. It goes low when PFI is less than 1.3 V. The
comparator is turned off and
PFO goes low when VCC is below V
BATT
.
CE
IN
Logic Input. The input to the CE gating circuit. Connect to GND or V
OUT
if not used.
CE
OUT
Logic Output. CE
OUT
is a gated version of the CEIN signal. CE
OUT
tracks CEIN when VCC is above the reset
threshold. If V
CC
is below the reset threshold, CE
OUT
is forced high. See Figures 5 and 6.
BATT ON Logic Output. BATT ON goes high when V
OUT
is internally switched to the V
BATT
input. It goes low when V
OUT
is internally switched to VCC. The output typically sinks 35 mA and can directly drive the base of an external
PNP transistor to increase the output current above the 100 mA rating of V
OUT
.
LOW LINE Logic Output. LOW LINE goes low when VCC falls below the reset threshold. It returns high as soon as VCC rises
above the reset threshold.
RESET Logic Output. RESET is an active high output. It is the inverse of
RESET.
OSC SEL Logic Oscillator Select Input. When OSC SEL is unconnected (floating) or driven high, the internal oscillator sets
the reset active time and watchdog timeout period. When OSC SEL is low, the external oscillator input, OSC IN,
is enabled. OSC SEL has a 3 µA internal pull-up (see Table I).
OSC IN Oscillator Logic Input. With OSC SEL low, OSC IN can be driven by an external clock signal or an external
capacitor can be connected between OSC IN and GND. This sets both the reset active pulse timing and the watchdog timeout period (see Table I and Figure 4). With OSC SEL high or floating, the internal oscillator is enabled
and the reset active time is fixed at 50 ms typ. (ADM8691/ADM8693) or 200 ms typ (ADM8695). In this mode the
OSC IN pin selects between fast (100 ms) and slow (1.6 s) watchdog timeout periods. In both modes, the timeout
period immediately after a reset is 1.6 s typical.
WDO Logic Output. The Watchdog Output, WDO, goes low if WDI remains either high or low for longer than the
watchdog timeout period.
WDO is set high by the next transition at WDI. If WDI is unconnected or at midsupply,
the watchdog timer is disabled and WDO remains high. WDO also goes high when LOW LINE goes low.
ADM8690–ADM8695
REV. 0
–5–
PIN CONFIGURATIONS
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM8690
ADM8692
ADM8694
V
OUT
PFO
WDI
RESET
V
BATT
V
CC
GND
PFI
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
ADM8691
ADM8693
ADM8695
V
BATT
CE
IN
WDO
RESET
RESET
V
OUT
V
CC
GND
PFO
WDI
CE
OUT
BATT ON
LOW LINE
OSC IN
OSC SEL
PFI
CIRCUIT INFORMATION
Battery Switchover Section
The battery switchover circuit compares VCC to the V
BATT
input, and connects V
OUT
to whichever is higher. Switchover
occurs when V
CC
is 50 mV higher than V
BATT
as VCC falls, and
when V
CC
is 70 mV greater than V
BATT
as VCC rises. This
20 mV of hysteresis prevents repeated rapid switching if V
CC
falls very slowly or remains nearly equal to the battery voltage.
V
CC
V
BATT
V
OUT
BATT ON
(ADM8690,
ADM8695)
100
mV
700
mV
INTERNAL
SHUTDOWN SIGNAL
WHEN
V
BATT
> (VCC + 0.7V)
GATE DRIVE
Figure 1. Battery Switchover Schematic
During normal operation, with VCC higher than V
BATT
, VCC is
internally switched to V
OUT
via an internal PMOS transistor
switch. This switch has a typical on-resistance of 0.7 Ω and can
supply up to 100 mA at the V
OUT
terminal. V
OUT
is normally
used to drive a RAM memory bank which may require instantaneous currents of greater than 100 mA. If this is the case then a
bypass capacitor should be connected to V
OUT
. The capacitor
will provide the peak current transients to the RAM. A capacitance value of 0.1 µF or greater may be used.
If the continuous output current requirement at V
OUT
exceeds
100 mA, or if a lower V
CC–VOUT
voltage differential is desired,
an external PNP pass transistor may be connected in parallel with
the internal transistor. The BATT ON output (ADM8691/
ADM8693/ADM8695) can directly drive the base of the external transistor.
A 7 Ω MOSFET switch connects the V
BATT
input to V
OUT
during battery backup. This MOSFET has very low input-to-output differential (dropout voltage) at the low current levels
required for battery back up of CMOS RAM or other low power
CMOS circuitry. The supply current in battery back up is typically 0.4 µA.
The ADM8690/ADM8691/ADM8694/ADM8695 operates with
battery voltages from 2.0 V to 4.25 V, and the ADM8692/
ADM8693 operates with battery voltages from 2.0 V to 4.0 V.
High value capacitors, either standard electrolytic or the farad
size double layer capacitors, can also be used for short-term
memory backup. A small charging current of typically 10 nA
(0.1 µA max) flows out of the V
BATT
terminal. This current is
useful for maintaining rechargeable batteries in a fully charged
condition. This extends the life of the backup battery by compensating for its self discharge current. Also note that this current poses no problem when lithium batteries are used for
backup since the maximum charging current (0.1 µA) is safe for
even the smallest lithium cells.
If the battery switchover section is not used, V
BATT
should be
connected to GND and V
OUT
should be connected to VCC.
PRODUCT SELECTION GUIDE
Part Nominal Reset Nominal V
CC
Nominal Watchdog Battery Backup Base Drive Chip Enable
Number Time Reset Threshold Timeout Period Switching Ext PNP Signals
ADM8690 50 ms 4.65 V 1.6 s Yes No No
ADM8691 50 ms or ADJ 4.65 V 100 ms, 1.6 s, ADJ Yes Yes Yes
ADM8692 50 ms 4.4 V 1.6 s Yes No No
ADM8693 50 ms or ADJ 4.4 V 100 ms, 1.6 s, ADJ Yes Yes Yes
ADM8694 200 ms 4.65 V 1.6 s Yes No No
ADM8695 200 ms or ADJ 4.65 V 100 ms, 1.6 s, ADJ Yes Yes Yes
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