Analog Devices ADM1486JN, ADM1486ARM, ADM1486AR, ADM1486AQ, ADM1486AN Datasheet

+5 V Low Power

PRELIMINARY TECHNICAL DATA

a

RS-485 PROFIBUS Transceiver

Preliminary Technical Data ADM1486

FEATURES
Meets & Exceeds EIA RS-485 & EIA RS-422 Standard
50 Mb/s Data Rate
Recommended for PROFIBUS Applications

2.1V Minimum Differential Output with 54
Termination
Low Power 0.5mA I
Thermal Shutdown & Short Circuit Protection
Zero Skew Driver & Receiver
Driver Propagation Delay: 8 ns
Receiver Propagation Delay: 12 ns
High Z Outputs with Drivers Disabled or Power Off
Superior Upgrade for SN65ALS1176
15kV HBM ESD Protection on I/O Pins A & B
Available in Standard 8-pin SOIC & Miniature 8-pin
Micro SOIC packages

APPLICATIONS
Industrial Field Equipment

CC

⍀⍀

⍀

⍀⍀

FUNCTIONAL BLOCK DIAGRAM

RO

RE

DE

DI

R

D

V

CC

B
A

GND

ADM1486

GENERAL DESCRIPTION

The ADM1486 is a differential line transceiver suitable
for high speed bidirectional data communication on
multipoint bus transmission lines. It is designed for
balanced data transmission, complies with EIA Standards
RS-485 and RS-422 and is recommended for PROFIBUS
applications. The part contains a differential line driver
and a differential line receiver. Both the driver and the
receiver may be enabled independently. When disabled or
with power off, the driver outputs are tristated.

The ADM1486 operates from a single +5 V power supply.
Excessive power dissipation caused by bus contention or
by output shorting is prevented by a thermal shutdown
circuit. This feature forces the driver output into a high
impedance state if during fault conditions a significant
temperature increase is detected in the internal driver
circuitry.

Up to 50 transceivers may be connected simultaneously on
a bus, but only one driver should be enabled at any time.
It is important therefore that the remaining disabled
drivers do not load the bus. To ensure this, the ADM1486
driver features high output impedance when disabled and
also when powered down.

This minimizes the loading effect when the transceiver is
not being utilized. The high impedance driver output is
maintained over the entire common-mode voltage range
from –7 V to +12 V.

The receiver contains a fail safe feature which results in a
logic high output state if the inputs are unconnected
(floating).

The ADM1486 is fabricated on BiCMOS, an advanced
mixed technology process combining low power CMOS
with fast switching bipolar technology. All inputs and
outputs contain protection against ESD; all driver outputs
feature high source and sink current capability. An epi­taxial layer is used to guard against latch-up.

The ADM1486 features extremely fast switching speeds.
Minimal driver propagation delays permit transmission at
data rates up to 50 Mbits/s while low skew minimizes
EMI interference.

The part is fully specified over the commercial and indus­trial temperature range and is available in an 8-lead
DIL/SOIC/µSOIC package.

REV Pr. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2000

ADM1486–SPECIFICATIONS

PRELIMINARY TECHNICAL DATA

(VCC = +5 V ± 5%. All specifications T

MIN

to T

unless otherwise noted.)

MAX

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Differential Output Voltage, V

OD

2.0 5.0 V V

5.0 V R = Infinity, Figure 1
= 5 V, R = 50 ⍀ (RS-422), Figure 1

CC

2.1 5.0 V R = 27 ⍀ (RS-485), Figure 1

V

OD3

| for Complementary Output States 0.2 V R = 27 ⍀ or 50 ⍀, Figure 1

⌬|V

OD

Common-Mode Output Voltage V
⌬|V

| for Complementary Output States 0.2 V R = 27 ⍀ or 50 ⍀

OD

Output Short Circuit Current(V
Output Short Circuit Current(V

OC

=High) 60 150 mA –7 V ⭐ VO ⭐ +12 V

OUT

=Low) 60 150 mA –7 V ⭐ VO ⭐ +12 V

OUT

CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V

2.1 5.0 V V

3 V R = 27 ⍀ or 50 ⍀, Figure 1

INL

2.0 V

INH

0.8 V

= –7 V to +12 V, Figure 2

TST

Logic Input Current (DE, DI) ±1.0 µA

RECEIVER

Differential Input Threshold Voltage, VTH–0.2 +0.2 V –7 V ⭐ VCM ⭐ +12 V
Input Voltage Hysteresis, ⌬V

TH

Input Resistance 20 k⍀ –7 V ⭐ V
Input Current (A, B) + 1 mA V

70 mV VCM = 0 V

= 12 V

–0.8 mA V

IN

= –7 V

IN

⭐ +12 V

CM

Logic Enable Input Current (RE)±1µA
CMOS Output Voltage Low, V
CMOS Output Voltage High, V

OL

OH

4.0 V I

0.4 V I

Short Circuit Output Current 7 85 mA V
Tristate Output Leakage Current ±1.0 µA 0.4 V ⭐ V

= +4.0 mA

OUT

= –4.0 mA

OUT

= GND or V

OUT

⭐ +2.4 V

OUT

CC

POWER SUPPLY CURRENT

ICC (Outputs Enabled) 1.2 2.0 mA
ICC (Outputs Disabled) 0.9 1.5 mA

Specifications subject to change without notice.

Outputs Unloaded, Digital Inputs = GND or V
Outputs Unloaded, Digital Inputs = GND or V

CC
CC

TIMING SPECIFICATIONS

(VCC = +5 V ± 5%. All specifications T

MIN

to T

unless otherwise noted.)

MAX

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Propagation Delay Input to Output T
Driver O/P to O/P T
Driver Rise/Fall Time T

SKEW

R

, T

F

PLH

, T

PHL

48 15 ns

02nsR
510nsR

RL Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

L

Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

L

Driver Enable to Output Valid 8 15 ns
Driver Disable Timing 8 15 ns

RECEIVER

Propagation Delay Input to Output T
Skew |T

PLH–TPHL

Receiver Enable T
Receiver Disable T

Specifications subject to change without notice.

|02ns

EN1

EN2

PLH

, T

PHL

81220nsC

= 15 pF, Figure 5

L

5 10 ns Figure 6
5 10 ns Figure 6

–2–

REV. B

ADM1486

WARNING!

ESD SENSITIVE DEVICE

PRELIMINARY TECHNICAL DATA

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V

Inputs

Driver Input (DI) . . . . . . . . . . . .–0.3 V to V

Control Inputs (DE, RE) . . . . . .–0.3 V to V

+ 0.3 V

CC

+ 0.3 V

CC

Receiver Inputs (A, B) . . . . . . . . . . . . . . –9 V to +14 V

Outputs

Pin Mnemonic Function

1 R O Receiver Output. When enabled if A >B

2 RE Receiver Output Enable. A low level

Driver Outputs . . . . . . . . . . . . . . . . . . . . –9 V to +14 V

Receiver Output . . . . . . . . . . . . .–0.5 V to V

Power Dissipation 8-Lead DIP . . . . . . . . . . . . . . 500 mW

, Thermal Impedance . . . . . . . . . . . . . . . . +130°C/W

θ

JA

+ 0.5 V

CC

3 D E Driver Output Enable. A high level

Power Dissipation 8-Lead SOIC . . . . . . . . . . . . 450 mW

, Thermal Impedance . . . . . . . . . . . . . . . . +170°C/W

θ

JA

Power Dissipation 8-Lead Cerdip . . . . . . . . . . . . 500 mW

θ

, Thermal Impedance . . . . . . . . . . . . . . . . +125°C/W

JA

4 D I Driver Input. When the driver is en-

Power Dissipation 8-Lead µSOIC . . . . . . . . . . . . . . mW

, Thermal Impedance . . . . . . . . . . . . . . . . . . . .+°C/W

θ

JA

Operating Temperature Range

Commercial (J Version) . . . . . . . . . . . . . . 0°C to +70°C

5 G ND Ground Connection, 0 V.

6 A Noninverting Receiver Input A/Driver

Industrial (A Version) . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . .–65°C to +150°C

7 B Inverting Receiver Input B/Driver

Lead Temperature (Soldering, 10 sec) . . . . . . . . +300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

*Stresses above those listed under Absolute Maximum Ratings may cause permanent

damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum ratings for extended
periods of time may affect device reliability.

8V

CC

Table I. Transmitting

INPUTS OUTPUTS

RERE

RE DE DI B A

RERE

X1101
X1010
X0 XZZ

PIN FUNCTION DESCRIPTION

by 200 mV, then RO = High. If A < B
by 200 mV, then RO = Low.

enables the receiver output, RO. A high
level places it in a high impedance state.

enables the driver differential outputs, A
and B. A low level places it in a high
impedance state.

abled a logic Low on DI forces A low
and B high while a logic High on DI
forces A high and B low.

Output A.

Output B.

Power Supply, 5 V ± 5%.

PIN CONFIGURATION

RO

1

V

8

CC

ADM 14 86

2

RE

TO P VIEW

3

DE

DI

(Not to scale)

45

B

7

A

6

GND

Table II. Receiving

ORDERING GUIDE

INPUTS OUTPUT

RERE

RE DE A-B RO

RERE

00 ⭓+0.2 V 1
00 ⭐ –0.2 V 0
0 0 Inputs Open 1
10 X Z

Model Range Option

ADM1486JN 0°C to +70°C N-8

ADM1486JR 0°C to +70°C SO-8

ADM1486AN –40°C to +85°C N-8

Temperature Package

ADM1486AR –40°C to +85°C SO-8

ADM1486ARM -40°C to +85°C RM-8

ADM1486AQ –40°C to +85°C Q-8

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADM1486 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

REV. PrB

–3–