ANALOG DEVICES ADM13305 Service Manual

Dual Processor
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FEATURES

Dual supervisory circuits Supply voltage range of 2.7 V to 5.5 V Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V Adjustable 0.6 V voltage reference Maximum supply current of 40 μA 140 ms (minimum) reset timeout Watchdog timer with 1.6 sec (typical) timeout RESET valid from V Push-pull RESET and 8-lead, narrow body SOIC package Temperature range: −40°C to +85°C

APPLICATIONS

Supervising DSPs/microcontrollers Industrial and portable equipment Wireless systems Notebook/desktop computers

GENERAL DESCRIPTION

The ADM13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to DSP and microprocessor-based systems.
There are five models available, all of which feature a combination of internally pretrimmed undervoltage threshold options for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also an adjustable input option with an undervoltage threshold voltage of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 models have two internally fixed thresholds. The ADM13305-4 and ADM13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. See the Ordering Guide for a list of all available options.
During power-up, exceeds 1.1 V. The device then monitors the SENSEv input pins and holds the inputs remains below the rising threshold voltage, V
Once the supplies monitored at the SENSEv inputs rise above their associated thresholds, the reset signal remains low for the reset timeout period before deasserting. Subsequently, if a voltage monitored by the SENSEv pins falls below its associ­ated falling threshold, V ADM13305 features both an active high RESET and an active
RESET
low
output.
≥ 1.1 V
DD
RESET
outputs
RESET
is asserted when the supply voltage
RESET
output low as long as either of the SENSEv
RESET
IT−
, the
output asserts. The
IT+
.
Supervisors with Watchdog
ADM13305

FUNCTIONAL BLOCK DIAGRAMS

ADM13305-18
V
DD
14k
MR
SENSE1
SENSE2
GND
SENSE1
GND
SENSE2
WDI
V
MR
WDI
R1
R2
R3
DD
R1
TRANSITIO N
DETECTIO N
14k
R2
TRANSITIO N
DETECTIO N
R4
1.25V
0.6V
WATCHDOG
LOGIC + TIMER
Figure 1.
WATCHDOG
LOGIC + TIMER
Figure 2. .
As well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within the preset timeout period. A reset signal can also be asserted by an external push button through the manual reset input pin.
The ADM13305 is available in an 8-lead, narrow body SOIC package. The device operates over the extended industrial temperature range of −40°C to +85°C.
ADM13305-25 ADM13305-33
RESET
LOGIC + TIMER
OSCILLATOR
ADM13305-4 ADM13305-5
RESET
LOGIC + TIMER
OSCILLATOR
RESET
RESET
RESET
RESET
06922-002
06922-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
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TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Requirements .................................................................. 5
Switching Characteristics ............................................................ 5
Functional Truth Table ................................................................ 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6

REVISION HISTORY

8/07—Revision 0: Initial Version
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 10
Input Configuration ................................................................... 10
Reset Output ............................................................................... 10
Watchdog Timer ......................................................................... 10
Manual Reset (MR) .................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. 0 | Page 2 of 12
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SPECIFICATIONS

VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1. ADM13305-18, ADM13305-25, and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.7 5.5 V SUPPLY CURRENT, IDD 40 µA INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD RESET, RESET OUTPUT
High Level Output Voltage, VOH V V V Low Level Output Voltage, VOL 0.2 V IOL = 20 µA
0.4 V IOL = 2 mA, VDD = 3.3 V
0.4 V IOL = 3 mA, VDD = 5.5 V Power-Up Reset Voltage
1
SENSE INPUTS
Falling Threshold Voltage, V
1.64 1.68 1.72 V TA = 0°C to 85°C
IT−
2.20 2.25 2.30 V TA = 0°C to 85°C
2.86 2.93 3.00 V TA = 0°C to 85°C
4.46 4.55 4.64 V TA = 0°C to 85°C
1.64 1.68 1.73 V TA = −40°C to +85°C
2.20 2.25 2.32 V TA = −40°C to +85°C
2.86 2.93 3.02 V TA = −40°C to +85°C
4.46 4.55 4.67 V TA = −40°C to +85°C Hysteresis at SENSEv Inputs, V
15 mV V
HYS
20 mV V 30 mV V 40 mV V
WDI
Average High Level Input Current, I Average Low Level Input Current, I
100 150 µA WDI = VDD = 5.5 V
H(AV)
−15 −20 µA WDI = 0 V, VDD = 5.5 V
L(AV)
INPUT VOLTAGE AT MR AND WDI
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V INPUT TRANSITION RISE AND FALL RATE AT MR
HIGH LEVEL INPUT CURRENT, IH
WDI 120 170 µA WDI = VDD = 5.5 V
MR
SENSE1 5 8 µA SENSE1 = VDD = 5.5 V
SENSE2 6 9 µA SENSE2 = VDD = 5.5 V LOW LEVEL INPUT CURRENT, IL
WDI −120 −170 µA WDI = 0 V, VDD = 5.5 V
MR
SENSEv −1 +1 µA SENSE1, SENSE2 = 0 V
1
The lowest supply voltage at which
RESET
becomes active. t
− 0.2 V IOH = −20 µA
DD
− 0.4 V IOH = −2 mA, VDD = 3.3 V
DD
− 0.4 V IOH = −3 mA, VDD = 5.5 V
DD
0.4 V IOL = 20 µA, VDD ≥ 1.1 V
= 1.68 V
IT−
= 2.25 V
IT−
= 2.93 V
IT−
= 4.55 V
IT−
50 ns/V
−130 −180 µA
−430 −600 µA
, VDD ≥ 15 s/V.
r
= 0.7 × VDD, VDD = 5.5 V
MR
= 0 V, VDD = 5.5 V
MR
Rev. 0 | Page 3 of 12
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VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.7 5.5 V SUPPLY CURRENT, IDD 40 µA INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD RESET, RESET OUTPUT
High-Level Output Voltage, VOH V V V Low-Level Output Voltage, VOL 0.2 V IOH = 20 µA
0.4 V IOH = 2 mA, VDD = 3.3 V
0.4 V IOH = 3 mA, VDD = 5.5 V Power-Up Reset Voltage
1
SENSEv INPUTS
Falling Input Threshold Voltage, V
0.5952 0.6 0.6048 V TA = −40°C to +85°C
IT−
2.23 2.25 2.29 V TA = −40°C to +85°C
2.90 2.93 2.98 V TA = −40°C to +85°C Hysteresis at SENSEv Inputs, V
0 mV V
HYS
20 mV V 30 mV V
WDI
Average High Level Input Current, I Average Low Level Input Current, I
100 150 µA WDI = VDD = 5.5 V
H(AV)
−15 −20 µA WDI = 0 V, VDD = 5.5 V
L(AV)
INPUT VOLTAGE AT MR AND WDI
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V INPUT TRANSITION RISE AND FALL RATE AT MR
HIGH LEVEL INPUT CURRENT, IH
WDI 120 170 µA WDI = VDD = 5.5 V
MR
SENSE1 5 8 µA SENSE1 = VDD = 5.5 V
SENSE2 −50 +50 nA SENSE2 = VDD = 5.5 V LOW LEVEL INPUT CURRENT, IL
WDI −120 −170 µA WDI = 0 V, VDD = 5.5 V
MR
SENSEv −1 +1 µA SENSE1, SENSE2 = 0 V
1
The lowest supply voltage at which
RESET
becomes active. tr, VDD ≥ 15 µs/V.
− 0.2 V IOH = −20 µA
DD
− 0.4 V IOH = −2 mA, VDD = 3.3 V
DD
− 0.4 V IOH = −3 mA, VDD = 5.5 V
DD
0.4 V IOH = 20 µA, VDD ≥ 1.1 V
= 0.6 V
IT−
= 2.25 V
IT−
= 2.93 V
IT−
50 ns/V
−130 −180 µA
−430 −600 µA
= 0.7 × VDD, VDD = 5.5 V
MR
= 0 V, VDD = 5.5 V
MR
Rev. 0 | Page 4 of 12
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TIMING REQUIREMENTS

VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 3. ADM13305-18, ADM13305-25 and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
PULSE WIDTH (tw)
SENSEv 6 µs V MR
100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
WDI 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
Table 4. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
PULSE WIDTH (tw)
SENSEv 30 µs V MR
100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
WDI 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD

SWITCHING CHARACTERISTICS

VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 5. ADM13305-18, ADM13305-25 and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
Watchdog Timeout (t Delay Time (td) 140 200 280 ms Propagation Delay, High-to-Low, MR to RESET1/RESET (t Propagation Delay, Low-to-High, MR to RESET/RESET1 (t Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (t Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (t
1
The reset timeout delay of 200 ms masks the propagation delay.
) 1.1 1.6 2.3 sec
t(OUT)
200 500 ns V
)
PHL
200 500 ns V
)
PLH
1 5 µs
)
PHL
1 5 µs
)
PLH
SENSEvL
= V
IT−
SENSEvL
V
I(SENSEv)
V
I(SENSEv)
I(SENSEv)
I(SENSEv)
VIH = V VIH = V
− 0.3 V, V
= V
IT−
≥ V ≥ V
≥ V
IT+
≥ V
IT+
+ 0.3 V, VIL = V
IT+
+ 0.3 V, VIL = V
IT+
= V
SENSEvH
− 0.3 V, V
+ 0.2 V, MR ≥ 0.7 × VDD
IT+
+ 0.2 V, MR ≥ 0.7 × VDD
IT+
IT+
SENSEvH
+ 0.3 V
= V
IT+
+ 0.3 V
+ 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
− 0.3 V, MR ≥ 0.7 × VDD
IT−
− 0.3 V, MR ≥ 0.7 × VDD
IT−
Table 6. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
Watchdog Timeout (t Delay Time (td) 140 200 280 ms Propagation Delay, High-to-Low, MR to RESET1/RESET (t Propagation Delay, Low-to-High, MR to RESET/RESET1 (t Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (t Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (t
1
The reset timeout delay of 200 ms masks the propagation delay.
) 1.1 1.6 2.3 sec
t(out)
200 500 ns V
)
PHL
200 500 ns V
)
PLH
30 µs
)
PHL
30 µs
)
PLH
V
I(SENSEv)
V
I(SENSEv)
I(SENSEv)
I(SENSEv)
VIH = V VIH = V
≥ V
+ 0.2 V, MR ≥ 0.7 × VDD
IT+
≥ V
+ 0.2 V, MR ≥ 0.7 × VDD
IT+
≥ V
+ 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
IT+
≥ V
+ 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
IT+
+ 0.3 V, VIL = V
IT+
+ 0.3 V, VIL = V
IT+
− 0.3 V, MR ≥ 0.7 × VDD
IT−
− 0.3 V, MR ≥ 0.7 × VDD
IT−

FUNCTIONAL TRUTH TABLE

Table 7.
SENSE1 > V
MR
L X1 X H 0 0 L H H 0 1 L H H 1 0 L H H 1 1 H L
1
X = don’t care.
SENSE2 > V
IT1
1
L H
IT2
Rev. 0 | Page 5 of 12
RESET
RESET
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ABSOLUTE MAXIMUM RATINGS

Table 8.
Parameter Rating
Supply Voltage Range, VDD −0.3 V to +6 V MR , WDI SENSE1, SENSE2 (VDD + 0.3 V)VIT/V RESET, RESET Maximum Low Output Current 5 mA Maximum High Output Current −5 mA Input Clamp Current (VI < 0 V, VI > VDD) ±20 mA Output Clamp Current (VO < 0 V, VO > VDD) ±20 mA Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
−0.3 V to V
−0.3 V to +6 V
+ 0.3 V
DD
REF
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

Table 9.
Package Type θJA Unit
8-Lead SOIC_N (R-8) 206 °C/W

ESD CAUTION

Rev. 0 | Page 6 of 12
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1
SENSE1
SENSE2 2
ADM13305
WDI 3
GND 4
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
8
V
DD
MR7
RESET6
RESET5
06922-003
Table 10. Pin Function Descriptions
Pin No. Mnemonic Description
1 SENSE1 Sense Input Voltage 1. 2 SENSE2 Sense Input Voltage 2. 3 WDI Watchdog Timer Input. 4 GND Ground. 5
RESET
Active-Low Reset Output.
6 RESET Active-High Reset Output. 7
MR
Manual Reset Input.
8 VDD Supply Voltage.
Rev. 0 | Page 7 of 12
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TYPICAL PERFORMANCE CHARACTERISTICS

0.6003
0.6001
(V)
IT
0.5999
0.5997
0.5995
0.5993
0.5991
0.5989
INPUT THRESHOLD VOLTAGE, V
0.5987
0.5985 –40 –20 0 20 40 60 80
FREE AIR TEM PERATURE, TA (°C)
TA = 25°C
V
= 2V
DD
MR = OPEN
06922-004
10
(µs)
9
W
t
8
7
6
5
4
3
2
1
MINIMUM PULSE DURATION AT SENSE,
0
0 1000
100 200 300 400 500 600 700 800 900
SENSE THRESHOLD OVERDRIVE (mV)
VDD = 5.5V
MR = OPEN
06922-007
Figure 4. Sense Threshold Voltage vs. Free Air Temperature at VDD Figure 7. ADM13305-18, ADM13305-25 and ADM13305-33 Minimum Pulse
Duration at SENSE vs. Sense Threshold Overdrive
40
35
30
(µA)
25
DD
20
15
10
5
SUPPLY CURRENT, I
–5
–10
0
–1.0
–0.500.5
1.0
2.0
2.5
3.0
1.5
SUPPLY VOLTAGE, VDD (V)
3.5
SENSEv = 5.5V
MR = OPEN T
4.0
4.5
= 25°C
A
5.0
5.5
6.0
06922-005
6.5
40
(µs)
39
W
t
38
37
36
35
34
33
32
31
MINIMUM PUL SE DURATION AT SENSE,
30
0 1000
100 200 300 400 500 600 700 800 900
SENSE THRESHOLD OVERDRIVE (mV)
VDD = 5.5V
MR = OPEN
06922-017
Figure 5. Supply Current vs. Supply Voltage Figure 8. ADM13305-4 and ADM13305-5 Minimum Pulse Duration at SENSE
vs. Sense Threshold Overdrive
200
100
0
–100
(µA)
I
–200
–300
–400
–500
INPUT CURRENT, I
–600
–700
–800
–900
–1.0 7.0
–0.500.5
1.0
2.0
3.0
1.5
2.5
INPUT VOLTAGE AT MR, VI (V)
3.5
4.0
Figure 6. Input Current vs. Input Voltage at
4.5
5.0
VDD = 5.5V
T
= 25°C
A
6.0
5.5
6.5
MR
06922-006
Rev. 0 | Page 8 of 12
2.50
(V)
OH
2.00
1.50
1.00
0.50
HIGH LEVEL OUTPUT VOLTAGE, V
VDD = 2V
MR = OPEN
0
0––5–4–3–2–1
HIGH LEVEL OUTPUT CURRENT , IOH (mA)
–40°C 0°C +25°C +85°C
Figure 9. High Level Output Voltage vs. High Level Output Current
06922-008
6
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6.0
5.5
(V)
5.0
OH
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
HIGH LEVEL OUTPUT VOLTAGE, V
0.5
0
VDD = 5.5V
MR = OPEN
0––50–40–30–20–10
HIGH LEVEL OUTPUT CURRENT, I
OH
(mA)
–40°C 0°C +25°C +85°C
60
Figure 10. High Level Output Voltage vs. High Level Output Current
0.25
(V)
OL
0.20
0.15
0.10
–40°C 0°C +25°C +85°C
1.0
0.9
(V)
OL
0.8
0.7
0.6
0.5
0.4
0.3
0.2
LOW LEVEL OUTPUT VOLTAGE, V
0.1
06922-009
–40°C 0°C +25°C +85°C
VDD = 5.5V
0
06
5 10152025303540455055
LOW LEV EL OUTPUT CURRENT, IOL (mA)
MR = OPEN
06922-016
0
Figure 12. Low Level Output Voltage vs. Low Level Output Current
0.05
LOW LEVEL OUTPUT VOLTAGE, V
0
06
24135
LOW LEV EL OUTPUT CURRENT, IOL (mA)
Figure 11. Low Level Output Voltage vs. Low Level Output Current
VDD = 2V
MR = OPEN
06922-010
Rev. 0 | Page 9 of 12
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THEORY OF OPERATION

The ADM13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to DSP and microprocessor-based systems.
There are five models available, all of which feature a combina­tion of internally pretrimmed undervoltage threshold options for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also an adjustable input option with an undervoltage threshold of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 have two internally fixed thresholds, while the ADM13305-4 and ADM13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. See the Ordering Guide for a list of all available options.

INPUT CONFIGURATION

The ADM13305 is powered through VDD. To increase noise immunity in noisy applications, place a 0.1 μF capacitor between the V
input and ground.
DD
The SENSEv inputs are resistant to short power supply glitches. Do not allow an unused SENSEv input to float or to be grounded, instead connect it to a supply voltage greater than its specified threshold voltage.
Typically, the threshold voltage at each adjustable SENSEv input is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor divider network to the device as depicted in Figure 13, where,
+
R2R1
R2
⎞ ⎟ ⎠
V
= 0.6V
REF
06922-012
V
MONITERED
=
V6.0
⎜ ⎝
MONITORED VOLTAG E
R1
R2
Figure 13. Setting the Adjustable Monitor

RESET OUTPUT

The reset outputs are guaranteed to be in the correct state for
down to 1.1 V. During power-up,
V
DD
the supply voltage becomes greater than 1.1 V.
RESET
is asserted when
SENSEv
V
(NOM)
V
IT–
t
RESET
1
0
t
d
Figure 14. Reset Timing Diagram
t
d
t
Once the supplies monitored at the SENSEv pins rise above
RESET
their associated threshold level, the
signal remains low for the reset timeout period before deasserting. Subsequently, if either of the supplies monitored by the SENSEv pins falls below
RESET
its associated threshold the
The ADM13305 features both an active-low, push-pull
output reasserts.
RESET
output and an active-high, push-pull RESET output.

WATCHDOG TIMER

The ADM13305 features a watchdog timer that monitors microprocessor activity. A timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (WDI). If the timer counts through the preset
RESET
watchdog timeout period of 1.6 sec, shown in . Figure 15
The microprocessor is required to toggle the WDI pin to avoid being reset. Therefore, failure of the microprocessor to toggle WDI within the timeout period indicates a code execution error and the reset pulse generated restarts the microprocessor in a known state. The watchdog timer can be disabled by leaving WDI floating.
WDI
1
t
WD
0
RESET
1
is asserted, as
t
06922-013
Rev. 0 | Page 10 of 12
0
t
d
Figure 15. Watchdog Timing Diagram
t
06922-014
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MANUAL RESET (MR)

The ADM13305 features a manual reset input, which when driven low, asserts the reset output, as shown in Figure 16. When transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. An external push-button switch can be connected between and ground to allow the user to generate a reset.
MR
MR
MR
1
RESET
0
1
t
0
t
d
Figure 16. Manual Reset Timing Diagram
t
06922-015
Rev. 0 | Page 11 of 12
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OUTLINE DIMENSIONS

5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
Figure 17. 8-Lead Standard Small Outline Package [SOIC_N]

ORDERING GUIDE

Nominal Supervised Voltage
Model
ADM13305-18ARZ ADM13305-18ARZ-RL7 ADM13305-25ARZ ADM13305-25ARZ-RL7 ADM13305-33ARZ ADM13305-33ARZ-RL7 ADM13305-4ARZ ADM13305-4ARZ-RL7 ADM13305-5ARZ ADM13305-5ARZ-RL7
1
Z = RoHS Compliant Part.
2
0.6 V adjustable. External resistor divider determines the actual sense voltage.
1
1
3.3 V 1.8 V 2.93 V 1.68 V –40°C to +85°C 8-Lead SOIC_N R-8
1
3.3 V 2.5 V 2.93 V 2.25 V –40°C to +85°C 8-Lead SOIC_N R-8
1
3.3 V 2.5 V 2.93 V 2.25 V –40°C to +85°C 8-Lead SOIC_N R-8
1
5 V 3.3 V 4.55 V 2.93 V –40°C to +85°C 8-Lead SOIC_N R-8
1
5 V 3.3 V 4.55 V 2.93 V –40°C to +85°C 8-Lead SOIC_N R-8
1
3.3 V Adjustable
1
3.3 V Adjustable
1
2.5 V Adjustable
1
2.5 V Adjustable
SENSE1 SENSE2 SENSE1 SENSE2
3.3 V 1.8 V 2.93 V 1.68 V –40°C to +85°C 8-Lead SOIC_N R-8
85
1
4
1.27 (0.0500) BSC
0.51 (0.0201)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-A A
0.31 (0.0122)
Dimensions shown in millimeters and (inches)
Threshold Voltage (Typical)
2
2.93 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
2
2.93 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
2
2.25 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
2
2.25 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
Narrow Body
(R-8)
8° 0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
45°
Temperature Range
-A
012407
Package Description
Package Option
©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06922-0-8/07(0)
Rev. 0 | Page 12 of 12
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