ANALOG DEVICES ADM12914 Service Manual
±0.8% Accurate Quad UV/OV
V
Positive/Negative Voltage Supervisor
FEATURES
Quad undervoltage/overvoltage (UV/OV) positive/negative
supervisor
Supervises up to two negative rails
Adjustable UV and OV input thresholds
Industry leading threshold accuracy over the extended
temperature range: ±0.8%
1 V buffered reference output
Open-drain
Adjustable reset timeout with disable option
Outputs guaranteed down to V
Glitch immunity
62 μA supply current
16-lead QSOP package
Specified from −40°C to +125°C
APPLICATIONS
Server supply monitoring
FPGA/DSP core and I/O voltage monitoring
Telecommunications equipment
Medical equipment
GENERAL DESCRIPTION
The ADM12914 is a quad voltage supervisory IC ideally suited
for monitoring multiple rails in a wide range of applications.
Each monitored rail has two dedicated input pins, VHx and VLx,
which allows each rail to be monitored for both undervoltage
(UV) and overvoltage (OV) conditions with high threshold
accuracy of ±0.8%. Common active low undervoltage (
overvoltage (
voltage rails.
The ADM12914 includes a 1 V buffered reference output, REF,
that acts as an offset when monitoring a negative voltage. The
three-state SEL pin determines the polarity of the third and
fourth inputs, that is, it configures the device to monitor
positive or negative supplies.
The device incorporates an internal shunt regulator that enables
the device to be used in higher voltage systems. This feature
UV
and OV reset outputs
of 0.9 V
CC
OV
) pins are shared by each of the monitored
UV
) and
ADM12914
FUNCTIONAL BLOCK DIAGRAM
CC
ADM12914
VH1
500mV
VL1
VH2
500mV
VL2
VH3
500mV
VL3
VH4
500mV
VL4
MUX
SEL GND
Figure 1.
requires a resistor to be placed between the main supply rail and
the V
pin to limit the current flow into the VCC pin at a level
CC
no greater than 10 mA. The ADM12914 uses the internal shunt
regulator to regulate V
if the supply line exceeds the absolute
CC
maximum ratings.
The ADM12914 is available in two models. The ADM12914-1
offers a latching overvoltage output that can be cleared by
toggling the
LATCH
input pin. The ADM12914-2 has a disable
pin that can override and disable both the
output signals.
The ADM12914 is available in a 16-lead QSOP package. The
device is specified over the extended temperature range of
−40°C to +125°C.
TIMER
TIMER
UV
OUTPUT
LOGIC
LOGIC
REF
and the
UV
OV
LATCH/DIS
REF
OV
08265-001
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2009-2010 Analog Devices, Inc. All rights reserved.
ADM12914
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 7
Theory of Operation ........................................................................ 9
Voltage Supervision ...................................................................... 9
Polarity Configuration ................................................................. 9
Monitoring Pin Connections .................................................... 10
Threshold Accuracy ................................................................... 10
Voltage Monitoring Example .................................................... 11
Power-Up and Power-Down ..................................................... 12
UV
/OV Timing Characteristics ............................................... 12
Timer Capacitor Selection ........................................................ 12
UV
and OV Rise and Fall Times .............................................. 13
UV
/OV OUTPUT Characteristics ........................................... 13
Glitch Immunity ......................................................................... 13
Undervoltage Lockout (UVLO) ............................................... 13
Shunt Regulator .......................................................................... 13
OV
Latch (ADM12914-1) ......................................................... 13
Disable (ADM12914-2) ............................................................. 14
Typical Applications ....................................................................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
6/10—Rev. B to Rev. C
Changed V
2/10—Rev. A to Rev. B
Changes to Figure 17 and Figure 18 ............................................. 10
12/09—Rev. 0 to Rev. A
Changes to Shunt Regulator Section ............................................ 13
9/09—Revision 0: Initial Version
of 1 V to VCC of 0.9 V in Features Section ............. 1
CC
Rev. C | Page 2 of 16
ADM12914
SPECIFICATIONS
TA = −40°C to +125°C. Typical values at TA = 25°C, unless otherwise noted. VCC = 3.3 V, VLx = 0.45 V, VHx = 0.55 V,
SEL = V
, DIS = open, unless otherwise noted.
CC
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SHUNT REGULATOR
VCC Shunt Regulator Voltage
VCC Shunt Regulator Load Regulation
V
6.3 6.6 6.8 V ICC = 5 mA
SHUNT
∆V
150 mV ICC = 2 mA to 10 mA
SHUNT
SUPPLY
Supply Voltage
Minimum VCC Output Valid
Supply Undervoltage Lockout
Supply Undervoltage Lockout Hysteresis
Supply Current
1
VCC 2.3 V
V
0.9 V DIS = 0 V
CCR(MIN )
V
1.94 2 2.06 V DIS = 0 V, VCC rising
CC(UVLO)
∆V
15 25 35 mV DIS = 0 V
CC(HYST )
V
SHUNT
ICC 62 100 A VCC = 2.3 V to 6.0 V
REFERENCE OUTPUT
Reference Output Voltage
V
0.994 1 1.008 V I
REF
= ±1 mA
VREF
UNDERVOLTAGE/OVERVOLTAGE CHARACTERISTICS
Undervoltage/Overvoltage Threshold
Undervoltage/Overvoltage Threshold to Output Delay t
VHx, VLx Input Current
UV/OV Timeout Period
OV LATCH CLEAR INPUT
OV Latch Clear Threshold Input High
OV Latch Clear Threshold Input Low
LATCH Input Current
V
496 500 504 mV VCC = 2.3 V to 6.0 V
UOT
100 200 350 s VHx = V
UOD
I
±10 nA
VHL
t
7.5 8.5 10.5 ms C
UOTO
TIMER
UOT
= 1 nF
V
1.2 V
(IH)
LATCH
V
0.8 V
(IL)
LATCH
I
50 nA V
LATCH
LATCH
> 0.5 V
DISABLE INPUT
DIS Input High
DIS Input Low
DIS Input Current
V
1.2 V
DIS(IH)
V
0.8 V
DIS(IL)
I
1.25 2 2.75 A V
DIS
> 0.5 V
DIS
TIMER CHARACTERISTICS
TIMER Pull-Up Current
TIMER Pull-Down Current
TIMER Disable Voltage
I
−1.7 −2.1 −2.5 A V
TIMER(UP)
I
TIMER(DOWN)
V
TIMER(DIS)
1.7 2.1 2.5 A V
−180 −270 mV Referenced to VCC
TIMER
TIMER
= 0 V
= 1.6 V
OUTPUT VOLTAGE
Output Voltage High UV/OV
Output Voltage Low UV/OV
VOH 1 V VCC = 2.3 V; I
VOL 0.1 0.3 V VCC = 2.3 V; I
0.01 0.15 V VCC = 0.9 V; IUV = 100 A
THREE-STATE INPUT SEL
Low Level Input Voltage VIL 0.4 V
High Level Input Voltage VIH 1.4 V
Pin Voltage when Left in High-Z State
SEL High, Low Input Current
Maximum SEL Input Current
1
The maximum voltage on the VCC pin is limited by the input current. The VCC pin has an internal 6.5 V shunt regulator and, therefore, a low impedance supply
exceeding 6 V may exceed the maximum allowable input current. When operating from a higher supply than 6 V, always use a dropper resistor.
VZ 0.8 0.9 1.0 V I
I
±25 A
SEL
I
±30 A SEL tied to VCC or GND
SEL(MAX)
= ±10 A
SEL
LATCH
= VCC,
− 5 mV or VLx = V
= −1 A
/
UV
OV
= 2.5 mA
/
UV
OV
+ 5 mV
UOT
Rev. C | Page 3 of 16
ADM12914
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
UV, OV
TIMER −0.3 V to (VCC + 0.3 V)
VLx, VHx, LATCH, DIS, SEL
ICC 10 mA
Reference Load Current (I
IUV, IOV 10 mA
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
) ±1 mA
REF
−0.3 V to +16 V
−0.3 V to +7.5 V
Table 3. Thermal Resistance
Package Type θJA Unit
16-Lead QSOP 104 °C/W
ESD CAUTION
Rev. C | Page 4 of 16
ADM12914
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
ADM12914-1
4
TOP VIEW
5
(Not to Scale)
6
7
8
16
15
14
13
12
11
10
9
V
CC
TIMER
SEL
LATCH
UV
OV
REF
GND
08265-002
Figure 2. ADM12914-1 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
ADM12914-1 ADM12914-2 Mnemonic Description
1, 3 1, 3 VH1, VH2
Voltage High Input 1 and Voltage High Input 2. If the voltage monitored by VH1 or VH2
drops below 0.5 V, an undervoltage condition is detected. Connect to V
2, 4 2, 4 VL1, VL2
Voltage Low Input 1. If the voltage monitored by VL1 or VL2 rises above 0.5 V, an
overvoltage condition is detected. Tie to GND when not in use.
5, 7 5, 7 VH3, VH4
Voltage High Input 3 and Voltage High Input 4. The polarity of these inputs is determined
by the state of the SEL pin (see Table 5). When the monitored input is configured as a
positive voltage and the voltage monitored by VH3 and VH4 drops below 0.5 V, an undervoltage condition is detected. Conversely, when the input is configured as a negative
voltage and the input drops below 0.5 V, an overvoltage condition is detected. Connect
to V
when not in use.
CC
6, 8 6, 8 VL3, VL4
Voltage Low Input 3 and Voltage Low Input 4. The polarity of these inputs is determined
by the state of the SEL pin (see Table 5). When the monitored input is configured as a
positive voltage and the voltage monitored by VL3 or VL4 rises above 0.5 V, an overvoltage
condition is detected. Conversely, when the input is configured as a negative voltage and
the input rises above 0.5 V, an undervoltage condition is detected. Tie to GND when not
in use.
9 9 GND
10 10 REF
Device Ground.
Buffered Reference Output. This pin is a 1 V reference that is used as an offset when
monitoring negative voltages. This pin can source or sink 1 mA, and drive loads up to 1 nF.
Larger capacitive loads may lead to instability. Leave unconnected when not in use.
11 11
Overvoltage Reset Output. OV is asserted low if a negative polarity input voltage drops
OV
below its associated threshold or if a positive polarity input voltage exceeds its threshold.
The ADM12914-1 allows OV
adjustable timeout period determined by the timer capacitor. This pin has a weak pull-up
and can be pulled up to 16 V externally. Leave this pin unconnected when not in use
to V
CC
12 12
Undervoltage Reset Output. UV is asserted low if a negative polarity input voltage exceeds
UV
its associated threshold or if a positive polarity input voltage drops below its threshold. UV
is held low for an adjustable timeout period set by the external capacitor tied to the TIMER
pin. The UV
pin has a weak pull-up to VCC and can be pulled up to 16 V externally via an
external pull-up resistor. Leave this pin unconnected when not in use.
13 N/A1
OV Latch Bypass Input/Clear Pin. When pulled high, the OV latch is cleared. When held
LATCH
high, the OV
output has the same delay and output characteristics as the UV output. When
pulled low, the OV output is latched when asserted. (Applies only to the ADM12914-1.)
N/A1 13 DIS
and UV Disable Input. When pulled high, the OV and UV outputs are held high
OV
irrespective of the state of the VHx and VLx input pins. However, if a UVLO condition occurs,
the OV
and UV outputs are asserted. This pin has a weak internal pull-down (2 µA) to GND.
Leave this pin unconnected when not in use. (Applies only to the ADM12914-2.)
14 14 SEL
Input Polarity Select. This three-state input pin allows the polarity of VH3, VL3, VH4, and VL4
to be configured. Connect this pin to V
possible input polarity configurations (see Tab l e 5).
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
ADM12914-2
4
TOP VIEW
5
(Not to Scale)
6
7
8
16
15
14
13
12
11
10
9
V
CC
TIMER
SEL
DIS
UV
OV
REF
GND
08265-011
Figure 3. ADM12914-2 Pin Configuration
when not in use.
CC
to be latched low. The ADM12914-2 holds OV low for an
or GND, or leave it open to select one of three
CC
Rev. C | Page 5 of 16
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