ANALOG DEVICES ADM1185 Service Manual

V
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Quad Voltage Monitor and Sequencer

FEATURES

Powered from 2.7 V to 5.5 V on the VCC pin Monitors 4 supplies via 0.8% accurate comparators Logical core with internal timeouts provides power supply
sequencing an
4 inputs can be programmed to monitor different voltage
vels with resistor dividers
le 3 open-drain enable outputs Open-drain power-good output (PWRGD) 10-lead MSOP

APPLICATIONS

Monitor and alarm functions Power supply sequencing Telecommunication and data communication equipment PCs/servers

GENERAL DESCRIPTION

The ADM1185 is an integrated, 4-channel, voltage monitoring and sequencing device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device.
Four precision comparators monitor four voltage rails. Al
l comparators have a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails.
A digital core interprets the status of the comparator outputs.
d fault protection
ADM1185

FUNCTIONAL BLOCK DIAGRAM

CC
POWER AND
ADM1185
VIN1
REF = 0.6V
VIN2
REF = 0.6V
VIN3
REF = 0.6V
VIN4
REF = 0.6V
REFERENCE GENERATOR
GND
Figure 1.
Internal time delays can be used for sequencing the startup of s
ubsequent power supplies enabled by the outputs. Supplies falling out of range are also detected and, as a result, appropriate outputs are disabled.
The ADM1185 has four open-drain outputs. In a typical co
nfiguration, OUT1 to OUT3 are used to enable power supplies, while PWRGD is a common power-good output, indicating the status of all monitored supplies.
The ADM1185 is available in a 10-lead mini small outline pa
ckage (MSOP).
STATE
MACHINE
CORE
REF = 0.6V
OUT1
OUT2
OUT3
PWRGD
06196-001

APPLICATIONS DIAGRAM

3.3V IN
2.5V OUT
1.8V OUT
1.2V OUT
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
VCC
ADM1185
OUT1VIN1
OUT2VIN2
OUT3VIN3
VIN4
GND PWRGD
POWER
GOOD
IN
REGULATOR1
EN OUT
GND
Figure 2.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
IN
REGULATOR2
EN OUT
GND
IN
REGULATOR3
EN OUT
GND
2.5V OUT
1.8V OUT
1.2V OUT
06196-002
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TABLE OF CONTENTS

Features.............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Applications Diagram ......................................................................1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4

REVISION HISTORY

11/07—Rev. 0 to Rev. A
Changes to Table 5............................................................................ 9
Changes to Figure 20 and Figure 21............................................. 11
3/07—Revision 0: Initial Version
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics..............................................6
Theory of Operation .........................................................................9
Power-On Sequencing and Monitoring.....................................9
Voltage Monitoring After Power-On....................................... 10
Cascading Multiple Devices...................................................... 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 13
Rev. A | Page 2 of 16
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SPECIFICATIONS

V
= 2.7 V to 5.5 V, TA = −40°C to +85°C, unless otherwise noted.
CC
Table 1.
Parameter Min Typ Max Unit Conditions
VCC PIN
Operating Voltage Range, VCC 2.7 3.3 5.5 V Supply Current, I
VIN1 TO VIN4 (VINx) PINS
Input Current, I Input Rising Threshold, V
OUT1 TO OUT3 (OUTx), PWRGD PINS
Output Low Voltage, V
0.4 V VCC = 1 V, I Leakage Current, I VCC that Guarantees Valid Outputs 1 V
TIMING DELAYS
VIN1 to OUT1 Rising Delay 100 190 280 ms VCC = 3.3 V, see Figure 7 VIN4 to PWRGD Rising Delay 100 190 280 ms VCC = 3.3 V, see Figure 7 VIN2 to OUT2, VIN3 to OUT3
Low-to-High Propagation Delay 30 μs VCC = 3.3 V, see Figure 9 High-to-Low Propagation Delay, All Inputs 30 μs VCC = 3.3 V, see Figure 10
24 80 μA
VCC
−20 +20 nA V
VINLEAK
THR
0.4 V VCC = 2.7 V, I
OUTL
ALERT
0.5952 0.6000 0.604 8
−1 +1 μA
= 0.7 V
VINx
V
= 2 mA
SINK
= 100 μA
SINK
All outputs are guaranteed to be either low or giving
alid output level from V
a v Delays only applicable to certain operations states;
fer to state diagram (Figure 19) for more details
re
= 1 V
CC
Rev. A | Page 3 of 16
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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VCC Pin −0.3 V to +6 V VINx Pins −0.3 V to +6 V OUTx, PWRGD Pins −0.3 V to +6 V Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +85°C Lead Temperature Soldering (10 sec) 300°C Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA Unit
10-Lead MSOP 137.5 °C/W

ESD CAUTION

Rev. A | Page 4 of 16
ADM1185
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GND
1
IN1
2
ADM1185
3
IN2
TOP VIEW
(Not to Scale)
4
IN3
IN4
5
Figure 3.
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 GND Chip Ground Pin. 2 VIN1
Noninverting Input of Comparator 1. The voltage on this pin is monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core. This input can also be driven by a logic signal to initiate a power-up sequence.
3 VIN2
Noninverting Input of Comparator 2. The voltage on this pin is monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core.
4 VIN3
Noninverting Input of Comparator 3. The voltage on this pin is monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core.
5 VIN4
Noninverting Input of Comparator 4. The voltage on this pin is monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core.
6 PWRGD
Active-High, Open-Drain Output. This output is pulled low exceeds 0.6 V, the state machine moves from STATE4 to STATE5, and PWRGD is asserted. Once in STATE5 (the PWRGD state), this output is driven low if the voltage on VIN1, VIN2, VIN3, or VIN4 falls below 0.6 V.
7 OUT3
Active-High, Open-Drain Output. This output is pulled low onc the state machine moves from STATE3 to STATE4, and OUT3 is asserted. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V.
8 OUT2
Active-High, Open-Drain Output. This output is pulled low onc the state machine moves from STATE2 to STATE3, and OUT2 is asserted. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V.
9 OUT1
Active-High, Open-Drain Output. This output is pulled low onc the state machine moves from STATE1 to STATE2, and OUT1 is asserted. A time delay of 190 ms (typical) is included before the assertion of this pin. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V.
10 VCC Positive Supply Input Pin. The operating supply voltage range is 2.7 V to 5.5 V.
10
9
8
7
6
VCC
OUT1
OUT2
OUT3
PWRGD
06196-003
compared with a 0.6 V reference. Can be used to
compared with a 0.6 V reference. Can be used to
compared with a 0.6 V reference. Can be used to
compared with a 0.6 V reference. Can be used to
once VCC = 1 V. When the voltage on each VINx input
e VCC = 1 V. When the voltage on VIN3 exceeds 0.6 V,
e VCC = 1 V. When the voltage on VIN2 exceeds 0.6 V,
e VCC = 1 V. When the voltage on VIN1 exceeds 0.6 V,
Rev. A | Page 5 of 16
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