ANALOG DEVICES ADF7902 Service Manual

ISM Band

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FEATURES

Single-chip, low power UHF receiver
Companion receiver to ADF7901 transmitter
Frequency range: 369.5 MHz to 395.9 MHz
Eight RF channels selectable with three digital inputs
Modulation parameters supported

FSK demodulation
2 kbps data rate

34.8 kHz frequency deviation

5.0 V supply voltage
Low power consumption

18.5 mA with receiver enabled
1 μA standby current

24-lead TSSOP

FUNCTIONAL BLOCK DIAGRAM

ADF7902

GENERAL DESCRIPTION

The ADF7902 is a low power UHF receiver. The device demodu­lates frequency shift keyed (FSK) signals with 34.8 kHz frequency
deviation and at data rates of up to 2 kbps. There are eight specific
RF channels ranging from 369.5 MHz to 395.9 MHz on which the
receiver can operate. Each channel is selectable by configuring
three digital control lines.

The ADF7902 is designed for low power applications, consuming

18.5

mA (typical) during normal operation and 1 μA (maximum)

in standby mode.

GND CE

FSK Receiver IC

ADF7902

LNA_1

LNA_2

VBAT1

CREG1

VBAT2

CREG2

LNA_RSET

LNA

LDO1

LDO2

BIAS

RSET

CVCO

VCOIN

VCO

IF FILTER

CP

CPOUT

Figure 1.

N DIVIDER

SELECT

PFD OSC

FSK

DEMODULATO R

OSC1

OSC2

Rx_DATA

CH1_SEL

CH2_SEL

CH3_SEL

CLKOUT

CLKOUT_ENB

06456-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.

ADF7902

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TABLE OF CONTENTS

Features.............................................................................................. 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

REVISION HISTORY

1/07—Revision 0: Initial Version

Typical Performance Characteristics..............................................6

Applications Information.................................................................7

Applications Circuits ....................................................................7

Test Modes..........................................................................................9

Outline Dimensions....................................................................... 10

Ordering Guide .......................................................................... 10

Rev. 0 | Page 2 of 12

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SPECIFICATIONS

VDD =5.0 V; GND = 0 V; TA = T

Table 1.

Parameter Min Typ Max Unit Test Conditions

CHANNEL FREQUENCIES

Channel 1 369.5 MHz
Channel 2 371.1 MHz
Channel 3 375.3 MHz
Channel 4 376.9 MHz
Channel 5 388.3 MHz
Channel 6 391.5 MHz
Channel 7 394.3 MHz
Channel 8 395.9 MHz

RECEIVER PARAMETERS

Data Rate 2 kbps
Frequency Deviation −34.8 kHz Data = 0

+34.8 kHz Data = 1

Input Sensitivity −110 dBm
LNA Input Impedance 128 − j125

CHANNEL FILTERING

IF Filter Bandwidth 200 kHz −3 dB bandwidth
Adjacent Channel Rejection 60 dB 1 MHz offset

PHASE-LOCKED LOOP

CE High to Receive Data 4 ms

REFERENCE INPUT

Crystal Reference 9.8304 MHz ±25 ppm frequency accuracy

INPUT LOGIC LEVELS

Input High Voltage, VIH 0.7 × VDD V
Input Low Voltage, VIL 0.2 × VDD V

OUTPUT LOGIC LEVELS

Output High Voltage, VOH 4.5 V
Output Low Voltage, VOL 0.4 V
Output Drive Level 2 mA

POWER SUPPLY

Voltage Supply

VDD 5 V

Current Consumption

Receiver Enabled 18.5 mA CE = 1
Low Power Sleep Mode 1 μA CE = 0

MIN

to T

, unless otherwise noted. Typical specifications TA = 25°C.

MAX



fRF = 388.3 MHz

Desired signal 3 dB above input sensitivity level,
with in

terferer power increased until BER = 10

−3

Rev. 0 | Page 3 of 12

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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 2.

Parameter Rating

VBAT to GND
Digital I/O Voltage to GND −0.3 V to VBAT + 0.3 V
LNA_1, LNA_2 0 dBm
Operating Temperature Range

Industrial (B Version) −40°C to +85°C
Storage Temperature Range −40°C to +125°C
Maximum Junction Temperature 125°C
TSSOP θJA Thermal Impedance 150.4°C/W
Lead Temperature, Soldering

Vapor Phase (60 sec) 235°C

Infrared (15 sec) 240°C

1

GND = GND1 = GND1B = GND2 = 0 V.

1

−0.3 V to +6.0 V

Stresses above those listed under Absolute Maximum Ratings
ma

y cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. 0 | Page 4 of 12