Analog Devices ADF7901 Datasheet
High Performance ISM Band
FEATURES
Single-chip low power UHF transmitter
369.5 MHz to 395.9 MHz frequency operation using
fractional-N PLL and fully-integrated VCO
3.0 V supply voltage
Data rates up to 50 kbps supported
Low current consumption
26 mA at 12 dBm output at 384 MHz
Power-down mode (< 1 µA)
24-lead TSSOP package
GENERAL DESCRIPTION
The ADF7901 is a low power OOK/FSK UHF transmitter
designed for use in RF remote control devices. This device
is capable of frequency shift keying (FSK) modulation on eight
FUNCTIONAL BLOCK DIAGRAM
OOK/FSK Transmitter IC
ADF7901
different channels, selectable by three external control lines.
OOK modulation is performed by modulating the PA control
line.
The on-chip VCO operates at 2× the output frequency. The
division by 2 at the output of the VCO reduces the amount of
PA feedthrough. As a result, OOK modulation depths of greater
than 50 dB are easily achievable.
The FSK_ADJ and ASK_ADJ resistors can be adjusted in the
system to optimize output power for each modulation scheme.
An additional 1.5 dB of output power is provided for the lower
bank of channels to adjust for antenna performance. The CE
line allows the transmitter to be powered down completely.
In this mode, the leakage current is typically 0.1 µA.
C
REG2
DV
TXDATA
OSC1
DD
OSC2
R = 1
FSK
CE D
GND
PDF
CHARGE
PUMP
÷ FRACTIONAL N
CHANNEL SELECT
FSK1
Σ-∆
FSK2 FSK3
OOK_SEL
VCO
RSET_FSK
PA_EN
PA
REGULATOR
REGULATOR
LDO
1
LDO
2
RSET_OOK
C
VCO
V
DD
RF
OUT
RF
GND
C
REG1
C
2
REG
R
SET
01975-001
Figure 1.
Rev. 0
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infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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Tel: 781.329.4700
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
www.analog.com
ADF7901
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 8
Circuit Description........................................................................... 9
Loop Filter..................................................................................... 9
REVISION HISTORY
3/05—Revision 0: Initial Version
Layout Guidelines ...................................................................... 10
Decoupling.............................................................................. 10
Regulator Stability.................................................................. 10
Grounding............................................................................... 10
Supply ...................................................................................... 10
Digital Lines............................................................................ 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
Rev. 0 | Page 2 of 12
ADF7901
SPECIFICATIONS
VDD =3.0 V; GND = 0 V; TA = T
Table 1.
Parameter1 Min Typ Max Unit Comments/Conditions
RF CHARACTERISTICS
Output Frequency Ranges
Channel 1 369.5 MHz
Channel 2 371.1 MHz
Channel 3 375.3 MHz
Channel 4 376.9 MHz
Channel 5 384.0 MHz
Channel 6 388.3 MHz
Channel 7 391.5 MHz
Channel 8 394.3 MHz
Channel 9 395.9 MHz
Phase Frequency Detector Frequency 9.8304 MHz
TRANSMISSION PARAMETERS
Transmit Rate
FSK 50 kbps
OOK 50 kbps
Frequency Shift Keying
FSK Separation
2
+34.8 kHz Data = 0
On/Off Keying
Modulation Depth
3
Output Power
Min/Max Range
f
≤ 384 MHz 10 12 dBm
OUT
f
> 384 MHz 7 10.5 dBm
OUT
4
Occupied 20 dB BW
OOK at 1 kbit/s ±28 ±461.9 kHz
FSK (PA Off/On) at10 Hz5 ±26 ±461.9 kHz
LOGIC INPUTS
V
, Input High Voltage 2.124 V
INH
V
, Input Low Voltage 0.2 × V
INL
I
, Input Current ±1 µA
INH/IINL
CIN, Input Capacitance 10 pF
POWER SUPPLIES
Voltage Supply
DV
DD
Transmit Current Consumption
369.5 MHz to 376.9 MHz at 12 dBm 26 mA
384 MHz at +12 dBm 26 mA
388.3 MHz to 395.9 MHz at 10.5 dBm 21 mA
384 MHz at 5 dBm 17 mA
Power-Down Mode
Low Power Sleep Mode6 0.2 1 µA
MIN
to T
, unless otherwise noted. Typical specifications, TA = 25°C.
MAX
−34.8 kHz Data = 1
83 dB Output power = 12 dBm
15 dBm
DD
3.0 V
V
Rev. 0 | Page 3 of 12
ADF7901
Parameter1 Min Typ Max Unit Comments/Conditions
PHASE-LOCKED LOOP
VCO Gain 30 MHz/V At 384 MHz
Spurious
Harmonics3
REFERENCE INPUT
Crystal Reference 9.8304 MHz
POWER AMPLIFIER
PA Output Impedance 97 Ω + 6.4 pF At 384 MHz
TIMING INFORMATION
Crystal Oscillator to PLL Lock3 2 3 ms
PA Enable to PA Ready–PLL Settle
TEMPERATURE RANGE (TA) 0 50 °C
1
Operating temperature range is as follows: 0°C to 50°C.
2
Frequency Deviation = 34 × (9.8304 MHz)/214. Error in the crystal is reflected in variation in the desired deviation.
3
Not production tested; based on characterization.
4
The output power can be varied in both ASK/FSK mode by altering the relevant external resistor.
5
Measured using spectrum analyzer, 1 MHz span, 100 kHz RBW, max hold enabled.
6
Maximum power-down current specification applies for the OSC2 pin grounded.
7
Measured > 461.9 kHz away from channel.
8
This specification refers to the time taken for the PLL to regain lock after the PA has been enabled. The PA is should only be enabled after the PLL has settled to the
correct frequency.
, 7
3
100 kHz loop BW
Integer Boundary –45 −23 dBc
Reference −70 −23 dBc
Second Harmonic VDD = 3.0 V −24 −21 dBc
Third Harmonic VDD = 3.0 V −14 −11 dBc
All Other Harmonics −18 dBc
8
100 250 µs
Rev. 0 | Page 4 of 12
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