Improved Second Source
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ADEL2020
TOP VIEW
V+
OUTPUT
BAL
BAL
–IN
+IN
V–
DISABLE
V+
OUTPUT
BAL
BAL
–IN
+IN
V–
DISABLE
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NC = NO CONNECT
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2
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ADEL2020
TOP VIEW
a
FEATURES
Ideal for Video Applications
0.02% Differential Gain
0.048 Differential Phase
0.1 dB Bandwidth to 25 MHz (G = +2)
High Speed
90 MHz Bandwidth (–3 dB)
500 V/ms Slew Rate
60 ns Settling Time to 0.1% (V
Low Noise
2.9 nV/√
Hz Input Voltage Noise
Low Power
6.8 mA Supply Current
2.1 mA Supply Current (Power-Down Mode)
High Performance Disable Function
Turn-Off Time of 100 ns
Input to Output Isolation of 54 dB (Off State)
PRODUCT DESCRIPTION
The ADEL2020 is an improved second source to the EL2020.
This op amp improves on all the key dynamic specifications
while offering lower power and lower cost. The ADEL2020 offers 50% more bandwidth and gain flatness of 0.1 dB to beyond
25 MHz. In addition, differential gain and phase are less than
0.05% and 0.05° while driving one back terminated cable (150 Ω).
The ADEL2020 offers other significant improvements. The
most important of these is lower power supply current, 33% less
= 10 V Step)
O
to the EL2020
ADEL2020
CONNECTION DIAGRAMS
8-Pin Plastic Mini-DIP (N) 20-Pin Small Outline Package
than the competition while offering higher output drive. Important specs like voltage noise and offset voltage are less than half
of those for the EL2020.
The ADEL2020 also features an improved disable feature. The
disable time (to high output impedance) is 100 ns with guaranteed break before make. Finally the ADEL2020 is offered in the
industrial temperature range of –40°C to +85°C in both plastic
DIP and SOIC package.
+0.1
0
–0.1
+0.1
0
NORMALIZED GAIN – dB
–0.1
100k
1M 100M10M
Ω
RL = 150
RL= 1k
FREQUENCY – Hz
±15V
±5V
±15V
±5V
Fine-Scale Gain (Normalized) vs. Frequency for Various
Supply Voltages. R
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
= 750 Ω, Gain = +2
F
0.10
0.09
0.08
0.07
0.06
0.05
0.04
DIFFERENTIAL GAIN – %
0.03
0.02
0.01
0
GAIN
6
5
SUPPLY VOLTAGE – ± Volts
GAIN = +2
Ω
= 750
R
F
Ω
= 150
R
L
= 3.58MHz
f
C
100 IRE
MODULATED RAMP
PHASE
Differential Gain and Phase vs. Supply Voltage
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
DIFFERENTIAL PHASE – Degrees
0.02
0
15
1413121110987
ADEL2020–SPECIFICATIONS
(@ TA = +258C and VS = 615 V dc, RL = 150 Ω unless otherwise noted)
ADEL2020A
Parameter Conditions Temperature Min Typ Max Units
INPUT OFFSET VOLTAGE 1.5 7.5 mV
T
MIN–TMAX
2.0 10.0 mV
Offset Voltage Drift 7 µV/°C
COMMON-MODE REJECTION V
V
OS
±Input Current T
POWER SUPPLY REJECTION V
V
OS
±Input Current T
INPUT BIAS CURRENT –Input T
= ±10 V
CM
= ±4.5 V to ±18 V
S
+Input T
T
MIN–TMAX
MIN–TMAX
T
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
50 64 dB
0.1 1.0 µA/V
65 72 dB
0.05 0.5 µA/V
0.5 7.5 µA
115µA
INPUT CHARACTERISTICS
+Input Resistance 1 10 MΩ
–Input Resistance 40 Ω
+Input Capacitance 2pF
OPEN-LOOP TRANSRESISTANCE V
OPEN-LOOP DC VOLTAGE GAIN R
OUTPUT VOLTAGE SWING R
= ±10 V
O
R
= 400 Ω T
L
= 400 Ω, V
L
R
= 100 Ω, V
L
= 400 Ω T
L
= ±10 V T
OUT
= ±2.5 V T
OUT
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
1 3.5 MΩ
80 100 dB
76 88 dB
±12.0 ±13.0 V
Short-Circuit Current 150 mA
Output Current T
MIN–TMAX
30 60 mA
POWER SUPPLY
Operating Range ±3.0 ±18 V
Quiescent Current T
Power-Down Current T
Disable Pin Current Disable Pin = 0 V T
Min Disable Pin Current to Disable T
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
6.8 10.0 mA
2.1 3.0 mA
290 400 µA
30 µA
DYNAMIC PERFORMANCE
3 dB Bandwidth G = +1; R
G = +2; R
G = +10; R
0.1 dB Bandwidth G = +2; R
Full Power Bandwidth V
Slew Rate R
= 20 V p-p,
O
R
= 400 Ω 8 MHz
L
= 400 Ω, G = +1 500 V/µs
L
= 820 90 MHz
FB
= 750 70 MHz
FB
= 680 30 MHz
FB
= 750 25 MHz
FB
Settling Time to 0.1% 10 V Step, G = –1 60 ns
Differential Gain f = 3.58 MHz 0.02 %
Differential Phase f = 3.58 MHz 0.04 Degree
INPUT VOLTAGE NOISE f = 1 kHz 2.9 nV/√Hz
INPUT CURRENT NOISE –I
, f = 1 kHz 13 pA/√Hz
IN
+I
, f = 1 kHz 1.5 pA√Hz
IN
OUTPUT RESISTANCE Open Loop (5 MHz) 15 Ω
Specifications subject to change without notice.
–2–
REV. A
ADEL2020
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation
2
. . . . . . . Observe Derating Curves
1
Output Short Circuit Duration . . . . Observe Derating Curves
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V
Storage Temperature Range
Plastic DIP and SOIC . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
8-Pin Plastic Package: θJA = 90°C/Watt
20-Pin SOIC Package: θJA = 150°C/Watt
ESD SUSCEPTIBILITY
ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without
detection. Although the ADEL2020 features ESD protection
circuitry, permanent damage may still occur on these devices if
they are subjected to high energy electrostatic discharges.
Therefore, proper ESD precautions are recommended to avoid
any performance degradation or loss of functionality.
+V
S
0.1µF
10kΩ
7
1
5
ADEL2020
323
4
6
0.1µF
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
ADEL2020 is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction
temperature is 145°C. If the maximum is exceeded momentarily, proper circuit operation will be restored as soon as the
die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device
burnout. To ensure proper operation, it is important to observe
the derating curves below.
While the ADEL2020 is internally short circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature is not exceeded under all conditions.
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
TOTAL POWER DISSIPATION – Watts
0.6
0.4
–40
8-PIN
MINI-DIP
0
–20
AMBIENT TEMPERATURE – °C
20-PIN SOIC
100
80604020
Maximum Power Dissipation vs. Temperature
REV. A
–V
S
Offset Null Configuration
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
ADEL2020AN –40°C to +85°C 8-Pin Plastic DIP N-8
ADEL2020AR-20 –40°C to +85°C 20-Pin Plastic SOIC R-20
ADEL2020AR-20-REEL –40°C to +85°C 20-Pin Plastic SOIC R-20
–3–
ADEL2020
0
–5
–1
–2
–3
–4
1
CLOSED-LOOP GAIN – dB
0
–45
–90
–135
–180
–225
–270
PHASE SHIFT – Degrees
GAIN = +1
R
L
= 1k
PHASE
GAIN
VS = ±15V
±5V
VS = ±15V
±5V
FREQUENCY – MHz
10 1001 1000
Ω
+V
1kΩ
7
S
0.1µF
V
IN
323
R
T
Figure 1. Connection Diagram for A
PHASE
1
0
–1
–2
–3
–4
CLOSED-LOOP GAIN – dB
–5
GAIN
VS = ±15V
1
±5V
10 100
FREQUENCY – MHz
GAIN = +1
R
= 150
L
VS = ±15V
±5V
0
Ω
–45
–90
–135
–180
–225
–270
1000
Figure 2. Closed-Loop Gain and Phase vs. Frequency,
G = + 1, R
= 150 Ω, RF = 1 kΩ for ±15 V, 910 Ω for ±5 V
L
ADEL2020
4
–V
S
PHASE SHIFT – Degrees
6
0.1µF
Figure 3. Closed-Loop Gain and Phase vs. Frequency,
G = +1, R
V
O
R
L
= +1
VCL
= 1 kΩ, RF = 1 kΩ for ±15 V, 910 Ω for ±5 V
L
110
G = +1
100
90
80
70
60
50
40
–3dB BANDWIDTH – MHz
30
20
= 150
R
L
V
= 250mV p-p
O
2
Ω
RF = 750
Ω
RF = 1k
RF = 1.5k
SUPPLY VOLTAGE – ±Volts
Ω
Ω
PEAKING 1dB
PEAKING 0.1dB
≤
≤
1816141210864
Figure 4. –3 dB Bandwidth vs. Supply Voltage,
Gain = +1, R
= 150
L
Ω
–4–
REV. A
681Ω
+V
ADEL2020
S
0.1µF
681Ω
V
IN
ADEL2020
323
Figure 5. Connection Diagram for A
180
135
90
45
0
–45
PHASE SHIFT – Degrees
PHASE
1
0
–1
–2
–3
–4
CLOSED-LOOP GAIN – dB
–5
GAIN
VS = ±15V
GAIN = –1
= 150Ω
R
L
VS = ±15V
±5V
±5V
10 1001 1000
FREQUENCY – MHz
Figure 6. Closed-Loop Gain and Phase vs. Frequency,
G = –1, R
±
5 V
= 150 Ω, RF = 680 Ω for ±15 V, 620 Ω for
L
–V
7
6
4
0.1µF
S
1
0
–1
–2
–3
–4
CLOSED-LOOP GAIN – dB
–5
VCL
PHASE
GAIN
V
O
R
L
= –1
GAIN = –1
R
VS = ±15V
VS = ±15V
±5V
10 1001 1000
FREQUENCY – MHz
L
±5V
= 1kΩ
Figure 7. Closed-Loop Gain and Phase vs. Frequency,
G = –1, R
= 1 kΩ, RF = 680 Ω for VS = ±15 V, 620
L
for ±5 V
180
135
90
45
0
PHASE SHIFT – Degrees
–45
Ω
G = –1
100
R
= 150
Ω
L
90
80
70
60
50
40
–3dB BANDWIDTH – MHz
30
20
= 250mV p-p
V
O
2
PEAKING 1.0dB
Ω
RF = 499
RF = 681
Ω
Ω
RF = 1k
SUPPLY VOLTAGE – ± Volts
≤
PEAKING 0.1dB
≤
1816141210864
Figure 8. –3 dB Bandwidth vs. Supply Voltage,
Gain = –1, R
= 150
L
Ω
REV. A
–5–
ADEL2020
750Ω
+V
S
0.1µF
750Ω
ADEL2020
V
IN
323
R
T
Figure 9. Connection Diagram for A
1000
0
–45
–90
–135
–180
–225
PHASE SHIFT – Degrees
–270
PHASE
7
6
5
4
3
2
CLOSED-LOOP GAIN – dB
1
1
GAIN
VS = ±15V
±5V
10 100
FREQUENCY – MHz
GAIN = +2
= 150Ω
R
L
VS = ±15V
±5V
Figure 10. Closed-Loop Gain and Phase vs. Frequency,
G = +2, R
= 150 Ω, RF = 750 Ω for ±15 V, 715 Ω for ±5 V
L
7
4
0.1µF
–V
S
7
6
5
4
3
2
CLOSED-LOOP GAIN – dB
1
6
VCL
PHASE
GAIN
1
V
O
R
L
= +2
VS = ±15V
10 100
FREQUENCY – MHz
±5V
GAIN = +2
R
= 1k
L
VS = ±15V
±5V
Ω
Figure 11. Closed-Loop Gain and Phase vs. Frequency,
G = +2, R
= 1 kΩ, RF = 750 Ω for ±15 V, 715 Ω for ±5 V
L
1000
0
–45
–90
–135
–180
–225
PHASE SHIFT – Degrees
–270
110
G = +2
100
90
80
70
60
50
40
–3dB BANDWIDTH – MHz
30
20
Ω
R
= 150
L
VO = 250mV p-p
2
PEAKING 1.0dB
Ω
RF = 500
PEAKING 0.1dB
Ω
RF = 750
Ω
RF = 1k
SUPPLY VOLTAGE – ±Volts
≤
≤
1816141210864
Figure 12. –3 dB Bandwidth vs. Supply Voltage,
= 150
Gain = +2, R
L
Ω
–6–
REV. A
270Ω
20
15
19
18
17
16
21
CLOSED-LOOP GAIN – dB
0
–45
–90
–135
–180
–225
–270
PHASE SHIFT – Degrees
FREQUENCY – MHz
10 100
1
1000
GAIN = +10
R
F
= 270
RL = 1k
PHASE
GAIN
VS = ±15V
±5V
VS = ±15V
±5V
Ω
Ω
+V
ADEL2020
S
0.1µF
30Ω
V
IN
323
R
T
Figure 13. Connection Diagram for A
0
Ω
–45
Ω
–90
–135
–180
–225
PHASE SHIFT – Degrees
–270
1000
PHASE
21
20
19
18
17
16
CLOSED-LOOP GAIN – dB
15
GAIN
1
VS = ±15V
±5V
10 100
FREQUENCY – MHz
GAIN = +10
R
= 270
F
R
= 150
L
VS = ±15V
±5V
Figure 14. Closed-Loop Gain and Phase vs. Frequency,
G = +10, R
= 150 k
L
Ω
7
ADEL2020
4
–V
S
R
L
= +10
V
O
6
0.1µF
VCL
Figure 15. Closed-Loop Gain and Phase vs. Frequency,
= 1 k
G = +10, R
Ω
L
REV. A
100
G = +10
R
= 150
Ω
L
90
VO = 250mV p-p
80
70
60
50
40
–3dB BANDWIDTH – MHz
30
20
2
Figure 16. –3 dB Bandwidth vs. Supply Voltage,
Gain = +10, R
RF = 232
Ω
RF = 442
Ω
RF = 1k
Ω
SUPPLY VOLTAGE – ±Volts
= 150
L
Ω
PEAKING 0.5dB
≤
PEAKING 0.1dB
≤
1816141210864
–7–
ADEL2020
10
4
140
7
5
–40
6
–60
9
8
120806040 100200
–20
SUPPLY CURRENT – mA
JUNCTION TEMPERATURE – °C
VS = ±15V
VS = ±5V
1200
200
2
400
800
600
1000
181614121086
4
SLEW RATE – V/µs
SUPPLY VOLTAGE – ±Volts
RL = 400
GAIN = –10
GAIN = +10
GAIN = +2
Ω
30
25
20
OUTPUT LEVEL FOR 3% THD
15
10
OUTPUT VOLTAGE – Volts p-p
5
0
100k 1M 100M10M
VS = ±15V
VS = ±5V
FREQUENCY – Hz
Figure 17. Maximum Undistorted Output Voltage vs.
Frequency
80
RF = 715
70
60
50
40
VS = ±15V
VS = ±5V
Ω
= +2
A
V
10.0
GAIN = 2
Ω
R
= 715
CLOSED-LOOP OUTPUT RESISTANCE – Ω
0.01
1.0
0.1
10k
F
100k
VS = ±5V
FREQUENCY – Hz
VS = ±15V
100M10M1M
Figure 20. Closed-Loop Output Resistance vs. Frequency
POWER SUPPLY REJECTION – dB
Figure 18. Power Supply Rejection vs. Frequency
100
Hz
10
VOLTAGE NOISE – nV/
1
10
Figure 19. Input Voltage and Current Noise vs. Frequency
30
CURVES ARE FOR WORST CASE
20
CONDITION WHERE ONE SUPPLY
IS VARIED WHILE THE OTHER IS
10
HELD CONSTANT
10k
VS = ±5V TO ±15V
100k
100
FREQUENCY – Hz
FREQUENCY – Hz
INVERTING INPUT
CURRENT
VOLTAGE NOISE
NONINVERTING
INPUT CURRENT
1k
10k
100M10M1M
100
10
CURRENT NOISE – pA/ Hz
1
100k
Figure 21. Supply Current vs. Junction Temperature
Figure 22. Slew Rate vs. Supply Voltage
–8–
REV. A
ADEL2020
GENERAL DESIGN CONSIDERATIONS
The ADEL2020 is a current feedback amplifier optimized for
use in high performance video and data acquisition systems.
Since it uses a current feedback architecture, its closed-loop
bandwidth depends on the value of the feedback resistor. The
–3 dB bandwidth is also somewhat dependent on the power
supply voltage. Lowering the supplies increases the values of internal capacitances, reducing the bandwidth. To compensate for
this, smaller values of feedback resistor are used at lower supply
voltages.
POWER SUPPLY BYPASSING
Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in
the power supply leads can contribute to resonant circuits that
produce peaking in the amplifier’s response. In addition, if large
current transients must be delivered to the load, then bypass capacitors (typically greater than 1 µF) will be required to provide
the best settling time and lowest distortion. Although the recommended 0.1 µF power supply bypass capacitors will be suffi-
cient in most applications, more elaborate bypassing (such as
using two paralleled capacitors) may be required in some cases.
CAPACITIVE LOADS
When used with the appropriate feedback resistor, the ADEL2020
can drive capacitive loads exceeding 1000 pF directly without
oscillation. Another method of compensating for large load capacitance is to insert a resistor in series with the loop output. In
most cases, less than 50 Ω is all that is needed to achieve an
extremely flat gain response.
In cases where the amplifier is driving a high impedance load,
the input to output isolation will decrease significantly if the input signal is greater than about 1.2 V peak to peak. The isolation can be restored to the 50 dB level by adding a dummy load
(say 150 Ω) at the amplifier output. This will attenuate the
feedthrough signal. (This is not an issue for multiplexer applications where the outputs of multiple ADEL2020s are tied together as long as at least one channel is in the ON state.) The
input impedance of the disable pin is about 35 kΩ in parallel
with a few pF. When grounded, about 50 µA flows out of the
disable pin for ±5 V supplies.
Break before make operation is guaranteed by design. If driven
by standard CMOS logic, the disable time (until the output is
high impedance), is about 100 ns and the enable time (to low
impedance output) is about 160 ns. Since it has an internal pullup resistor of about 35 kΩ, the ADEL2020 can be used with
open drain logic as well. In this case, the enable time is increased to about 1 µs.
If there is a nonzero voltage present on the amplifier’s output
at the time it is switched to the disabled state, some additional
decay time will be required for the output voltage to relax to
zero. The total time for the output to go to zero will generally
be about 250 ns and is somewhat dependent on the load
impedance.
OFFSET NULLING
A 10 kΩ pot connected between Pins 1 and 5, with its wiper
connected to V+, can be used to trim out the inverting input
current (with about ±20 µA of range). For closed-loop gains
above about 5, this may not be sufficient to trim the output offset voltage to zero. Tie the pot’s wiper to ground through a
large value resistor (50 kΩ for ±5 V supplies, 150 kΩ for ± 15 V
supplies) to trim the output to zero at high closed-loop gains.
OPERATION AS A VIDEO LINE DRIVER
The ADEL2020 is designed to offer outstanding performance at
closed-loop gains of one or greater. At a gain of 2, the ADEL2020
makes an excellent video line driver. The low differential gain
and phase errors and wide –0.1 dB bandwidth are nearly independent of supply voltage and load. For applications requiring
widest 0.1 dB bandwidth, it is recommended to use 715 Ω feedback and gain resistors. This will result in about 0.05 dB of
peaking and a –0.1 dB bandwidth of 30 MHz on ±15 V supplies.
DISABLE MODE
By pulling the voltage on Pin 8 to common (0 V), the ADEL2020
can be put into a disabled state. In this condition, the supply
current drops to less than 2.8 mA, the output becomes a high
impedance, and there is a high level of isolation from input to
output. In the case of a line driver for example, the output impedance will be about the same as for a 1.5 kΩ resistor (the
feedback plus gain resistors) in parallel with a 13 pF capacitor
(due to the output) and the input to output isolation will be better than 50 dB at 10 MHz.
Leaving the disable pin disconnected (floating) will leave the
part in the enabled state.
REV. A
–9–
ADEL2020
OPERATIONAL AMPLIFIERS
HIGH SPEED
Slew Rate ≥ 100 V/µs
BUFFERS
AD9630
BUF-03
Ultralow
Distortion
AD9620
FET INPUT
AD845
OP44
Fast
AD843
LOW NOISE
(< 10 nV/√Hz)
AD810
AD811
AD829
AD844
OP64
OP467 (Quad)
VIDEO
AD810
AD811
AD817
AD818
AD829
AD830
OP160
ADEL2020
LOW POWER (I
High Slew Rate
( ≥ 1000 V/µs)
AD810
AD844
General Purpose
AD817
AD818
AD847
AD848
Precision
AD846
Low Voltage Noise
AD810
AD829
OP64
OP467 (Quad)
FET Input
OP44
SUPPLY
< 10 mA)
OP160
OP260 (Dual)
AD849
AD827 (Dual)
OP467 (Quad)
ADEL2020
HIGH SLEW RATE ( ≥ 1000 V/µs)
AD810
AD811
AD844
AD9617
AD9618
OP160
OP260 (Dual)
ADEL2020
SPECIFIED 0.01% SETTLING
AD811
AD817
AD818
AD840
AD841
AD842
AD843
AD845
AD846
AD847
OP467 (Quad)
DIFFERENCE AMPLIFIER
AD830
DISABLE FEATURE
AD810
OP64
OP160
ADEL2020
–10–
REV. A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Plastic Mini-DIP (N) Package
ADEL2020
0.300 (7.60)
0.292 (7.40)
PIN 1
0.011 (0.28)
0.004 (0.10)
PIN 1
0.165 ±0.01
(4.19 ±0.25)
0.125
(3.18)
MIN
0.018 ±0.003
(0.46 ±0.08)
8
1
0.39 (9.91) MAX
0.10
(2.54)
BSC
4
0.033
(0.84)
NOM
5
0.25
(6.35)
(7.87)
0.035 ±0.01
(0.89 ±0.25)
0.18 ±0.03
(4.57 ±0.76)
SEATING
PLANE
0.31
20-Lead Wide Body SOIC (R) Package
20
1
0.512 (13.00)
0.496 (12.60)
BSC
0.450 (11.43)
0.019 (0.48)
0.014 (0.36)
0.050 (1.27)
11
10
0.419 (10.65)
0.394 (10.00)
0.104 (2.64)
0.093 (2.36)
0.30 (7.62)
0.011 ±0.003
(0.28 ±0.08)
15
0.020 (0.51) x 45
0.010
(0.254)
0
REF
°
°
8
°
0
°
CHAMF
°
0.050 (1.27)
0.016 (0.40)
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.
REV. A
–11–
C1727–24–10/92
PRINTED IN U.S.A.
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