Analog Devices ADE7760 Datasheet

Energy Metering IC with

FEATURES

High accuracy active energy measurement IC, supports

IEC 687/61036 Less than 0.1% error over a dynamic range of 500 to 1 Supplies active power on the frequency outputs F1 and F2 High frequency output CF is intended for calibration and

supplies instantaneous active power Continuous monitoring of the phase and neutral current

allows fault detection in 2-wire distribution systems Current channels input level best suited for current

transformer sensors Uses the larger of the two currents (phase or neutral) to

bill—even during a fault condition Two logic outputs (FAULT and REVP) can be used to indicate

a potential miswiring or fault condition Direct drive for electromechanical counters and 2-phase

stepper motors (F1 and F2) Proprietary ADCs and DSP provide high accuracy over large

variations in environmental conditions and time Reference 2.5 V ± 8% (drift 30 ppm/°C typical) with external

overdrive capability Single 5 V supply, low power

On-Chip Fault Detection

ADE7760

GENERAL DESCRIPTION

The ADE7760 is a high accuracy, fault tolerant, electrical energy measurement IC intended for use with 2-wire distribution systems. The part specifications surpass the accuracy requirements as quoted in the IEC61036 standard.

The only analog circuitry used on the ADE7760 is in the ADCs and reference circuit. All other signal processing (such as multiplication and filtering) is carried out in the digital domain. This approach provides superior stability and accuracy over extremes in environmental conditions and over time.

The ADE7760 incorporates a fault detection scheme similar to the ADE7751 by continuously monitoring both the phase and neutral currents. A fault is indicated when these currents differ by more than 6.25%.

The ADE7760 supplies average active power information on the low frequency outputs F1 and F2. The CF logic output gives instantaneous active power information.

The ADE7760 includes a power supply monitoring circuit on

supply pin. Internal phase-matching circuitry ensures

the V

that the voltage and current channels are matched. An internal no-load threshold ensures that the ADE7760 does not exhibit any creep when there is no load.

FUNCTIONAL BLOCK DIAGRAM

AGND

4kΩ

2.5V

REFERENCE

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

FAULT

158

ADC

A>B

ADC

B>A

ADC

OSCILLATOR

9 14 17 10 11 12

IN/OUT

HPF

A<>B

INTERNAL

DD 1

POWER

SUPPLY MONITOR

DIGITAL-TO-FREQUENCY CONVERTER

Figure 1.

ADE7760

SIGNAL PROCESSING BLOCK

LPF

16 18 19 20

F1F2CFREVPS0S1SCFDGNDRCLKINREF

www.analog.com

04434-0-001

ADE7760

TABLE OF CONTENTS

Specifications..................................................................................... 3

Active Power Calculation ..........................................................13

Timing Characteristics..................................................................... 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Te r m in o l o g y ...................................................................................... 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics........................................... 10

Operation.........................................................................................11

Power Supply Monitor ............................................................... 11

Analog Inputs.............................................................................. 11

Internal Oscillator...................................................................... 12

Analog-to-Digital Conversion.................................................. 12

REVISION HISTORY

Revision 0: Initial Version

Digital-to-Frequency Conversion............................................ 15

Transfer Fu nction ....................................................................... 16

Fault Detection ........................................................................... 17

Applications..................................................................................... 19

Interfacing to a Microcontroller for Energy Measurement.. 19

Selecting a Frequency for an Energy Meter Application....... 19

Negative Power Information..................................................... 20

Outline Dimensions....................................................................... 21

Ordering Guide .......................................................................... 21

Rev. 0 | Page 2 of 24

ADE7760

SPECIFICATIONS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, T

Table 1.

Parameter Value Unit Test Conditions/Comments

ACCURACY

Measurement Error

0.1 % of reading, typ Over a dynamic range of 500 to 1

Phase Error between Channels

(PF = 0.8 Capacitive) ±0.05 Degrees, max Phase lead 37°

(PF = 0.5 Inductive) ±0.05 Degrees, max Phase lag 60° AC Power Supply Rejection2 Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms DC Power Supply Rejection2 Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms

FAULT DETECTION

2, 3

See the Fault Detection section

Fault Detection Threshold

Inactive Input <> Active Input 6.25 %, typ (V1A or V1B active) Input Swap Threshold

Inactive Input <> Active Input 6.25 % of larger, typ (V1A or V1B active) Accuracy Fault Mode Operation

V1A Active, V1B = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1

V1B Active, V1A = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1 Fault Detection Delay 3 Seconds, typ Swap Delay 3 Seconds, typ

ANALOG INPUTS V1A – V1N, V1B – V1N, V2P – V

Maximum Signal Levels ±660 mV peak, max Differential input Input Impedance (DC) 400 kΩ, min Bandwidth (–3 dB) 7 kHz, typ ADC Offset Error2 10 mV, max Uncalibrated error, see the Terminology section for details Gain Error ±4 %, typ External 2.5 V reference

REFERENCE INPUT

REF

Input Voltage Range 2.7 V, max 2.5 V + 8%

IN/OUT

2.3 V, min 2.5 V – 8% Input Impedance 4 kΩ, min Input Capacitance 10 pF, max

ON-CHIP REFERENCE

Reference Error ±200 mV, max Temperature Coefficient 30 ppm/°C, typ Current Source 20 µA, min

ON-CHIP OSCILLATOR

Oscillator Frequency 450 kHz Oscillator Frequency Tolerance ±12 % of reading, typ Temperature Coefficient 30 ppm/°C, typ

LOGIC INPUTS

SCF, S1, and S0

Input High Voltage, V

Input Low Voltage, V

Input Current, I

Input Capacitance, C

INH

INL

2.4 V, min VDD = 5 V ± 5%

0.8 V, max VDD = 5 V ± 5% ±3 µA, max Typical 10 nA, VIN = 0 V to V 10 pF, max

MIN

to T

= –40°C to +85°C.

MAX

Rev. 0 | Page 3 of 24

ADE7760

Parameter Value Unit Test Conditions/Comments

LOGIC OUTPUTS4

CF, REVP, and FAULT

Output High Voltage, V Output Low Voltage, V

F1 and F2

Output High Voltage, V Output Low Voltage, V

POWER SUPPLY For specified performance

5.25 V, max 5 V + 5% V

See plots in the Ty section. pical Performance Characteristics

See the section for explanation of specifications. Terminology

See the section for explanation of fault detection functionality. Fault Detection

Sample tested during initial release and after any redesign or process change that may affect this parameter.

4 V, min VDD = 5 V ± 5% 1 V, max VDD = 5 V ± 5%

4 V, min VDD = 5 V ± 5%, I 1 V, max VDD = 5 V ± 5%, I

4.75 V, min 5 V – 5%

4 mA, max

= 10 mA

source

= 10 mA

sink

Rev. 0 | Page 4 of 24

ADE7760

TIMING CHARACTERISTICS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, T Sample tested during initial release and after any redesign or process change that may affect this parameter. See Figure 2.

Table 2.

Parameter Value Unit Test Conditions/Comments

120 ms F1 and F2 Pulse Width (Logic High). See Table 6 s Output Pulse Period. See the Transfer Function section. 1/2 t

s Time between F1 Falling Edge and F2 Falling Edge. 90 ms CF Pulse Width (Logic High). See Table 7 s CF Pulse Period. See the Transfer Function section. CLKIN/4 s Minimum Time between F1 and F2 Pulse.

The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Transfer Function section.

Figure 2. Timing Diagram for Frequency Outputs

MIN

to T

= –40°C to +85°C.

MAX

04434-0-002

Rev. 0 | Page 5 of 24

ADE7760

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Rating

VDD to AGND –0.3 V to +7 V Analog Input Voltage to AGND

, V

1AP

, V1N, V2N, V

1BP

V Reference Input Voltage to AGND –0.3 V to VDD + 0.3 V Digital Input Voltage to DGND –0.3 V to VDD + 0.3 V Digital Output Voltage to DGND –0.3 V to VDD + 0.3 V Operating Temperature Range

Industrial Storage Temperature Range –65°C to +150°C Junction Temperature 150°C 20-Lead SSOP, Power Dissipation 450 mW θJA Thermal Impedance 112°C/W Lead Temperature, Soldering

Vapor Phase (60 s) 215°C

Infrared (15 s) 220°C

–6 V to +6 V

–40°C to +85°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. 0 | Page 6 of 24

ADE7760

TERMINOLOGY

Measurement Error

The error associated with the energy measurement made by the ADE7760 is defined by the following formula:

Percentage

⎛ ⎜ ⎜ ⎝

Phase Error between Channels

The high-pass filter (HPF) in the current channel has a phase lead response. To offset this phase response and equalize the phase response between channels, a phase correction network is also placed in the current channel. The phase correction network ensures a phase match between the current channels and voltage channels to within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2° over a range 40 Hz to 1 kHz.

Power Supply Rejection

This quantifies the ADE7760 measurement error as a percentage of reading when the power supplies are varied. For the ac PSR measurement, a reading at nominal supplies (5 V) is taken. A second reading is obtained with the same input signal levels when an ac (175 mV rms/100 Hz) signal is introduced onto the supplies. Any error introduced by this ac signal is expressed as a percentage of reading (see the Measurement Error definition above).

Erro

−

7760

EnergyTrue

EnergyTrueADEbyregisteredEnergy

⎞ ⎟

%100

⎟ ⎠

For the dc PSR measurement, a reading at nominal supplies (5 V) is taken. A second reading is obtained with the same input signal levels when the power supplies are varied ±5%. Any error introduced is again expressed as a percentage of reading.

ADC Offset Error

This refers to the dc offset associated with the analog inputs to the ADCs. It means that with the analog inputs connected to AGND the ADCs still see a dc analog input signal. The magnitude of the offset depends on the input range selection (see the Typical Performance Characteristics section). However, when HPFs are switched on, the offset is removed from the current channels and the power calculation is not affected by this offset.

Gain Error

The gain error in the ADE7760 ADCs is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the transfer function (see the Transfer Function section).

Rev. 0 | Page 7 of 24

ADE7760

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADE7760

TOP VIEW

(Not to Scale)

AGND

REF

IN/OUT

SCF

NC = NO CONNECT

Figure 3. Pin Configuration (SSOP)

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 V

Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7760. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 µF capacitor in parallel with a ceramic 100 nF capacitor.

2, 3 V1A, V

Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with maximum differential input signal levels of ±660 mV with respect to V maximum signal level at these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage.

4 V

Negative Input Pin for Differential Voltage Inputs V1A and V1B. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage. The input should be directly connected to the burden resistor and held at a fixed potential, that is, AGND. See the Analog Inputs section.

5 V

Negative Input Pin for Differential Voltage Input V2P. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage. The input should be held at a fixed potential, that is, AGND. See the Analog Inputs section.

6 V

Analog Inputs for Channel 2 (Voltage Channel). This input is fully differential voltage input with maximum differential input signal levels of ±660 mV with respect to V maximum signal level at these pins is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent

damage. 7 NC Not Connected. Nothing should be connected to this pin. 8 AGND

This pin provides the ground reference for the analog circuitry in the ADE7760, that is, ADCs and

reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the

ground reference for all analog circuitry such as antialiasing filters, and current and voltage transducers.

For good noise suppression, the analog ground plane should be connected only to the digital ground

plane at the DGND pin. 9 REF

IN/OUT

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of

2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source can also be

connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic

capacitor and 100 nF ceramic capacitor. 10 SCF

Select Calibration Frequency. This logic input is used to select the frequency on the calibration output

CF. Table 6 shows how the calibration frequencies are selected. 11, 12 S1, S0

These logic inputs are used to select one of four possible frequencies for the digital-to-frequency

conversion. This offers the designer greater flexibility when designing the energy meter. See the

Selecting a Frequency for an Energy Meter Application section. 13 INT This pin is internally used and should be connected to DGND. 14 RCLKIN

To enable the internal oscillator as a clock source on the chip, a precise low temperature drift resistor at

nominal value of 6.2 kΩ must be connected from this pin to DGND.

20 19 18 17 16 15 14 13 12 11

F1 F2 CF DGND REVP FAULT RCLKIN INT S0 S1

04434-0-003

for specified operation. The

Rev. 0 | Page 8 of 24

+ 16 hidden pages