Analog Devices ADE7757A pre Datasheet

Energy Metering IC with Integrated

Oscillator and Reverse Polarity Indication

Preliminary Technical Data

FEATURES

On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies

instantaneous real power

Logic output REVP indicates potential miswiring or negative

power

Direct drive for electromechanical counters and 2-phase

stepper motors (F1 and F2)

Proprietary ADCs and DSP provide high accuracy over large

variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external

overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
AC input only

GENERAL DESCRIPTION

The ADE7757A1 is a high accuracy, electrical energy metering
IC. It is a pin reduction version of the ADE7755, enhanced with
a precise oscillator circuit that serves as a clock source to the
chip. The ADE7757A eliminates the cost of an external crystal
or resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor and
operates only with ac input.

1

U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.

ADE7757A

The ADE7757A specifications surpass the accuracy require­ments as quoted in the IEC62053-21 standard. The AN-679

Application Note can be used as a basis for a description of an

IEC 61036 (equivalent to IEC62053-21) low cost, watt-hour
meter reference design.

The only analog circuitry used in the ADE7757A is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.

The ADE7757A supplies average real power information on the
low frequency outputs F1 and F2. These outputs may be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.

The ADE7757A includes a power supply monitoring circuit on

supply pin. The ADE7757A remains inactive until the

the V

DD

supply voltage on V
falls below 4 V, the ADE7757A also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.

Internal phase matching circuitry ensures that the voltage and
current channels are phase matched while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7757A does not exhibit creep
when no load is present.

The part is available in a 16-lead, narrow-body, SOIC package.

reaches approximately 4 V. If the supply

DD

FUNCTIONAL BLOCK DIAGRAM

V

AGND

DD

1 6 13

POWER

SUPPLY MONITOR

2

V2P

+

3

V2N

4

V1N

5

+

V1P

2.5V

REFERENCE

Rev. PrE

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Anal og Devices. Trademarks and
registered trademarks are the property of their respective owners.

...110101...

Σ-∆

ADC

...11011001...

Σ-∆

ADC

INTERNAL

4kΩ

REF

OSCILLATOR

7 11 8 10 12 14 16 159

RCLKIN

IN/OUT

PHASE

CORRECTION

Figure 1.

DGND

ADE7757A

SIGNAL

PROCESSING

BLOCK

MULTIPLIER

LPF

Φ

HPF

DIGITAL-TO-FREQUENCY

CONVERTER

REVP

CF

S0

SCF

S1

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

F1

05330-001

F2

ADE7757A Preliminary Technical Data

TABLE OF CONTENTS

Specifications..................................................................................... 3

Digital-to-Frequency Conversion............................................ 14

Timing Characteristics ................................................................ 4

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Terminology ...................................................................................... 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics............................................. 8

Theory of Operation ......................................................................10

Power Factor Considerations.................................................... 10

Nonsinusoidal Voltage and Current ........................................ 11

Analog Inputs.................................................................................. 12

Channel V1 (Current Channel)................................................ 12

Channel V2 (Voltage Channel) ................................................ 12

Typical Connection Diagrams.................................................. 12

Power Supply Monitor ...................................................................13

HPF and Offset Effects .............................................................. 13

Connecting to a Microcontroller for Energy Measurement. 15

Power Measurement Considerations....................................... 15

Internal Oscillator (OSC).............................................................. 16

Transfer Function........................................................................... 17

Frequency Outputs F1 and F2.................................................. 17

Example ....................................................................................... 17

Frequency Output CF................................................................ 17

Selecting a Frequency for an Energy Meter Application........... 18

Frequency Outputs..................................................................... 18

No-Load Threshold........................................................................ 19

Negative Power Information..................................................... 19

Evaluation Board and Reference Design Board......................... 20

Outline Dimensions....................................................................... 21

Ordering Guide .......................................................................... 21

REVISION HISTORY

2/05—Preliminary Version

Rev. PrE | Page 2 of 24

Preliminary Technical Data ADE7757A

SPECIFICATIONS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
otherwise noted.

Table 1.

Parameter Value Unit Test Conditions/Comments

ACCURACY

Measurement Error1 on Channel V1 0.1 % reading typ

1, 2

Channel V2 with full-scale signal (±165 mV), 25°C over a
dynamic range 500 to 1, line frequency = 45 Hz to 65 Hz

Phase Error1 Between Channels

V1 Phase Lead 37° (PF = 0.8 Capacitive) ±0.1 Degrees (°) max
V1 Phase Lag 60° (PF = 0.5 Inductive) ±0.1 Degrees (°) max

AC Power Supply Rejection1

Output Frequency Variation (CF) 0.2 % reading typ

S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms @ 50
Hz, ripple on V

DD

DC Power Supply Rejection1

Output Frequency Variation (CF) ±0.3 % Reading typ

S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms,
VDD = 5 V ± 250 mV

ANALOG INPUTS See the Analog Inputs section

Channel V1 Maximum Signal Level ±30 mV max V1P and V1N to AGND
Channel V2 Maximum Signal Level ±165 mV max V2P and V2N to AGND
Input Impedance (DC) 320

kΩ min

OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
Bandwidth (–3 dB) 7 kHz nominal OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
ADC Offset Error

1, 2

±18 mV max

See the Terminology and Typical Performance

Characteristics sections
Gain Error1 ±4 % ideal typ

External 2.5 V reference, V1 = 21.2 mV rms,

V2 = 116.7 mV rms

OSCILLATOR FREQUENCY (OSC) 450 kHz nominal RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C

Oscillator Frequency Tolerance1 ±12 % reading typ
Oscillator Frequency Stability1 ±30 ppm/°C typ

REFERENCE INPUT

REF

Input Voltage Range 2.65 V max 2.45 V nominal

IN/OUT

2.25 V min 2.45 V nominal
Input Capacitance 10 pF max

ON-CHIP REFERENCE 2.45 V nominal

Reference Error ±200 mV max
Temperature Coefficient ±20 ppm/°C typ

LOGIC INPUTS3

SCF, S0, S1

Input High Voltage, V
Input Low Voltage, V

2.4 V min VDD = 5 V ± 5%

INH

0.8 V max VDD = 5 V ± 5%

INL

Input Current, IIN ±1 µA max Typically 10 nA, VIN = 0 V to VDD
Input Capacitance, CIN 10 pF max

LOGIC OUTPUTS3

F1 and F2

Output High Voltage, VOH 4.5 V min I

= 10 mA, VDD = 5 V, I

SOURCE

Output Low Voltage, VOL 0.5 V max

CF

Output High Voltage, VOH 4 V min I

= 5 mA, VDD = 5 V, I

SOURCE

Output Low Voltage, VOL 0.5 V max

Frequency Output Error

1, 2

(CF) ±10 % ideal typ

External 2.5 V reference, V1 = 21.2 mV rms,

V2 = 116.7 mV rms

MIN

to T

= −40°C to +85°C, unless

MAX

of 200 mV rms @ 100 Hz

= 10 mA, VDD = 5 V

SINK

= 5 mA, VDD = 5 V

SINK

Rev. PrE | Page 3 of 24

ADE7757A Preliminary Technical Data

Parameter Value Unit Test Conditions/Comments

POWER SUPPLY For specified performance

VDD 4.75 V min 5 V – 5%

5.25 V max 5 V + 5%
IDD 5 mA max Typically 4 mA

1

See the Terminology section for an explanation of specifications.

2

See plots in the Typical Performance Characteristics section.

3

Sample tested during initial release and after any redesign or process change that may affect this parameter.

TIMING CHARACTERISTICS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
otherwise noted.

Sample tested during initial release and after any redesign or process change that may affect this parameter. See Figure 2.

Table 2.

Parameter Specifications Unit Test Conditions/Comments

1

t

120 ms F1 and F2 pulse width (logic low).

1

t2 See Table 6 sec Output pulse period. See the Transfer Function section.
t3 1/2 t2 sec Time between F1 falling edge and F2 falling edge.

1, 2

t

90 ms CF pulse width (logic high).

4

t5 See Table 7 sec CF pulse period. See the Transfer Function section.
t6 2 µs Minimum time between F1 and F2 pulses.

1

The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.

2

The CF pulse is always 35 µs in high frequency mode. See the Frequency Outputs section and Table 7.

to T

MIN

= –40°C to +85°C, unless

MAX

t

1

F1

t

6

t

2

F2

CF

t

3

t

4

t

5

05330-002

Figure 2. Timing Diagram for Frequency Outputs

Rev. PrE | Page 4 of 24

Preliminary Technical Data ADE7757A

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Values

VDD to AGND

VDD to DGND –0.3 V to +7 V
Analog Input Voltage to AGND

V1P, V1N, V2P, and V2N –6 V to +6 V

Reference Input Voltage to AGND –0.3 V to VDD + 0.3 V
Digital Input Voltage to DGND –0.3 V to VDD + 0.3 V
Digital Output Voltage to DGND –0.3 V to VDD + 0.3 V
Operating Temperature Range

Industrial (A, B Versions) –40°C to +85°C

Storage Temperature Range –65°C to +150°C
Junction Temperature 150°C
16-Lead Plastic SOIC, Power Dissipation 350 mW

θJA Thermal Impedance1

Lead Temperature, Soldering

Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C

1

JEDEC 1S standard (2-layer) board data.

−0.3 V to +7 V

124.9°C/W

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada­tion or loss of functionality.

Rev. PrE | Page 5 of 24

ADE7757A Preliminary Technical Data

TERMINOLOGY

Measurement Error

The error associated with the energy measurement made by the
ADE7757A is defined by the following formula:

7757

−

% ×

=

Error

Phase Error Between Channels

The high-pass filter (HPF) in the current channel (Channel V1)
has a phase-lead response. To offset this phase response and
equalize the phase response between channels, a phase­correction network is also placed in Channel V1. The phase­correction network matches the phase to within 0.1° over a
range of 45 Hz to 65 Hz, and 0.2° over a range 40 Hz to 1 kHz
(see Figure 23 and Figure 24).

Power Supply Rejection

This quantifies the ADE7757A measurement error as a
percentage of reading when the power supplies are varied.

For the ac PSR measurement, a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading is obtained under the
same input signal levels. Any error introduced is expressed as a
percentage of reading—see the Measurement Error definition.

For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supplies are then varied 5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.

EnergyTrue

EnergyTrueADEbyRegisteredEnergy

%100

ADC Offset Error

This refers to the small dc signal (offset) associated with the
analog inputs to the ADCs. However, the HPF in Channel V1
eliminates the offset in the circuitry. Therefore, the power
calculation is not affected by this offset.

Frequency Output Error (CF)

The frequency output error of the ADE7757A is defined as the
difference between the measured output frequency (minus the
offset) and the ideal output frequency. The difference is
expressed as a percentage of the ideal frequency. The ideal
frequency is obtained from the ADE7757A transfer function.

Gain Error

The gain error of the ADE7757A is defined as the difference
between the measured output of the ADCs (minus the offset)
and the ideal output of the ADCs. The difference is expressed
as a percentage of the ideal output of the ADCs.

Oscillator Frequency Tolerance

The oscillator frequency tolerance of the ADE7757A is defined
as the part-to-part frequency variation in terms of percentage
at room temperature (25°C). It is measured by taking the
difference between the measured oscillator frequency and the
nominal frequency defined in the Specifications section.

Oscillator Frequency Stability

The frequency variation in terms of the parts-per-million drift
over the operating temperature range. In a metering application,
the temperature range is −40°C to +85°C. Oscillator frequency
stability is measured by taking the difference between the
measured oscillator frequency at –40°C and +85°C and the
measured oscillator frequency at +25°C.

Rev. PrE | Page 6 of 24

Preliminary Technical Data ADE7757A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 VDD

Power Supply. This pin provides the supply voltage for the circuitry in the ADE7757A. The supply voltage
should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 µF
capacitor in parallel with a ceramic 100 nF capacitor.

2, 3 V2P, V2N

Analog Inputs for Channel V2 (Voltage Channel). These inputs provide a fully differential input pair. The
maximum differential input voltage is ±165 mV for specified operation. Both inputs have internal ESD
protection circuitry; an overvoltage of ±6 V can be sustained on these inputs without risk of permanent
damage.

4, 5 V1N, V1P

Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum signal level of ±30 mV with respect to the V1N pin for specified operation. Both inputs have
internal ESD protection circuitry and, in addition, an overvoltage of ±6 V can be sustained on these inputs
without risk of permanent damage.

6 AGND

This pin provides the ground reference for the analog circuitry in the ADE7757A, that is, the ADCs and
reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the
ground reference for all analog circuitry, such as antialiasing filters, current and voltage sensors, and so forth.
For accurate noise suppression, the analog ground plane should be connected to the digital ground plane at
only one point. A star ground configuration helps to keep noisy digital currents away from the analog
circuits.

7 REF

IN/OUT

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.45 V
and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at
this pin. In either case, this pin should be decoupled to AGND with a 1 µF tantalum capacitor and a 100 nF
ceramic capacitor. The internal reference cannot be used to drive an external load.

8 SCF

Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF.
Table 7 shows calibration frequencies selection.

9, 10 S1, S0

These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
With this logic input, designers have greater flexibility when designing an energy meter. See the Selecting a
Frequency for an Energy Meter Application section.

11 RCLKIN

To enable the internal oscillator as a clock source to the chip, a precise low temperature drift resistor at a
nominal value of 6.2 kΩ must be connected from this pin to DGND.

12 REVP

This logic output goes high when negative power is detected, such as when the phase angle between the
voltage and current signals is greater than 90°. This output is not latched and is reset when positive power is
once again detected. The output goes high or low at the same time that a pulse is issued on CF.

13 DGND

This pin provides the ground reference for the digital circuitry in the ADE7757A, that is, the multiplier, filters,
and digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The digital
ground plane is the ground reference for all digital circuitry, for example, counters (mechanical and digital),
MCUs, and indicator LEDs. For accurate noise suppression, the analog ground plane should be connected to
the digital ground plane at one point only—a star ground.

14 CF

Calibration Frequency Logic Output. The CF logic output provides instantaneous real power information. This
output is intended for calibration purposes (also see the SCF pin description).

15, 16 F2, F1

Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can be
used to directly drive electromechanical counters and 2-phase stepper motors. See the Transfer Function
section.

V

1

DD

V2P

2
3

V2N

ADE7757A

V1N

4

TOP VIEW

(Not to Scale)

V1P

5
6

AGND

REF

IN/OUT

SCF

7
8

Figure 3. Pin Configuration

16
15
14
13
12
11
10

9

F1
F2
CF
DGND
REVP
RCLKIN
S0
S1

05330-003

Rev. PrE | Page 7 of 24

ADE7757A Preliminary Technical Data

2

TYPICAL PERFORMANCE CHARACTERISTICS

V

DD

+

10µF

16
15
14

820Ω

12

6.2kΩ

11

10

9
8

10nF 10nF 10nF

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100

U3

1

2 3

K7

4

K8

PS2501-1

V

DD

10kΩ

05330-004

CURRENT CHANNEL (% of Full Scale)

–40°C

+25°C

+85°C

05330-021

602kΩ

1µF

200Ω

+

150nF

150nF

+

–40°C

20V

40A TO

40mA

350µΩ

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

+25°C

100nF

1

V

DD

U1

RCLKIN

DGND

13

F1
F2

CF

REVP

S0
S1

SCF

200Ω

200Ω

150nF

200Ω

150nF

100nF

2

V2P

ADE7757A

3

V2N

5

V1P

4

V1N

7

REF

IN/OUT

AGND

6

Figure 4. Test Circuit for Performance Curves

+85°C

05330-019

Figure 5. Error as a % of Reading over Temperature

with On-Chip Reference (PF = 1)

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

+25°C, PF = 0.5 IND

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

+85°C, PF = 0.5 IND

+25°C, PF = 1

–40°C, PF = 0.5 IND

05330-020

Figure 6. Error as a % of Reading over Temperature

with On-Chip Reference (PF = 0.5)

Rev. PrE | Page 8 of 24

Figure 7. Error as a % of Reading over Temperature

with External Reference (PF = 1)

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

–40°C, PF = 0.5 IND

+25°C, PF = 1

+25°C, PF = 0.5 IND

+85°C, PF = 0.5 IND

Figure 8. Error as a % of Reading over Temperature

with External Reference (PF = 0.5)

05330-022