Analog Devices ADE7757 a Datasheet

Energy Metering IC

with Integrated Oscillator

FEATURES On-Chip Oscillator as Clock Source High Accuracy, Supposes 50 Hz/60 Hz IEC 521/IEC 61036 Less than 0.1% Error over a Dynamic Range of 500 to 1 The ADE7757 Supplies Average Real Power on the

Frequency Outputs F1 and F2

The High Frequency Output CF Is Intended for

Calibration and Supplies Instantaneous Real Power

The Logic Output REVP Can Be Used to Indicate a

Potential Miswiring or Negative Power

Direct Drive for Electromechanical Counters and

2-Phase Stepper Motors (F1 and F2)

Proprietary ADCs and DSP Provide High Accuracy over

Large Variations in Environmental Conditions and

Time On-Chip Power Supply Monitoring On-Chip Creep Protection (No Load Threshold) On-Chip Reference 2.5 V (20 ppm/C Typical)

with External Overdrive Capability Single 5 V Supply, Low Power (20 mW Typical) Low Cost CMOS Process AC Input Only

GENERAL DESCRIPTION

The ADE7757 is a high accuracy electrical energy measurement IC. It is a pin reduction version of the ADE7755 with an enhancement of a precise oscillator circuit that serves as a clock source to the chip. The ADE7757 eliminates the cost of an external crystal or resonator, thus reducing the overall cost of a meter

ADE7757

built with this IC. The chip directly interfaces with the shunt resistor and operates only with ac input.

The ADE7757 specifications surpass the accuracy requirements as quoted in the IEC 61036 standard. The AN-679 Application Note can be used as a basis for a description of an IEC 61036 low cost watt-hour meter reference design.

The only analog circuitry used in the ADE7757 is in the ⌺-⌬ ADCs and reference circuit. All other signal processing (e.g., multiplication and filtering) is carried out in the digital domain. This approach provides superior stability and accuracy over time and extreme environmental conditions.

The ADE7757 supplies average real power information on the low frequency outputs F1 and F2. These outputs may be used to directly drive an electromechanical counter or interface with an MCU. The high frequency CF logic output, ideal for calibration purposes, provides instantaneous real power information.

The ADE7757 includes a power supply monitoring circuit on the V the supply voltage on V

supply pin. The ADE7757 will remain inactive until

reaches approximately 4 V. If the

supply falls below 4 V, the ADE7757 will also remain inactive and the F1, F2, and CF outputs will be in their nonactive modes.

Internal phase matching circuitry ensures that the voltage and current channels are phase matched while the HPF in the current channel eliminates dc offsets. An internal no-load threshold ensures that the ADE7757 does not exhibit creep when no load is present.

The ADE7757 is available in a 16-lead SOIC narrow-body package.

FUNCTIONAL BLOCK DIAGRAM

AGND

POWER

SUPPLY MONITOR

V2P

V2N

V1N

V1P

2.5V

REFERENCE

*U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.

4k

REF

-

ADC

-

ADC

IN/OUT

...110101...

...11011001...

INTERNAL

OSCILLATOR

RCLKIN

REV. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

DGND

ADE7757

SIGNAL

PROCESSING

BLOCK

MULTIPLIER

PHASE

CORRECTION

HPF



DIGITAL-TO-FREQUENCY

SCF

LPF

CONVERTER

REVP

(VDD = 5 V  5%, AGND = DGND = 0 V, On-Chip Reference, RCLKIN = 6.2 k,

ADE7757–SPECIFICATIONS

Parameter Value Unit Test Conditions/Comments

ACCURACY

Measurement Error1 on Channel V1 Channel V2 with Full-Scale Signal (± 165 mV), 25°C

Phase Error

V1 Phase Lead 37° (PF = 0.8 Capacitive) ± 0.1 Degrees (°) max V1 Phase Lag 60° (PF = 0.5 Inductive) ± 0.1 Degrees (°) max

AC Power Supply Rejection

Output Frequency Variation (CF) 0.2 % Reading typ V1 = 21.2 mV rms, V2 = 116.7 mV rms @ 50 Hz

DC Power Supply Rejection

Output Frequency Variation (CF) ± 0.3 % Reading typ V1 = 21.2 mV rms, V2 = 116.7 mV rms,

ANALOG INPUTS See Analog Inputs section

Channel V1 Maximum Signal Level ± 30 mV max V1P and V1N to AGND Channel V2 Maximum Signal Level ± 165 mV max V2P and V2N to AGND Input Impedance (DC) 320 kΩ min OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 5 Bandwidth (–3 dB) 7 kHz nominal OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C ADC Offset Error Gain Error

OSCILLATOR FREQUENCY (OSC) 450 kHz nominal RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C

Oscillator Frequency Tolerance Oscillator Frequency Stability

REFERENCE INPUT

REF

Input Capacitance 10 pF max

ON-CHIP REFERENCE Nominal 2.5 V

Reference Error ± 200 mV max Temperature Coefficient ± 20 ppm/°C typ

LOGIC INPUTS

SCF, S0, S1,

Input High Voltage, V Input Low Voltage, V Input Current, I Input Capacitance, C

LOGIC OUTPUTS

F1 and F2

Output High Voltage, V

Output Low Voltage, V

Output High Voltage, V

Output Low Voltage, VOL I

Frequency Output Error

POWER SUPPLY For Specified Performance

NOTES

See Terminology section for explanation of specifications.

See plots in Typical Performance Characteristics.

Sample tested during initial release and after any redesign or process change that may affect this parameter.

Specifications subject to change without notice.

1, 2

between Channels Line Frequency = 45 Hz to 65 Hz

1, 2

Input Voltage Range 2.7 V max 2.5 V + 8%

IN/OUT

0.1 % Reading typ Over a Dynamic Range 500 to 1

± 18 mV max See Terminology Section and Typical Performance Characteristics ± 4% Ideal typ External 2.5 V Reference

± 12 % Reading typ ± 30 ppm/°C typ

2.3 V min 2.5 V – 8%

INH

INL

2.4 V min VDD = 5 V ± 5%

0.8 V max VDD = 5 V ± 5% ± 1 µA max Typically 10 nA, VIN = 0 V to V 10 pF max

4.5 V min VDD = 5 V

0.5 V max V

4V min V

1, 2

(CF) ± 10 % Ideal typ External 2.5 V Reference,

0.5 V max V

4.75 V min 5 V – 5%

5.25 V max 5 V + 5% 5 mA max Typically 4 mA

0.5%  50 ppm/C, T

S0 = S1 = 1,

Ripple on V S0 = S1 = 1,

VDD = 5 V ± 250 mV

V1 = 21.2 mV rms, V2 = 116.7 mV rms

SOURCE

SINK

= 5 V

SOURCE

= 5 V

SINK

= 5 V

V1 = 21.2 mV rms, V2 = 116.7 mV rms

to T

MIN

= 10 mA

= 5 mA

= –40C to +85C, unless otherwise noted.)

MAX

of 200 mV rms @ 100 Hz

ppm/°C

REV. A–2–

(VDD = 5 V  5%, AGND = DGND = 0 V, On-Chip Reference, RCLKIN = 6.2 kΩ,

1, 2

TIMING CHARACTERISTICS

0.5%  50 ppm/C, T

MIN

to T

= –40C to +85C, unless otherwise noted.)

MAX

Parameter A, B Versions Unit Test Conditions/Comments

3, 4

NOTES

Sample tested during initial release and after any redesign or process change that may affect this parameter.

See Figure 1.

The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs section.

The CF pulse is always 35 µs in the high frequency mode. See Frequency Outputs section and Table III.

Specifications subject to change without notice.

244 ms F1 and F2 Pulse Width (Logic Low). See Table II sec Output Pulse Period. See Transfer Function section. 1/2 t

sec Time between F1 Falling Edge and F2 Falling Edge. 173 ms CF Pulse Width (Logic High). See Table III sec CF Pulse Period. See Transfer Function section. 2 µs Minimum Time between F1 and F2 Pulses.

ADE7757

Figure 1. Timing Diagram for Frequency Outputs

REV. A

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ADE7757

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C, unless otherwise noted.)

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

Analog Input Voltage to AGND

V1P, V1N, V2P, and V2N . . . . . . . . . . . . . . . . –6 V to +6 V

Reference Input Voltage to AGND . . . –0.3 V to V

Digital Input Voltage to DGND . . . . . –0.3 V to V

Digital Output Voltage to DGND . . . . –0.3 V to V

+ 0.3 V

Operating Temperature Range

Industrial (A, B Versions) . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

16-Lead Plastic SOIC, Power Dissipation . . . . . . . . . 350 mW

Thermal Impedance2 . . . . . . . . . . . . . . . . . . .124.9°C/W

␪

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

NOTES

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

JEDEC 1S Standard (2-layer) Board Data.

ORDERING GUIDE

Model Package Description Package Options

ADE7757ARN SOIC Narrow-Body RN-16 ADE7757ARNRL SOIC Narrow-Body RN-16

in Reel EVAL-ADE7757EB Evaluation Board Evaluation Board ADE7757ARN-REF Reference Design Reference Design

TERMINOLOGY Measurement Error

The error associated with the energy measurement made by the ADE7757 is defined by the following formula

%–Error

Phase Error between Channels

Energy Registered by ADE True Energy

True Energy

7757

¥ 100%

The HPF (high-pass filter) in the current channel (Channel V1) has a phase lead response. To offset this phase response and equalize the phase response between channels, a phase correction network is also placed in Channel V1. The phase correction network matches the phase to within ± 0.1° over a range of 45 Hz to 65 Hz, and ± 0.2° over a range 40 Hz to 1 kHz (see Figures 11 and 12).

Power Supply Rejection

This quantifies the ADE7757 measurement error as a percentage of reading when the power supplies are varied.

For the ac PSR measurement, a reading at nominal supplies (5 V) is taken. A 200 mV rms/100 Hz signal is then introduced onto the supplies and a second reading is obtained under the same input signal levels. Any error introduced is expressed as a percentage of reading—see the Measurement Error definition.

For the dc PSR measurement, a reading at nominal supplies (5 V) is taken. The supplies are then varied ± 5% and a second reading is obtained with the same input signal levels. Any error introduced is again expressed as a percentage of reading.

ADC Offset Error

This refers to the small dc signal (offset) associated with the analog inputs to the ADCs. However, the HPF in Channel V1 eliminates the offset in the circuitry. Therefore, the power calculation is not affected by this offset.

Frequency Output Error (CF)

The frequency output error of the ADE7757 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the ADE7757 transfer function (see the Transfer Function section).

Gain Error

The gain error of the ADE7757 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the ADE7757 transfer function (see the Transfer Function section).

Oscillator Frequency Tolerance

The oscillator frequency tolerance of the ADE7757 is defined as part-to-part frequency variation in terms of percentage at room temperature (25°C). It is measured by taking the difference between the measured oscillator frequency and the nominal frequency defined in the Specifications section.

Oscillator Frequency Stability

Oscillator frequency stability is defined as frequency variation in terms of parts-per-million drift over the operating temperature range. In a metering application, the temperature range is –40°C to +85°C. Oscillator frequency stability is measured by taking the difference between the measured oscillator frequency at –40°C and +85°C and the measured oscillator frequency at +25°C.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADE7757 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. A–4–

PIN CONFIGURATION

ADE7757

REF

V2P

V2N

V1N

V1P

AGND

IN/OUT

SCF

ADE7757

TOP VIEW

(Not to Scale)

DGND

REVP

RCLKIN

PIN FUNCTION DESCRIPTIONS

Pin No. Mnemonic Description

Power Supply. This pin provides the supply voltage for the circuitry in the ADE7757. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 µF capacitor in parallel with a ceramic 100 nF capacitor.

2, 3 V2P, V2N Analog Inputs for Channel V2 (voltage channel). These inputs provide a fully differential input pair. The

maximum differential input voltage is ± 165 mV for specified operation. Both inputs have internal ESD protection circuitry; an overvoltage of ± 6 V can be sustained on these inputs without risk of permanent damage.

4, 5 V1N, V1P Analog Inputs for Channel V1 (current channel). These inputs are fully differential voltage inputs with a

maximum signal level of ± 30 mV with respect to the V1N pin for specified operation. Both inputs have internal ESD protection circuitry and, in addition, an overvoltage of ±6 V can be sustained on these inputs without risk of permanent damage.

6 AGND This provides the ground reference for the analog circuitry in the ADE7757, i.e., ADCs and reference.

This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference for all analog circuitry, e.g., antialiasing filters, current and voltage sensors, and so forth. For accurate noise suppression, the analog ground plane should be connected to the digital ground plane at only one point. A star ground configuration will help to keep noisy digital currents away from the analog circuits.

7 REF

IN/OUT

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.5 V and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 µF tanta- lum capacitor and a 100 nF ceramic capacitor. The internal reference cannot be used to drive an external load.

8 SCF Select Calibration Frequency. This logic input is used to select the frequency on the calibration output

CF. Table III shows calibration frequencies selection.

9, 10 S1, S0 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conver-

sion. With this logic input, designers have greater flexibility when designing an energy meter. See the Selecting a Frequency for an Energy Meter Application section.

11 RCLKIN To enable the internal oscillator as a clock source to the chip, a precise low temperature drift resistor at a

nominal value of 6.2 kΩ must be connected from this pin to DGND.

12 REVP This logic output will go high when negative power is detected, i.e., when the phase angle between the

voltage and current signals is greater than 90°. This output is not latched and will be reset when positive power is once again detected. The output will go high or low at the same time that a pulse is issued on CF.

13 DGND This provides the ground reference for the digital circuitry in the ADE7757, i.e., multiplier, filters, and

digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The digital ground plane is the ground reference for all digital circuitry, e.g., counters (mechanical and digital), MCUs, and indicator LEDs. For accurate noise suppression, the analog ground plane should be connected to the digital ground plane at one point only, i.e., a star ground.

14 CF Calibration Frequency Logic Output. The CF logic output provides instantaneous real power informa-

tion. This output is intended for calibration purposes. Also see SCF pin description.

15, 16 F2, F1 Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can

be used to directly drive electromechanical counters and 2-phase stepper motors. See the Transfer Function section.

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