Analog Devices ADE7755ARSRL, ADE7755ARS Datasheet

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a
ADE7755*
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002
Energy Metering IC
with Pulse Output
FUNCTIONAL BLOCK DIAGRAM
MULTIPLIER
AC/DC
CLKOUT
V1P
V1N
G0
V2P
G1
AV
DD
DV
DD
HPF
CLKIN
REF
IN/OUT
F1
F2
CF
REVP
SCF
S0
S1
RESET
AGND
DGND
PHASE
CORRECTION
4k
...
110101
...
SIGNAL
PROCESSING
BLOCK
ADC
PGA
1, 2, 8, 16
POWER
SUPPLY MONITOR
ADC
V2N
ADE7755
...
11011001
...
LPF
2.5V
REFERENCE
DIGITAL-TO-FREQUENCY
CONVERTER
FEATURES High Accuracy, Surpasses 50 Hz/60 Hz IEC 687/1036 Less than 0.1% Error over a Dynamic Range of
500 to 1
The ADE7755 Supplies
Average Real Power
on the
Frequency Outputs F1 and F2
The High-Frequency Output CF Is Intended for
Calibration and Supplies
Instantaneous Real Power
Pin Compatible with AD7755 with Synchronous CF and
F1/F2 Outputs
The Logic Output REVP Can Be Used to Indicate a
Potential Miswiring or Negative Power
Direct Drive for Electromechanical Counters and
Two Phase Stepper Motors (F1 and F2)
A PGA in the Current Channel Allows the Use of Small
Values of
Shunt
and
Burden
Resistance
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and
Time On-Chip Power Supply Monitoring On-Chip Creep Protection (No Load Threshold) On-Chip Reference 2.5 V 8% (30 ppm/C Typical)
with External Overdrive Capability Single 5 V Supply, Low Power (15 mW Typical) Low Cost CMOS Process
*U.S. Patents 5,745,323, 5,760,617, 5,862,069, and 5,872,469.
GENERAL DESCRIPTION
The ADE7755 is pin compatible with the AD7755. The only difference between the ADE7755 and the AD7755 is that the ADE7755 features a synchronous CF and F1/F2 outputs under all load conditions.
The ADE7755 is a high accuracy electrical energy measurement IC. The part specifications surpass the accuracy requirements as quoted in the IEC1036 standard. See Analog Devices’ Appli­cation Note AN-559 for a description of an IEC1036 watt-hour meter reference design based on the AD7755.
The only analog circuitry used in the ADE7755 is in the ADCs and reference circuit. All other signal processing (e.g., multipli­cation and filtering) is carried out in the digital domain. This approach provides superior stability and accuracy over extremes in environmental conditions and over time.
The ADE7755 supplies average real power information on the low-frequency outputs F1 and F2. These logic outputs may be used to directly drive an electromechanical counter or interface to an MCU. The CF logic output gives instantaneous real power information. This output is intended to be used for calibration purposes or for interfacing to an MCU.
The ADE7755 includes a power supply monitoring circuit on the AV
DD
supply pin. The ADE7755 will remain in a reset condition
until the supply voltage on AV
DD
reaches 4 V. If the supply falls below 4 V, the ADE7755 will also be reset and no pulses will be issued on F1, F2, and CF.
Internal phase matching circuitry ensures that the voltage and current channels are phase matched whether the HPF in Chan­nel 1 is on or off. An internal no-load threshold ensures that the ADE7755 does not exhibit any creep when there is no load.
The ADE7755 is available in a 24-lead SSOP package.
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ADE7755–SPECIFICATIONS
(AVDD = DVDD = 5 V 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, T
MIN
to T
MAX
= –40C to +85C.)
Parameter Specifications Unit Test Conditions/Comments
ACCURACY
1, 2
Measurement Error1 on Channel 1 Channel 2 with Full-Scale Signal (±660 mV), 25C Gain = 1 0.1 % Reading typ Over a Dynamic Range 500 to 1 Gain = 2 0.1 % Reading typ Over a Dynamic Range 500 to 1 Gain = 8 0.1 % Reading typ Over a Dynamic Range 500 to 1 Gain = 16 0.1 % Reading typ Over a Dynamic Range 500 to 1 Phase Error
1
Between Channels Line Frequency = 45 Hz to 65 Hz
V1 Phase Lead 37 (PF = 0.8 Capacitive) ±0.1 Degrees() max AC/DC = 0 and AC/DC = 1 V1 Phase Lag 60 (PF = 0.5 Inductive) ±0.1 Degrees() max AC/DC = 0 and AC/DC = 1
AC Power Supply Rejection
1
AC/DC = 1, S0 = S1 = 1, G0 = G1 = 0
Output Frequency Variation (CF) 0.2 % Reading typ V1 = 100 mV rms, V2 = 100 mV rms, @ 50 Hz
Ripple on AV
DD
of 200 mV rms @ 100 Hz
DC Power Supply Rejection
1
AC/DC = 1, S0 = S1 = 1, G0 = G1 = 0
Output Frequency Variation (CF) ±0.3 % Reading typ V1 = 100 mV rms, V2 = 100 mV rms,
AVDD = DVDD = 5 V ± 250 mV
ANALOG INPUTS See Analog Inputs section
Maximum Signal Levels ± 1V max V1P, V1N, V2N, and V2P to AGND Input Impedance (DC) 390 kW min CLKIN = 3.58 MHz Bandwidth (–3 dB) 14 kHz typ CLKIN/256, CLKIN = 3.58 MHz ADC Offset Error
1, 2
±25 mV max Gain = 1, See Terminology and Performance Graphs
Gain Error
1
±7% Ideal typ External 2.5 V Reference, Gain = 1
V1 = 470 mV dc, V2 = 660 mV dc
Gain Error Match
1
±0.2 % Ideal typ External 2.5 V Reference
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range 2.7 V max 2.5 V + 8%
2.3 V min 2.5 V – 8%
Input Impedance 3.2 kW min Input Capacitance 10 pF max
ON-CHIP REFERENCE Nominal 2.5 V
Reference Error ±200 mV max Temperature Coefficient ±30 ppm/C typ
CLKIN Note All Specifications for CLKIN of 3.58 MHz
Input Clock Frequency 4 MHz max
1 MHz min
LOGIC INPUTS
3
SCF, S0, S1, AC/DC, RESET, G0, and G1
Input High Voltage, V
INH
2.4 V min DVDD = 5 V ± 5%
Input Low Voltage, V
INL
0.8 V max DVDD = 5 V ± 5%
Input Current, I
IN
±3 mA max Typically 10 nA, VIN = 0 V to DV
DD
Input Capacitance, C
IN
10 pF max
LOGIC OUTPUTS
3
F1 and F2
Output High Voltage, V
OH
I
SOURCE
= 10 mA
4.5 V min DV
DD
= 5 V
Output Low Voltage, V
OL
I
SINK
= 10 mA
0.5 V max DV
DD
= 5 V
CF and REVP
Output High Voltage, V
OH
I
SOURCE
= 5 mA
4V min DV
DD
= 5 V
Output Low Voltage, V
OL
I
SINK
= 5 mA
0.5 V max DVDD = 5 V
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ADE7755
Parameter Specifications Unit Test Conditions/Comments
POWER SUPPLY For Specified Performance
AV
DD
4.75 V min 5 V – 5%
5.25 V max 5 V + 5%
DV
DD
4.75 V min 5 V – 5%
5.25 V max 5 V + 5%
AI
DD
3 mA max Typically 2 mA
DI
DD
2.5 mA max Typically 1.5 mA
NOTES
1
See Terminology section for explanation of specifications.
2
See Plots in Typical Performance Graphs.
3
Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1, 2
Parameter Specifications Unit Test Conditions/Comments
t
1
3
275 ms F1 and F2 Pulsewidth (Logic Low)
t
2
See Table III sec Output Pulse Period. See Transfer Function section.
t
3
1/2 t
2
sec Time between F1 Falling Edge and F2 Falling Edge
t
4
3, 4
90 ms CF Pulsewidth (Logic High)
t
5
See Table IV sec CF Pulse Period. See Transfer Function section.
t
6
CLKIN/4 sec Minimum Time between F1 and F2 Pulse
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter.
2
See Figure 1.
3
The pulsewidths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs section.
4
The CF pulse is always 18 ms in the high-frequency mode. See Frequency Outputs section and Table IV.
Specifications subject to change without notice.
(AVDD = DVDD = 5 V 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, T
MIN
to
T
MAX
= –40C to +85C.)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADE7755 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
(TA = 25C unless otherwise noted.)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND
V1P, V1N, V2P, and V2N . . . . . . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . –0.3 V to DV
DD
+ 0.3 V
Digital Output Voltage to DGND . . –0.3 V to DV
DD
+ 0.3 V
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40C to +85∞C
Storage Temperature Range . . . . . . . . . . . . –65C to +150∞C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150∞C
24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW
q
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215∞C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220∞C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model Package Description Package Options
ADE7755ARS Shrink Small Outline Package RS-24 ADE7755ARSRL Shrink Small Outline Package in Reel RSRL-24 ADE7755AN-REF ADE7755 Reference Design PCB (See AN-559) EVAL-ADE7755EB ADE7755 Evaluation Board
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ADE7755
–4–
.t
2
.t
3
t
4
.t
5
.t
6
t
1
F1
F2
CF
Figure 1. Timing Diagram for Frequency Outputs
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADE7755
NC = NO CONNECT
DV
DD
AC/DC
AV
DD
NC
F1
V1P
V1N
V2N
V2P
RESET
REF
IN/OUT
AGND
SCF
F2
CF
DGND
REVP
NC
CLKOUT
CLKIN
G0
G1
S0
S1
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ADE7755
–5–
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Description
1DV
DD
Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7755. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 mF capacitor in parallel with a ceramic 100 nF capacitor.
2 AC/DC High-Pass Filter Select. This logic input is used to enable the HPF in Channel 1 (Current Channel).
A logic one on this pin enables the HPF. The associated phase response of this filter has been inter­nally compensated over a frequency range of 45 Hz to 1 kHz. The HPF filter should be enabled in power metering applications.
3AV
DD
Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the ADE7755. The supply should be maintained at 5 V ± 5% for specified operation. Every effort should be made to minimize power supply ripple and noise at this pin by the use of proper decoupling. This pin should be decoupled to AGND with a 10 mF capacitor in parallel with a ceramic 100 nF capacitor.
4, 19 NC No Connect 5, 6 V1P, V1N Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with
a maximum differential signal level of ±470 mV for specified operation. Channel 1 also has a PGA, and the gain selections are outlined in Table I. The maximum signal level at these pins is ± 1V with respect to AGND. Both inputs have internal ESD protection circuitry. An overvoltage of ±6V can be sustained on these inputs without risk of permanent damage.
7, 8 V2N, V2P Negative and Positive Inputs for Channel 2 (Voltage Channel). These inputs provide a fully differential
input pair. The maximum differential input voltage is ±660 mV for specified operation. The maxi­mum signal level at these pins is ±1V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage of ±6V can also be sustained on these inputs without risk of permanent damage.
9 RESET Reset Pin for the ADE7755. A logic low on this pin will hold the ADCs and digital circuitry in a reset
condition. Bringing this pin logic low will clear the ADE7755 internal registers.
10 REF
IN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.5 V ± 8% and a typical temperature coefficient of 30 ppm/C. An external reference source may also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 mF ceramic capacitor and 100 nF ceramic capacitor.
11 AGND This provides the ground reference for the analog circuitry in the ADE7755, i.e., ADCs and reference.
This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference for all analog circuitry, e.g., antialiasing filters and current and voltage transducers. For good noise suppression, the analog ground plane should only connect to the digital ground plane at one point. A star ground configuration will help to keep noisy digital currents away from the analog circuits.
12 SCF Select Calibration Frequency. This logic input is used to select the frequency on the calibration output
CF. Table IV shows how the calibration frequencies are selected.
13, 14 S1, S0 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency
conversion. This offers the designer greater flexibility when designing the energy meter. See Selecting a Frequency for an Energy Meter Application section.
15, 16 G1, G0 These logic inputs are used to select one of four possible gains for Channel 1, i.e., V1. The possible
gains are 1, 2, 8, and 16. See Analog Input section.
17 CLKIN An external clock can be provided at this logic input. Alternatively, a parallel resonant AT crystal can
be connected across CLKIN and CLKOUT to provide a clock source for the ADE7755. The clock frequency for specified operation is 3.579545 MHz. Crystal load capacitance of between 22 pF and 33 pF (ceramic) should be used with the gate oscillator circuit.
18 CLKOUT A crystal can be connected across this pin and CLKIN as described above to provide a clock source
for the ADE7755. The CLKOUT Pin can drive one CMOS load when an external clock is supplied at CLKIN or by the gate oscillator circuit.
20 REVP This logic output will go logic high when negative power is detected, i.e., when the phase angle between
the voltage and current signals is greater than 90. This output is not latched and will be reset when positive power is once again detected. The output will go high or low at the same time as a pulse is issued on CF.
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