ANALOG DEVICES ADCLK946 Service Manual

Six LVPECL Outputs,
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4
Q5 Q5
LVPECL
CLK
V
T
V
REF
CLK
ADCLK946
REFERENCE
08053-001

FEATURES

4.8 GHz operating frequency 75 fs rms broadband random jitter On-chip input terminations
3.3 V power supply

APPLICATIONS

Low jitter clock distribution Clock and data signal restoration Level translation Wireless communications Wired communications Medical and industrial imaging ATE and high performance instrumentation

GENERAL DESCRIPTION

The ADCLK946 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.
The device has a differential input equipped with center-tapped, differential, 100 Ω on-chip termination resistors. The input accepts dc-coupled LVPECL, CML, 3.3 V CMOS (single ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A V is available for biasing ac-coupled inputs.
The ADCLK946 features six full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias V operation, bias V
to the positive supply and VEE to ground. For ECL
CC
to ground and VEE to the negative supply.
CC
The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to V
− 2 V for a total differen-
CC
tial output swing of 1.6 V.
The ADCLK946 is available in a 24-lead LFCSP and is specified for operation over the standard industrial temperature range of
−40°C to +85°C.
REF
pin
SiGe Clock Fanout Buffer
ADCLK946

FUNCTIONAL BLOCK DIAGRAM

Figure 1.
Rev. A
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