Electrocardiogram (ECG) Analog Front
Preliminary Technical Data
FEATURES
Biopotential signals in; digitized signals out
5
acquisition (ECG) channels + 1 driven lead
Parallel ICs for up to 10+ Electrode measurements
AC and DC Leads Off Detection
Internal Pace Detection Algorithm on 3 leads
Support for users own pace
Thoracic Impedance Measurement (internal/external path)
Selectable Reference Lead
Scalable Noise vs. Power Control, Power Down Modes
Low Power Operation from:
11mW (one lead), 14mW (3 leads), 21mW (all electrodes)
Lead or Electrode Data available
Supports AAMI EC11:1991/(R)2001/(R)2007,
EC13:2002/(R)2007, IEC60601-1 ed. 3.0b, 2005, IEC60601-
2-25 ed. 1.0b, IEC60601-2-27 ed. 2.0, 2005 IEC60601-2-51
ed. 1.0, 2005
Fast Overload Recovery
Low or High speed Data Output Rates
Serial interface SPI®-/QSPI™-/DSP-compatible
56 lead LFCSP package (9mm x9mm)
64 lead LQFP package (10mm x10mm Body size)
ADAS1000/ADAS1000-1/ADAS1000-2
APPLICATIONS
ECG: Monitor & Diagnostic
Bedside Patient Monitoring, Portable Telemetry, Holter,
AED, Cardiac Defibrillators, Ambulatory Monitors, Pace
Maker Programmer, Patient Transport, Stress testing,
GENERAL DESCRIPTION
The ADAS1000 measures electro cardiac (ECG) signals,
horacic impedance, pacing artifacts, lead on/off status and
t
outputs this information in the form of a data frame supplying
either Lead/Vector or Electrode data at programmable data
rates. Its low power from 11mW and small size make it suitable
for portable, battery powered applications. The high
performance also makes it suitable for higher end diagnostic
machines.
The ADAS1000 is designed to simplify the task of acquiring and
ensuring quality ECG signals. Value-added cardiac postprocessing is executed externally on a DSP, microprocessor or
FPGA. Several digital output options ensure flexibility when
monitoring and analyzing signals. The ADAS1000 provides a
low power, small data acquisition system for biopotential
applications.
ELECTRODES
x 5
EXT RESP_LA
EXT RESP LL
EXT RESP_RA
REFOUTREFIN
VREF
CAL IBR ATION
DAC
RES PIRA TIO N
DAC
AC LEA DS
OFF DA C
FUNCTIONAL BLOCK DIAGRAM
SHIELD
DRIVE
AMP
ADC
ADC
SHIELD
+
-
DRIVE
MUXES
_IO
RLD_SJ
10k
Buffer
DRIVEN
LEAD
AMP
-
+
RLD_OUT
VCM
(1.3V)
CM_IN
CM_OUT/WCT
CO MM ON
MO DE A MP
5 x ECG PATH
AMP
AMP
RESPIRATION PATH
Figure 1 Functional Block Diagram – ADAS1000 Full featured Model
AVDD
ADCVDD, DVDD
1.8V
Regulators
ADAS1000
AC LEADS
OFF
DETECTION
PACE
DETECTION
FILTERS,
CONTROL
&
INTERFACE
LOGIC
CLOCK GEN/OSC
/EXTERNALCLK
SOURCE
XTAL1 XTAL2
IOVDD
ADCVDD
DVDD
CS
SCLK
SDI
SDO
DRDY
GPIO0/MCS
GPIO1/MSCL
GPIO2/MSDO
GPIO3
CLK_IO
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ADAS1000/ADAS1000-1/ADAS1000-2 Preliminary Technical Data
GENERAL DESCRIPTION - CONTINUED
Auxiliary features that aid in better quality ECG signal acquisition include: multi-channel averaged driven lead, selectable reference drive, fast
over load recovery, flexible respiration circuitry returning magnitude and phase information, internal pace detection algorithm operating on 3
leads and option of AC or DC leads off detection.
Since ECG systems span different applications, the ADAS1000 features a novel power/noise scaling architecture where the noise can be
reduced at the expense of increasing power consumption. Signal acquisition channels may be shutdown to save power. Data rates can be
reduced to save power.
To ease manufacturing tests, development, as well as offer holistic power-up testing, the ADAS1000 offers a suite of dc and ac test excitation
via the CAL DAC, CRC redundancy testing in addition to read-back of all relevant register address space.
The ADAS1000 is a full featured 5 channel ECG including respiration and pace detection, while the ADAS1000-1 offers only ECG channels
with no respiration or pace features. Similarly the ADAS1000-2 is a subset of the main device and is configured for gang purposes with only
ECG channels enabled (no respiration, pace, RLD, etc). The input structure is a differential amplifier input thereby allowing the user a variety
of configuration options to best suit their application.
The ADAS1000 variants are available in two package options, either a 56 lead LFCSP or a 64 lead LQFP package and are specified over -40°C
to +85°C temperature range.
IOVDD
REFIN CAL_DAC_IO
CALIBRA TION
ECG1 (LA)
ECG 2 (LL)
ECG 3 (RA)
ECG 4 (V1)
REFOUT
VREF
DAC
RESPIR ATION
DAC
AC LEA DS
OFF DA C
DC LEADS
OFF/MUXES
RLD_SJ
10k
RLD_OUT CM_IN
DRIVEN
LEAD
AMP
-
+
VCM
(1.3V)
10k
COM MON
MOD E AMP
CM_OUT/WCT
SHIELD
DRIVE
AMP
DRIVE
+
-
ADAS1000
VREF
ECG PATH
AMP
AMP
AMP
AMP
ADC
ADC
ADC
ADC
VDD
A
ADCVDD, DVDD
1.8V
Regulators
AC LEADS
OFF
DETECTION
PACE
DETECTION
FILTERS,
CONTROL
&
INTERFACE
LOGIC
ADCVDD
DVDD
CS
SCLK
SDI
SDO
DRDY
PD
RESET
SYNC_GANG
ECG 5 (V2)
EXT RESP_LA
EXT RESP LL
EXT RESP_RA
RESPDAC_LA
RESPDAC_LL
RESPDAC_RA
MUX
AMP
AMP
ADC
ADC
RESPIRATION PATH
AGND
REFGND
DGND
Figure 2. ADAS1000 Model Simplified Block Diagram
CLOCK GEN/OSC
/EXTERNAL CLK
SOURCE
XTAL1 XTAL2
GPIO0/MCS
GPIO1/MSCL
GPIO2/MSDO
GPIO3
CLK_IO
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