ANALOG DEVICES ADA4950-1, ADA4950-2 Service Manual

Low Power, Selectable Gain

FEATURES

High performance at low power High speed
−3 dB bandwidth of 750 MHz, G = 1
0.1 dB flatness to 210 MHz, V Slew rate: 2900 V/μs, 25% to 75%
Fast 0.1% settling time of 9 ns Low power: 9.5 mA per amplifier Low harmonic distortion
108 dB SFDR @ 10 MHz
98 dB SFDR @ 20 MHz Low output voltage noise: 9.2 nV/√Hz, G = 1, RTO ±0.2 mV typical input offset voltage Selectable differential gains of 1, 2, and 3 Differential-to-differential or single-ended-to-differential
operation Adjustable output common-mode voltage Input common-mode range shifted down by 1 V Wide supply range: +3 V to ±5 V Available in 16-lead and 24-lead LFCSP packages

APPLICATIONS

ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Differential buffers Line drivers

GENERAL DESCRIPTION

The ADA4950-1/ADA4950-2 are gain-selectable versions of the
ADA4932-1/ADA4932-2 with on-chip feedback and gain resistors.
They are ideal choices for driving high performance ADCs as single­ended-to-differential or differential-to-differential amplifiers. The output common-mode voltage is user adjustable by means of an internal common-mode feedback loop, allowing the ADA4950-1/ ADA4950-2 output to match the input of the ADC. The internal feedback loop also provides exceptional output balance as well as suppression of even-order harmonic distortion products.
Differential gain configurations of 1, 2, and 3 are easily realized with internal feedback networks that are connected externally to set the closed-loop gain of the amplifier.
The ADA4950-1/ADA4950-2 are fabricated using the Analog Devices, Inc., proprietary silicon-germanium (SiGe) complementary bipolar process, enabling them to achieve low levels of distortion and noise at low power consumption. The low offset and excellent dynamic performance of the ADA4950-x make it well suited for a wide variety of data acquisition and signal processing applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
OUT, dm
= 2 V p-p, R
L, dm
BE
= 200 Ω
Differential ADC Driver, G = 1, 2, 3
ADA4950-1/ADA4950-2

FUNCTIONAL BLOCK DIAGRAMS

1+INB
2+INA
3–INA
4+INB
1–INA1 2–INB1 3+V
S1
4+V
S1
5+INB2 6+INA2
40
V
=2V p-p
OUT, dm
–50
–60
–70
–80
–90
–100
–110
HARMONIC DISTORTION (dBc)
–120
–130
–140
0.1 1 10 100
Figure 3. Harmonic Distortion vs. Frequency at Various Supplies
The ADA4950-x is available in a Pb-free, 3 mm × 3 mm, 16-lead LFCSP (ADA4950-1, single) or a Pb-free, 4 mm × 4 mm, 24-lead LFCSP (ADA4950-2, dual). The pinout has been optimized to facilitate PCB layout and minimize distortion. The ADA4950-1/ ADA4950-2 are specified to operate over the −40°C to +105°C temperature range; both operate on supplies from +3 V to ±5 V.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
HD2, ±5V HD3, ±5V HD2, ±2.5V HD3, ±2.5V
S
S
S
S
–V
–V
–V
–V
14
13
15
16
ADA4950-1
5
6
S
S
+V
+V
12 PD
11 –OUT
10 +OUT
9V
8
7
S
S
+V
+V
Figure 1. ADA4950-1
S1
S1
–V
–V
+INB1
+INA1
24
PD1
–OUT1
20
19
21
22
23
ADA4950-2
9
7
8
11
12
10
S2
S2
+V
+V
–INA2
OCM2
–INB2
V
+OUT2
Figure 2. ADA4950-2
FREQUENCY (MHz)
OCM
18 +OUT1 17 V
OCM1
16 –V
S2
–V
15
S2
14
PD2
13 –O UT2
07957-001
07957-002
07957-025
ADA4950-1/ADA4950-2

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±5 V Operation ............................................................................. 3
5 V Operation ............................................................................... 5
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
Maximum Power Dissipation ..................................................... 7
ESD Caution .................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ............................................. 9
Test Circuits ..................................................................................... 16
Ter minology .................................................................................... 17
Theory of Operation ...................................................................... 18
Applications Information .............................................................. 19
Analyzing an Application Circuit ............................................ 19
Selecting the Closed-Loop Gain ............................................... 19
Estimating the Output Noise Voltage ...................................... 19
Calculating the Input Impedance for an Application Circuit
....................................................................................................... 20
Input Common-Mode Voltage Range ..................................... 22
Input and Output Capacitive AC Coupling ............................ 22
Input Signal Swing Considerations .......................................... 22
Setting the Output Common-Mode Voltage .......................... 22
Layout, Grounding, and Bypassing .............................................. 23
High Performance ADC Driving ................................................. 24
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25

REVISION HISTORY

5/09—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
ADA4950-1/ADA4950-2

SPECIFICATIONS

±5 V OPERATION

TA = 25°C, +VS = 5 V, −VS = −5 V, V refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 52 for signal definitions.
Differential Inputs to V
OUT, dm
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small-Signal Bandwidth V
−3 dB Large-Signal Bandwidth V
Bandwidth for 0.1 dB Flatness V
ADA4950-1 210 MHz
ADA4950-2 230 MHz Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time VIN = 0 V to 5 V ramp, G = 2 20 ns
NOISE/HARMONIC PERFORMANCE See Figure 51 for distortion test circuit
Second Harmonic V 1 MHz −108 dBc 10 MHz −107 dBc 20 MHz −98 dBc 50 MHz −80 dBc Third Harmonic V 1 MHz −126 dBc 10 MHz −105 dBc 20 MHz −99 dBc 50 MHz −84 dBc IMD3 f1 = 30 MHz, f2 = 30.1 MHz, V Voltage Noise (Referred to Output) f = 1 MHz Gain = 1 9.2 nV/√Hz Gain = 2 12.5 nV/√Hz Gain = 3 16.6 nV/√Hz Crosstalk (ADA4950-2)
INPUT CHARACTERISTICS
Offset Voltage (Referred to Input) V T Input Capacitance Single-ended at package pin 0.5 pF Input Common-Mode Voltage Range
CMRR DC, ∆V Open-Loop Gain 64 66 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing
Linear Output Current 200 kHz, R Output Balance Error
Gain Error Gain = 1 0.5 1.2 % Gain = 2 1.0 1.9 % Gain = 3 0.8 1.7 %
= 0 V, G = 1, RT = 53.6  (when used), R
OCM
Performance
= 0.1 V p-p 750 MHz
OUT, dm
= 2.0 V p-p 350 MHz
OUT, dm
= 2.0 V p-p, RL = 200 Ω
OUT, dm
= 2 V p-p, 25% to 75% 2900 V/μs
OUT, dm
= 2 V step 9 ns
OUT, dm
= 2 V p-p
OUT, dm
= 2 V p-p
OUT, dm
f = 10 MHz; Channel 2 active, Channel 1 output
= V
= V
+DIN
−DIN
to T
MIN
MAX
Directly at internal amplifier inputs, not external input terminals
OUT, dm
Maximum ∆V
= 1 kΩ
R
L
/∆V
∆V
OUT, cm
see Figure 50 for output balance test circuit
= 0 V −2.5 ±0.2 +2.5 mV
OCM
variation –3.7 μV/°C
/∆V
, ∆V
IN, cm
, single-ended output,
OUT
= 10 Ω, SFDR = 69 dB 114 mA peak
L, dm
, ∆V
OUT, dm
OUT, dm
= 1 kΩ, unless otherwise noted. All specifications
L, dm
= 2 V p-p −94 dBc
OUT, dm
−87 dB
= ±1 V −64 −49 dB
IN, cm
–V
+ 1.4 to
S
– 1.4
+V
S
= 2 V p-p, 1 MHz;
−62 dB
−V +V
−V +V
+ 0.2 to
S
− 1.8
S
+ 1.2 to
S
− 1.2
S
V
V
Rev. 0 | Page 3 of 28
ADA4950-1/ADA4950-2
V
to V
OCM
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
V
DYNAMIC PERFORMANCE
OCM
−3 dB Small-Signal Bandwidth V
−3 dB Large-Signal Bandwidth V Slew Rate VIN = 1.5 V to 3.5 V, 25% to 75% 430 V/μs Input Voltage Noise (Referred to Input) f = 1 MHz 9.8 nV/√Hz
V
INPUT CHARACTERISTICS
OCM
Input Voltage Range
Input Resistance 22 26 32 kΩ Input Offset Voltage V V
CMRR ΔV
OCM
Gain ΔV

General Performance

Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
Operating Range 3.0 11 V Quiescent Current per Amplifier 8.8 9.5 10.1 mA T Powered down 0.7 1.0 mA Power Supply Rejection Ratio ΔV
POWER-DOWN (PD)
PD Input Voltage Enabled ≥(+VS – 1.8) V Turn-Off Time 600 ns Turn-On Time 28 ns PD Pin Bias Current per Amplifier
Enabled Disabled
OPERATING TEMPERATURE RANGE −40 +105 °C
Performance
OUT, cm
= 100 mV p-p 250 MHz
OUT, cm
= 2 V p-p 105 MHz
OUT, cm
+ 1.2 to
–V
S
+V
– 1.2
S
= V
+DIN
OUT, dm
OUT, cm
MIN
OUT, dm
= 0 V −6 +0.8 +6 mV
−DIN
/ΔV
, ΔV
OCM
/ΔV
OCM
to T
variation 31 μA/°C
MAX
= ±1 V −60 −49 dB
OCM
, ΔV
= ±1 V 0.98 1.0 1.01 V/V
OCM
/ΔVS, ΔVS = 1 V p-p −96 −84 dB
V
Powered down ≤(+V
– 2.5) V
S
PD PD
= 5 V = 0 V
−1.0 +0.2 +1.0 μA
−250 −180 −140 μA
Rev. 0 | Page 4 of 28
ADA4950-1/ADA4950-2

5 V OPERATION

TA = 25°C, +VS = 5 V, −VS = 0 V, V refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 52 for signal definitions.
Differential Inputs to V
OUT, dm
Table 4.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small-Signal Bandwidth V
−3 dB Large-Signal Bandwidth V Bandwidth for 0.1 dB Flatness V
ADA4950-1 220 MHz
ADA4950-2 160 MHz Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time VIN = 0 V to 2.5 V ramp, G = 2 19 ns
NOISE/HARMONIC PERFORMANCE See Figure 51 for distortion test circuit
Second Harmonic V 1 MHz −108 dBc 10 MHz −107 dBc 20 MHz −98 dBc 50 MHz −82 dBc Third Harmonic V 1 MHz −124 dBc 10 MHz −114 dBc 20 MHz −99 dBc 50 MHz −83 dBc IMD3 f1 = 30 MHz, f2 = 30.1 MHz, V Voltage Noise (Referred to Input) f = 1 MHz Gain = 1 9.2 nV/√Hz Gain = 2 12.5 nV/√Hz Gain = 3 16.6 nV/√Hz Crosstalk (ADA4950-2)
INPUT CHARACTERISTICS
Offset Voltage (Referred to Input) V T Input Capacitance Single-ended at package pin 0.5 pF Input Common-Mode Voltage Range
CMRR DC, ∆V Open-Loop Gain 64 66 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing
Linear Output Current 200 kHz, R Output Balance Error
Gain Error Gain = 1 0.5 1.2 % Gain = 2 1.0 1.9 % Gain = 3 0.8 1.7 %
= 2.5 V, G = 1, RT = 53.6  (when used), R
OCM
Performance
= 0.1 V p-p 770 MHz
OUT, dm
= 2.0 V p-p 320 MHz
OUT, dm
= 2.0 V p-p, RL = 200 Ω
OUT, dm
= 2 V p-p, 25% to 75% 2200 V/μs
OUT, dm
= 2 V step 10 ns
OUT, dm
= 2 V p-p
OUT, dm
= 2 V p-p
OUT, dm
f = 10 MHz; Channel 2 active, Channel 1 output
= V
= V
+DIN
−DIN
to T
MIN
MAX
Directly at internal amplifier inputs, not external input terminals
OUT, dm
Maximum ∆V
= 1 kΩ
R
L
/∆V
∆V
OUT, cm
see Figure 50 for output balance test circuit
= 2.5 V −4 ±0.4 +4 mV
OCM
variation −3.7 μV/°C
/∆V
, ∆V
IN, cm
IN, cm
, single-ended output,
OUT
= 10 Ω, SFDR = 67 dB 70 mA peak
L, dm
, ∆V
OUT, dm
OUT, dm
= 1 kΩ, unless otherwise noted. All specifications
L, dm
= 2 V p-p −94 dBc
OUT, dm
−87 dB
–V +V
S
S
+ 0.2 to
– 1.8
V
= ±1 V −64 −49 dB
V
= 1 V p-p, 1 MHz;
–V +V
S
+ 1.2 to
– 1.2
S
–V +V
S
S
+ 1.1 to
– 1.1
−62 dB
Rev. 0 | Page 5 of 28
ADA4950-1/ADA4950-2
V
to V
OCM
Table 5.
Parameter Test Conditions/Comments Min Typ Max Unit
V
DYNAMIC PERFORMANCE
OCM
−3 dB Small-Signal Bandwidth V
−3 dB Large-Signal Bandwidth V Slew Rate VIN = 1.5 V to 3.5 V, 25% to 75% 380 V/μs Input Voltage Noise (Referred to Input) f = 1 MHz 9.8 nV/√Hz
V
INPUT CHARACTERISTICS
OCM
Input Voltage Range
Input Resistance 22 26 32 kΩ Input Offset Voltage V V
CMRR ΔV
OCM
Gain ΔV

General Performance

Table 6.
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
Operating Range 3.0 11 V Quiescent Current per Amplifier 8.4 8.9 9.6 mA T Powered down 0.6 0.9 mA Power Supply Rejection Ratio ΔV
POWER-DOWN (PD)
PD Input Voltage Enabled ≥(+VS – 1.8) V Turn-Off Time 600 ns Turn-On Time 29 ns PD Pin Bias Current per Amplifier
Enabled Disabled
OPERATING TEMPERATURE RANGE −40 +105 °C
Performance
OUT, cm
= 100 mV p-p 240 MHz
OUT, cm
= 2 V p-p 90 MHz
OUT, cm
+ 1.2 to
–V
S
+V
– 1.2
S
= V
+DIN
OUT, dm
OUT, cm
MIN
OUT, dm
= 2.5 V −6.5 +1.0 +6.5 mV
−DIN
/ΔV
, ΔV
OCM
/ΔV
OCM
to T
variation 31 μA/°C
MAX
= ±1 V −60 −49 dB
OCM
, ΔV
= ±1 V 0.98 1.0 1.01 V/V
OCM
/ΔVS, ΔVS = 1 V p-p −96 −84 dB
V
Powered down ≤(+V
– 2.5) V
S
PD PD
= 5 V = 0 V
−1.0 +0.2 +1.0 μA
−100 −65 −40 μA
Rev. 0 | Page 6 of 28
ADA4950-1/ADA4950-2

ABSOLUTE MAXIMUM RATINGS

Table 7.
Parameter Rating
Supply Voltage 11 V Power Dissipation See Figure 4 Input Current, +INx, −INx, PD
±5 mA Storage Temperature Range −65°C to +125°C Operating Temperature Range
ADA4950-1 −40°C to +105°C
ADA4950-2 −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C
The power dissipated in the package (P cent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (V dissipated due to the load drive depends upon the particular application. The power dissipated due to the load drive is calcu­lated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ addition, more metal directly in contact with the package leads/
exposed pad from metal traces, through holes, ground, and Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p printed circuit board, as
power planes reduces θ
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the single 16-lead
LFCSP (91°C/W) and the dual 24-lead LFCSP (65°C/W) on
a JEDEC standard 4-layer board with the exposed pad soldered
to a PCB pad that is connected to a solid plane.
3.5
3.0
2.5
described in EIA/JESD51-7.
2.0
Table 8. Thermal Resistance
Package Type θJA θJC Unit
ADA4950-1, 16-Lead LFCSP (Exposed Pad) 91 28 °C/W ADA4950-2, 24-Lead LFCSP (Exposed Pad) 65 16 °C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4950-x package is limited by the associated rise in junction temperature (T the die. At approximately 150°C, which is the glass transition
) on
J
1.5
1.0
MAXIMUM POWER DISSIPATI ON (W)
0.5
0
–40 –20 0 20 40
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric

ESD CAUTION

performance of the ADA4950-x. Exceeding a junction temper­ature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure.
) times the quiescent current (IS). The power
S
.
JA
ADA4950-1
AMBIENT TEM PE RATURE (°C)
for a 4-Layer Board
) is the sum of the quies-
D
JA
ADA4950-2
60 80 100
. In
07957-004
Rev. 0 | Page 7 of 28
ADA4950-1/ADA4950-2

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1 2 3
ADA4950-2
4 5 6
1
–VS1–VS1+INB1
+INA
21
22
23
24
PIN 1 INDICATOR
TOP VIEW
(Not to Scale)
9
7
8
10
S2
S2
+V
+V
–INA2
–INB2
PD1
–OUT1
20
19
18
+OUT1
17
V
OCM1
16
–V
S2
–V
15
S2
14
PD2
13
–OUT2
11
12
OCM2
V
+OUT2
07957-006
S
S
S
S
–V
–V
–V
–V
14
13
15
16
PIN 1 INDICAT OR
1+INB
2+INA
ADA4950-1
TOP VIEW
3–INA
(Not to Scale)
4–INB
5
6
S
S
+V
+V
NOTES
1. SOLDER THE EXPOSED PADDLE ON THE BACK OF THE PACKAGE TO A GROUND PLANE O R TO A POWER PLANE.
12 PD
11 –OUT
10 +OUT
9V
OCM
8
7
S
S
+V
+V
Figure 5. ADA4950-1 Pin Configuration
07957-005
–INA1 –INB1
+V
S1
+V
S1
+INB2 +INA2
NOTES
1. SOLDER THE E XPOSED PADDLE ON THE BACK OF THE PACKAGE TO A GROUND PLANE O R TO A POWE R PLANE.
Figure 6. ADA4950-2 Pin Configuration
Table 9. ADA4950-1 Pin Function Descriptions
Pin No. Mnemonic Description
1 +INB Positive Input B, 250 Ω Input. Use alone for G = 2 or tie to +INA for G = 3. 2 +INA Positive Input A, 500 Ω Input. Use alone for G = 1 or tie to +INB for G = 3. 3 −INA Negative Input A, 500 Ω Input. Use alone for G = 1 or tie to −INB for G = 3. 4 −INB Negative Input B, 250 Ω Input. Use alone for G = 2 or tie to −INA for G = 3. 5 to 8 +VS Positive Supply Voltage. 9 V
Output Common-Mode Voltage.
OCM
10 +OUT Positive Output. 11 −OUT Negative Output. 12
PD
Power-Down Pin.
13 to 16 −VS Negative Supply Voltage. 17 (EPAD) Exposed Paddle (EPAD) Solder the exposed paddle on the back of the package to a ground plane or to a power plane.
Table 10. ADA4950-2 Pin Function Descriptions
Pin No. Mnemonic Description
1 −INA1 Negative Input A, Amplifier 1, 500 Ω Input. Use alone for G = 1 or tie to –INB1 for G = 3. 2 −INB1 Negative Input B, Amplifier 1, 250 Ω Input. Use alone for G = 2 or tie to –INA1 for G = 3. 3, 4 +VS1 Positive Supply Voltage, Amplifier 1. 5 +INB2 Positive Input B, Amplifier 2, 250 Ω Input. Use alone for G = 2 or tie to +INA2 for G = 3. 6 +INA2 Positive Input A, Amplifier 2, 500 Ω Input. Use alone for G = 1 or tie to +INB2 for G = 3. 7 −INA2 Negative Input A, Amplifier 2, 500 Ω Input. Use alone for G = 1 or tie to –INB2 for G = 3. 8 −INB2 Negative Input B, Amplifier 2, 250 Ω Input. Use alone for G = 2 or tie to –INA2 for G = 3. 9, 10 +VS2 Positive Supply Voltage, Amplifier 2. 11 V
Output Common-Mode Voltage, Amplifier 2.
OCM2
12 +OUT2 Positive Output, Amplifier 2. 13 −OUT2 Negative Output, Amplifier 2. 14
PD2
Power-Down Pin, Amplifier 2.
15, 16 −VS2 Negative Supply Voltage, Amplifier 2. 17 V
Output Common-Mode Voltage, Amplifier 1.
OCM1
18 +OUT1 Positive Output, Amplifier 1. 19 −OUT1 Negative Output, Amplifier 1. 20
PD1
Power-Down Pin, Amplifier 1. 21, 22 −VS1 Negative Supply Voltage, Amplifier 1. 23 +INB1 Positive Input B, Amplifier 1, 250 Ω Input. Use alone for G = 2 or tie to +INA1 for G = 3. 24 +INA1 Positive Input A, Amplifier 1, 500 Ω Input. Use alone for G = 1 or tie to +INB1 for G = 3. 25 (EPAD) Exposed Paddle (EPAD) Solder the exposed paddle on the back of the package to a ground plane or to a power plane.
Rev. 0 | Page 8 of 28
ADA4950-1/ADA4950-2

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, +VS = 5 V, −VS = −5 V, V for test setup. Refer to Figure 52 for signal definitions.
2
V
OUT, dm
G = 1, R G = 2, R G = 3, R
= 100mV p-p
= 53.6
T
= 57.6
T
= 61.9
T
10 100
FREQUENCY ( MHz)
1
0
–1
–2
–3
–4
–5
–6
NORMALIZED CLOSED-L OOP GAIN (dB)
–7
–8
1
Figure 7. Small-Signal Frequency Response for Various Gains
= 0 V, G = 1, RT = 53.6 Ω (when used), R
OCM
1000
07957-007
= 1 kΩ, unless otherwise noted. Refer to Figure 49
L, dm
2
V
OUT, dm
G = 1, R G = 2, R G = 3, R
= 2V p-p
= 53.6
T
= 57.6
T
= 61.9
T
10 100 1000
FREQUENCY ( MHz)
1
0
–1
–2
–3
–4
–5
–6
NORMALIZED CLOSED-L OOP GAIN (dB)
–7
–8
1
Figure 10. Large-Signal Frequency Response for Various Gains
07957-010
2
V
OUT, dm
VS= ±5V V
S
= 100mV p-p
= ±2.5V
10 100
FREQUENCY ( MHz)
1000
1
0
–1
–2
–3
–4
–5
CLOSED-LOOP GAIN (dB)
–6
–7
–8
1
Figure 8. Small-Signal Frequency Response for Various Supplies
2
V
OUT, dm
TA = –40°C T T
= 100mV p-p
= +25°C
A
= +105°C
A
10 100
FREQUENCY ( MHz)
1000
1
0
–1
–2
–3
–4
–5
CLOSED-LOOP GAIN (dB)
–6
–7
–8
1
Figure 9. Small-Signal Frequency Response for Various Temperatures
2
V
OUT, dm
V
S
V
S
= 2V p-p
= ±5V = ±2.5V
10 100 1000
FREQUENCY ( MHz)
07957-011
1
0
–1
–2
–3
–4
–5
CLOSED-LOOP GAIN (dB)
–6
–7
07957-008
–8
1
Figure 11. Large-Signal Frequency Response for Various Supplies
2
V
OUT, dm
T
A
T
A
T
A
= 2V p-p
= –40°C = +25°C = +105°C
10 100 1000
FREQUENCY ( MHz)
07957-012
1
0
–1
–2
–3
–4
–5
CLOSED-LOOP GAIN (dB)
–6
–7
07957-009
–8
1
Figure 12. Large-Signal Frequency Response for Various Temperatures
Rev. 0 | Page 9 of 28
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