ANALOG DEVICES ADA4941-1 Service Manual

18-Bit ADC Driver

ADA4941-1

Rev. C

Trademarks and registered trademarks are the property of their respective owners.

Fax: [phone] ©2006–2011 Analog Devices, Inc. All rights reserved.

DIS

4

3

2

1

IN

OUT–OUT+

V+

REF

FB

V–

7

8

5

6

05704-001

–60

–140

0.1 101 1000
FREQUENCY ( kHz )

DISTORTION (dBc)

100

VO = 2V p-p

VO = 6V p-p

05704-045

–65
–70
–75
–80
–85
–90

–95
–100
–105
–110
–

115
–120
–125
–130
–135

HD3

HD2

HD3

HD2

FEATURES

Single-ended-to-differential converter
Excellent linearity

Distortion −110 dBc @100 KHz for V
Low noise: 10.2 nV/√Hz, output-referred, G = 2
Extremely low power: 2.2 mA (3 V supply)
High input impedance: 24 MΩ
User-adjustable gain
High speed: 31 MHz, −3 dB bandwidth (G = +2)
Fast settling time: 300 ns to 0.005% for a 2 V step
Low offset: 0.8 mV max, output-referred, G = 2
Rail-to-rail output
Disable feature
Wide supply voltage range: 2.7 V to 12 V
Available in space-saving, 3 mm × 3 mm LFCSP

APPLICATIONS

Single-supply data acquisition systems
Instrumentation
Process control
Battery-power systems
Medical instrumentation

, dm = 2 V p-p

O

Single-Supply, Differential

FUNCTIONAL BLOCK DIAGRAM

Figure 1.SOIC/LSCSP Pinout

GENERAL DESCRIPTION

The ADA4941-1 is a low power, low noise differential driver for
ADCs up to 18 bits in systems that are sensitive to power. The
ADA4941-1 is configured in an easy-to-use, single-ended-to­differential configuration and requires no external components
for a gain of 2 configuration. A resistive feedback network can
be added to achieve gains greater than 2. The ADA4941-1
provides essential benefits, such as low distortion and high
SNR, that are required for driving high resolution ADCs.

With a wide input voltage range (0 V to 3.9 V on a single 5 V
supply), rail-to-rail output, high input impedance, and a user­adjustable gain, the ADA4941-1 is designed to drive single­supply ADCs with differential inputs found in a variety of low
power applications, including battery-operated devices and
single-supply data acquisition systems.

Information furnished by Analog Devices is be lieved to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

The ADA4941-1 is ideal for driving the 16-bit and 18-bit
PulSAR® ADCs such as the AD7687, AD7690, and AD7691.

The ADA4941-1 is manufactured on ADI’s proprietary second­generation XFCB process, which enables the amplifier to
achieve 18-bit performance on low supply currents.

The ADA4941-1 is available in a small 8-lead LFCSP as well as a
standard 8-lead SOIC and is rated to work over the extended
industrial temperature range, −40°C to +125°C.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

Figure 2. Distortion vs. Frequency at Various Output Amplitudes

www.analog.com

ADA4941-1

TABLE OF CONTENTS

Features .............................................................................................. 1

Output Voltage Noise ................................................................. 17

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

Typical Performance Characteristics ............................................. 8

Theory of Operation ...................................................................... 15

Basic Operation .......................................................................... 15

DC Error Calculations ............................................................... 16

REVISION HISTORY

Frequency Response vs. Closed-Loop Gain ........................... 19

Applications ..................................................................................... 20

Overview ..................................................................................... 20

Using the REF Pin ...................................................................... 20

Internal Feedback Network Power Dissipation ...................... 20

Disable Feature ........................................................................... 20

Adding a 3-Pole, Sallen-Key Filter ........................................... 21

Driving the AD7687 ADC ........................................................ 22

Gain of −2 Configuration .......................................................... 22

Outline Dimensions ....................................................................... 23

Ordering Guide .......................................................................... 23

8/11—Rev. B to Rev. C

Change to Gain Error Drift Unit, Table 1...................................... 3

Change to Gain Error Drift Unit, Table 2...................................... 4

Change to Gain Error Drift Unit, Table 3...................................... 5

8/10—Rev. A to Rev. B

Added Caption to Figure 1 .............................................................. 1

Added Exposed Pad Notation to Figure 4 and Table 6 ................ 7

Added Exposed Pad Notation to Outline Dimensions ............. 23

Changes to Ordering Guide .......................................................... 23

3/09—Rev. 0 to Rev. A

Change to Gain Error Drift Parameter, Table 1 ............................ 3

Change to Gain Error Drift Parameter, Table 2 ............................ 4

Change to Gain Error Drift Parameter, Table 3 ............................ 5

Updated Outline Dimensions ....................................................... 23

4/06—Revision 0: Initial Version

Rev. C | Page 2 of 24

ADA4941-1

fC = 100 kHz, VO = 2 V p-p, HD2/HD3

−101/−98

dBc

Enabled, DIS = Low

≤1.0 V

SPECIFICATIONS

TA = 25°C, VS = 3 V, OUT+ connected to FB (G = 2), R

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth VO = 0.1 V p-p 21 30 MHz
VO = 2.0 V p-p 4.6 6.5 MHz
Overdrive Recovery Time +Recover/−Recovery 320/650 ns
Slew Rate VO = 2 V step 22 V/µs
Settling Time 0.005% VO = 2 V p-p step 300 ns

NOISE/DISTORTION PERFORMANCE

Harmonic Distortion fC = 40 kHz, VO = 2 V p-p, HD2/HD3 −116/−112 dBc

fC = 1 MHz, VO = 2 V p-p, HD2/HD3 −75/−71 dBc
RTO Voltage Noise f = 100 kHz 10.2 nV/√Hz
Input Current Noise f = 100 kHz 1.6 pA/√Hz

DC PERFORMANCE

Differential Output Offset Voltage 0.2 0.8 mV
Differential Input Offset Voltage Drift 1.0 µV/°C
Single-Ended Input Offset Voltage Amp A1 or Amp A2 0.1 0.4 mV
Single-Ended Input Offset Voltage Drift 0.3 µV/°C
Input Bias Current IN and REF 3 4.5 µA
Input Offset Current IN and REF 0.1 µA
Gain (+OUT − −OUT)/(IN − REF) 1.98 2.00 2.01 V/V
Gain Error −1 +1 %
Gain Error Drift 1 5 ppm/°C

INPUT CHARACTERISTICS

Input Resistance IN and REF 24 MΩ
Input Capacitance IN and REF 1.4 pF
Input Common-Mode Voltage Range 0.2 1.9 V
Common-Mode Rejection Ratio (CMRR) CMRR = V

OUTPUT CHARACTERISTICS

Output Voltage Swing Each single-ended output, G = 4 ±2.90 ±2.95 V
Output Current 25 mA
Capacitive Load Drive 20% overshoot, VO, dm = 200 mV p-p 20 pF

POWER SUPPLY

Operating Range 2.7 12 V
Quiescent Current 2.2 2.4 mA
Quiescent Current—Disable 10 16 µA
Power Supply Rejection Ratio (PSRR)

+PSRR PSRR = V

−PSRR 86 110 dB

DISABLE

DIS Input Voltage Disabled, DIS = High ≥1.5 V

= 1 kΩ, REF = 1.5 V, unless otherwise noted.

L, dm

OS, dm/VCM

OS, dm

, VREF = VIN, VCM = 0.2 V to 1.9 V, G = 4 81 105 dB

/ΔVS, G = 4 86 100 dB

DIS Input Current Disabled, DIS = High 5.5 8 µA
Enabled, DIS = Low 4 6 µA
Turn-On Time 0.7 µs
Turn-Off Time 30 µs

Rev. C | Page 3 of 24

ADA4941-1

Parameter

Conditions

Min

Typ

Max

Unit

RTO Voltage Noise

f = 100 kHz

10.2 nV/√Hz

Enabled, DIS = Low

4 6

µA

TA = 25°C, VS = 5 V, OUT+ connected to FB (G = 2), R

Table 2.

DYNAMIC PERFORMANCE

−3 dB Bandwidth VO = 0.1 V p-p 22 31 MHz

VO = 2.0 V p-p 4.9 7 MHz

Overdrive Recovery Time +Recover/−Recovery 200/600 ns

Slew Rate VO = 2 V step 24.5 V/µs

Settling Time 0.005% VO = 6 V p-p step 610 ns
NOISE/DISTORTION PERFORMANCE

Harmonic Distortion fC = 40 kHz, VO = 2 V p-p, HD2/HD3 −118/−119 dBc

fC = 100 kHz, VO = 2 V p-p, HD2/HD3 −110/−112 dBc

fC = 1 MHz, VO = 2 V p-p, HD2/HD3 −83/−73 dBc

Input Current Noise f = 100 kHz 1.6 pA/√Hz
DC PERFORMANCE

Differential Output Offset Voltage 0.2 0.8 mV

Differential Input Offset Voltage Drift 1.0 µV/°C

Single-Ended Input Offset Voltage Amp A1 or Amp A2 0.1 0.4 mV

Single-Ended Input Offset Voltage Drift 0.3 µV/°C

Input Bias Current IN and REF 3 4.5 µA

Input Offset Current IN and REF 0.1 µA

Gain (+OUT − −OUT)/(IN − REF) 1.98 2 2.01 V/V

Gain Error −1 +1 %

Gain Error Drift 1 5 ppm/°C
INPUT CHARACTERISTICS

Input Resistance IN and REF 24 MΩ

Input Capacitance IN and REF 1.4 pF

Input Common-Mode Voltage Range 0.2 3.9 V

Common-Mode Rejection Ratio (CMRR) C MRR = V
OUTPUT CHARACTERISTICS

Output Voltage Swing Each single-ended output, G = 4 ±4.85 ±4.93 V

Output Current 25 mA

Capacitive Load Drive 20% overshoot, VO, dm = 200 mV p-p 20 pF
POWER SUPPLY

Operating Range 2.7 12 V

Quiescent Current 2.3 2.6 mA

Quiescent Current—Disable 12 20 µA

Power Supply Rejection Ratio (PSRR)

+PSRR PSRR = V

−PSRR 87 110 dB

DISABLE

DIS Input Voltage Disabled, DIS = High ≥1.5 V

Enabled, DIS = Low ≤1.0 V

DIS Input Current Disabled, DIS = High 5.5 8 µA

= 1 kΩ, REF = 2.5 V, unless otherwise noted.

L, dm

OS, dm/VCM

OS, dm

, VREF = VIN, VCM = 0.2 V to 3.9 V, G = 4 84 106 dB

/ΔVS, G = 4 87 100 dB

Turn-On Time 0.7 µs

Turn-Off Time 30 µs

Rev. C | Page 4 of 24

ADA4941-1

Parameter

Conditions

Min

Typ

Max

Unit

RTO Voltage Noise

f = 100 kHz

10.2 nV/√Hz

Enabled, DIS = Low

≤ −4

V

TA = 25°C, VS = ±5 V, OUT+ connected to FB (G = 2), R

Table 3.

DYNAMIC PERFORMANCE

−3 dB Bandwidth VO = 0.1 V p-p 23 32 MHz
VO = 2.0 V p-p 5.2 7.5 MHz
Overdrive Recovery Time +Recover/−Recovery 200/650 ns
Slew Rate VO = 2 V step 26 V/µs
Settling Time 0.005% VO = 12 V p-p step 980 ns

NOISE/DISTORTION PERFORMANCE

Harmonic Distortion fC = 40 kHz, VO = 2 V p-p, HD2/HD3 −118/−119 dBc
fC = 100 kHz, VO = 2 V p-p, HD2/HD3 −109/−112 dBc
fC = 1 MHz, VO = 2 V p-p, HD2/HD3 −84/−75 dBc

Input Current Noise f = 100 kHz 1.6 pA/√Hz

DC PERFORMANCE

Differential Output Offset Voltage 0.2 0.8 mV
Differential Input Offset Voltage Drift 1.0 µV/°C
Single-Ended Input Offset Voltage Amp A1 or Amp A2 0.1 0.4 mV
Single-Ended Input Offset Voltage Drift 0.3 µV/°C
Input Bias Current IN and REF 3 4.5 µA
Input Offset Current IN and REF 0.1 µA
Gain (+OUT − −OUT)/(IN − REF) 1.98 2 2.01 V/V
Gain Error −1 +1 %
Gain Error Drift 1 5 ppm/°C

INPUT CHARACTERISTICS

Input Resistance IN and REF 24 MΩ
Input Capacitance IN and REF 1.4 pF
Input Common-Mode Voltage Range −4.8 +3.9 V
Common-Mode Rejection Ratio (CMRR) CMRR = V

V

CM

OUTPUT CHARACTERISTICS

Output Voltage Swing Each single-ended output, G = 4 VS − 0.25 VS ± 0.14 V
Output Current 25 mA
Capacitive Load Drive 20% overshoot, VO, dm = 200 mV p-p 20 pF

POWER SUPPLY

Operating Range 2.7 12 V
Quiescent Current 2.5 2.7 mA
Quiescent Current—Disable 15 26 µA
Power Supply Rejection Ratio (PSRR)

+PSRR PSRR = V

−PSRR 87 110 dB

DISABLE

DIS Input Voltage Disabled, DIS = High ≥ −3 V

= 1 kΩ, REF = 0 V, unless otherwise noted.

L, dm

OS, dm/VCM

, VREF = VIN,

= −4.8 V to +3.9 V, G = 4

/ΔVS, G = 4 87 100 dB

OS, dm

85 105 dB

DIS Input Current Disabled, DIS = High 7 10 µA
Enabled, DIS = Low 4 6 µA
Turn-On Time 0.7 µs
Turn-Off Time 30 µs

Rev. C | Page 5 of 24

ADA4941-1

2.5

0

–40 120

AMBIENT T E M P E RATURE (°C)

MAXIMUM POWER DISSIPATION (W)

2.0

1.5

1.0

0.5

–20 0 20 40 60 80 100

LFCSP

SOIC

05704-002

human body and test equipment and can discharge without detection. Although this product features

subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

Supply Voltage 12 V
Power Dissipation See Figure 3
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, θJA is
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad (if applicable) on the PCB
surface that is thermally connected to a copper plane, with zero
airflow.

Table 5. Thermal Resistance

Package Type θJA θJC Unit

8-Lead SOIC on 4-Layer Board 126 28
8-Lead LFCSP with EP on 4-Layer Board 83 19

Maximum Power Dissipation

The maximum safe power dissipation in the ADA4941-1
package is limited by the associated rise in junction temperature
(T

) on the die. At approximately 150°C, which is the glass

J

transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4941-1. Exceeding a
junction temperature of 150°C for an extended period can
result in changes in the silicon devices potentially causing
failure.

°C/W
°C/W

The power dissipated in the package (P

) is the sum of the

D

quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I

). The power dissipated due to the load

S

) times the

S

drive depends upon the particular application. For each output,
the power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipation due to each individual load. RMS voltages
and currents must be used in these calculations.

Airflow increases heat dissipation, effectively reducing θ

JA

. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ

. The exposed paddle on the underside of the

JA

package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θ

.

JA

Figure 3 shows the maximum safe power dissipation in the
packages vs. the ambient temperature for the 8-lead SOIC
(126°C/W) and for the 8-lead LFCSP (83°C/W) on a JEDEC
standard 4-layer board. The LFCSP must have its underside
paddle soldered to a pad that is thermally connected to a PCB
plane. θ

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

values are approximations.

JA

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the
proprietary ESD protection circuitry, permanent damage may occur on devices

degradation or loss of functionality.

Rev. C | Page 6 of 24

ADA4941-1

DIS

4

3

2

1

IN

OUT–OUT+

NOTES

1. THE EXPOSED PAD IS NOT ELECTRICALLY CONNECTED TO THE DEVICE.
IT IS TYPICALLY SOLDERED TO G ROUND OR A POWER PLANE ON THE PCB
THAT IS THERMALLY CONDUCTIVE.

V+

REF

FB

V–

7

8

5

6

05704-101

4

OUT+

Noninverting Output

5

OUT−

Inverting Output

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description

1 FB Feedback Input
2 REF Reference Input
3 V+ Positive Power Supply

6 V− Negative Power Supply
7 DIS Disable
8 IN Input
EP (For LFCSP Only) Exposed Paddle. The exposed pad is not electrically connected to

the device. It is typically soldered to ground or a power plane on the
PCB that is thermally conductive.

Rev. C | Page 7 of 24

ADA4941-1

2

–16

–15

–14

–13

–12

1 1000

FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

1

0
–1
–2
–3

–11

–4
–5

–6
–7
–8
–9

–10

10 100

V

O, dm

= 0.1V p-p

VS = +3V

VS = +5V

V

S

= ±5V

05704-004

2

–16

–15

–14

–13

–12

1 1000

FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

1

0
–1
–2
–3

–11

–4
–5

–6
–7
–8
–9

–10

10 100

+25°C

–40°C

+85°C

V

O, dm

= 0.1V p-p

05704-005

2

–15

1 1000

FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

10 100

R

L, dm

= 1kΩ

R

L, dm

= 5kΩ

R

L, dm

= 500Ω

1

0
–1
–2
–3
–4
–5
–6
–7
–8
–9

–10
–11
–12
–13
–14

V

O, dm

= 0.1V p-p

05704-006

2

–16

–15

–14

–13

–12

0.1 100
FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

1

0
–1
–2
–3

–11

–4
–5

–6
–7
–8
–9

–10

1 10

VS = +3V
V

O, dm

= 2V p-p

VS = +5V

V

O, dm

= 6V p-p

VS = ±5V
V

O, dm

= 12V p-p

05704-007

2

–16

–15

–14

–13

–12

0.1 100
FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

1

0
–1
–2
–3

–11

–4
–5

–6
–7
–8
–9

–10

1 10

+25°C

–40°C

+85°C

V

O, dm

= 6V p-p

05704-008

2

–16

0.1 10
FREQUENCY (MHz)

NORMALIZED CLOSED-LOOP GAIN (dB)

R

L, dm

= 1kΩ

R

L, dm

= 5kΩ

R

L, dm

= 500Ω

V

O, dm

= 6V p-p

1

0
–1
–2
–3
–4
–5
–6
–7
–8
–9

–10
–11
–12
–13
–14
–15

1

05704-009

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, VS = 5 V, R

= 1 kΩ, REF = 2.5 V, DIS = LOW, OUT+ directly connected to FB (G = 2), TA = 25°C.

L, dm

Figure 5. Small Signal Frequency Response for Various Power Supplies

Figure 6. Small Signal Frequency Response at Various Temperatures

Figure 8. Large Signal Frequency Response for Various Power Supplies

Figure 9. Large Signal Frequency Response at Various Temperatures

Figure 7. Small Signal Frequency Response for Various Resistive Loads

Figure 10. Large Signal Frequency Response for Various Resistive Loads

Rev. C | Page 8 of 24