ANALOG DEVICES AD8031 Service Manual

2.7 V, 800 μA, 80 MHz

–

V

V

FEATURES

Low power

Supply current 800 μA/amplifier
Fully specified at +2.7 V, +5 V, and ±5 V supplies

High speed and fast settling on 5 V

80 MHz, −3 dB bandwidth (G = +1)
30 V/μs slew rate
125 ns settling time to 0.1%

Rail-to-rail input and output

No phase reversal with input 0.5 V beyond supplies
Input CMVR extends beyond rails by 200 mV
Output swing to within 20 mV of either rail

Low distortion

−62 dB @ 1 MHz, V

−86 dB @ 100 kHz, V
Output current: 15 mA
High grade option: VOS (maximum) = 1.5 mV

APPLICATIONS

High speed, battery-operated systems
High component density systems
Portable test instruments
A/D buffers
Active filters
High speed, set-and-demand amplifiers

GENERAL DESCRIPTION

= 2 V p-p

O

= 4.6 V p-p

O

Rail-to-Rail I/O Amplifiers

AD8031/AD8032

CONNECTION DIAGRAMS

1

NC

–IN

+IN

V

–

2

+

3

4

AD8031

S

NC = NO CONNECT

Figure 1. 8-Lead PDIP (N) and

SOIC_N (R)

OUT

–V

+IN

NC

8

7

6

5

+V

OUT

NC

OUT1

–IN1

S

+IN1

–V

S

01056-001

Figure 2. 8-Lead PDIP (N),

SOIC_N (R), and MSOP (RM)

AD8031

1

2

S

3

–

+

Figure 3. 5-Lead SOT-23 (RJ-5)

Operating on supplies from +2.7 V to +12 V and dual supplies
up to ±6 V, the AD8031/AD8032 are ideal for a wide range of
applications, from battery-operated systems with large bandwidth
requirements to high speed systems where component density
requires lower power dissipation. The AD8031/AD8032 are
available in 8-lead PDIP and 8-lead SOIC_N packages and
operate over the industrial temperature range of −40°C to
+85°C. The AD8031A is also available in the space-saving
5-lead SOT-23 package, and the AD8032A is available in an
8-lead MSOP package.

VIN=4.85Vp-p

AD8032

1

2

3

4

+V

5

S

–IN

4

+–

+–

01056-003

8

+V

S

7

OUT2

6

–IN2

5

+IN2

01056-002

V

=4.65Vp-p

OUT

G=+1

The AD8031 (single) and AD8032 (dual) single-supply, voltage
feedback amplifiers feature high speed performance with
80 MHz of small signal bandwidth, 30 V/µs slew rate, and 125 ns
settling time. This performance is possible while consuming less
than 4.0 mW of power from a single 5 V supply. These features
increase the operation time of high speed, battery-powered
systems without compromising dynamic performance.

The products have true single-supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V, +5 V,
and ±5 V supplies. The input voltage range can extend to 500 mV
beyond each rail. The output voltage swings to within 20 mV of
each rail providing the maximum output dynamic range.

The AD8031/AD8032 also offer excellent signal quality for only
800 µA of supply current per amplifier; THD is −62 dBc with a
2 V p-p, 1 MHz output signal, and –86 dBc for a 100 kHz,

4.6 V p-p signal on +5 V supply. The low distortion and fast
settling time make them ideal as buffers to single-supply ADCs.

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

1V/DIV

2µs/DIV

1V/DI

01056-004

2µs/DIV

Figure 4. Input VIN Figure 5. Output V

+5V

–

V

IN

+

1kΩ 1.7pF

V

OUT

+2.5V

Figure 6. Rail-to-Rail Performance at 100 kHz

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.

01056-005

OUT

01056-006

AD8031/AD8032

TABLE OF CONTENTS

Features .............................................................................................. 1

Theory of Operation ...................................................................... 13

Applications ....................................................................................... 1

General Description ......................................................................... 1

Connection Diagrams ...................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

+2.7 V Supply ................................................................................ 3

+5 V Supply ................................................................................... 4

±5 V Supply ................................................................................... 5

Absolute Maximum Ratings ............................................................ 6

Maximum Power Dissipation ..................................................... 6

ESD Caution .................................................................................. 6

Typical Performance Characteristics ............................................. 7

REVISION HISTORY

Input Stage Operation ................................................................ 13

Overdriving the Input Stage ...................................................... 13

Output Stage, Open-Loop Gain and Distortion vs. Clearance

from Power Supply ..................................................................... 14

Output Overdrive Recovery ...................................................... 14

Driving Capacitive Loads .......................................................... 15

Applications ..................................................................................... 16

A 2 MHz Single-Supply, Biquad Band-Pass Filter ................. 16

High Performance, Single-Supply Line Driver........................... 16

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 20

11/08—Rev. C to Rev. D

Change to Table 3 Column Heading .............................................. 5

Change to Ordering Guide ............................................................ 20

7/06—Rev. B to Rev. C

Updated Format .................................................................. Universal

Updated Outline Dimensions ....................................................... 18

Change to Ordering Guide ............................................................ 20

9/99—Rev. A to Rev. B

Rev. D | Page 2 of 20

AD8031/AD8032

SPECIFICATIONS

+2.7 V SUPPLY

@ TA = 25°C, VS = 2.7 V, RL = 1 k to 1.35 V, RF = 2.5 k, unless otherwise noted.

Table 1.

AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

–3 dB Small Signal Bandwidth G = +1, VO < 0.4 V p-p 54 80 54 80 MHz
Slew Rate G = −1, VO = 2 V step 25 30 25 30 V/µs
Settling Time to 0.1% G = −1, VO = 2 V step, CL = 10 pF 125 125 ns

DISTORTION/NOISE PERFORMANCE

Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
f
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 2.4 2.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB

DC PERFORMANCE

Input Offset Voltage VCM = VCC/2; V
T
Offset Drift VCM = VCC/2; V
Input Bias Current VCM = VCC/2; V
T
Input Offset Current 50 500 50 500 nA

Open-Loop Gain VCM = VCC/2; V
T
INPUT CHARACTERISTICS

Common-Mode Input Resistance 40 40 MΩ

Differential Input Resistance 280 280 kΩ

Input Capacitance 1.6 1.6 pF

Input Voltage Range

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio VCM = 0 V to 2.7 V 46 64 46 64 dB
V

Differential Input Voltage 3.4 3.4 V
OUTPUT CHARACTERISTICS

Output Voltage Swing Low RL = 10 kΩ 0.05 0.02 0.05 0.02 V

Output Voltage Swing High 2.6 2.68 2.6 2.68 V

Output Voltage Swing Low RL = 1 kΩ 0.15 0.08 0.15 0.08 V

Output Voltage Swing High 2.55 2.6 2.55 2.6 V

Output Current 15 15 mA

Short Circuit Current Sourcing 21 21 mA

Sinking −34 −34 mA

Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF
POWER SUPPLY

Operating Range 2.7 12 2.7 12 V

Quiescent Current per Amplifier 750 1250 750 1250 A

Power Supply Rejection Ratio

= 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc

C

= 135 V ±1 ±6 ±0.5 ±1.5 mV

OUT

to T

MIN

MIN

MIN

CM

− = 0 V to −1 V or

V

S

+ = +2.7 V to +3.7 V

V

S

±6 ±10 ±1.6 ±2.5 mV

MAX

= 135 V 10 10 µV/°C

OUT

= 135 V 0.45 2 0.45 2 µA

OUT

to T

2.2 2.2 µA

MAX

= 0.35 V to 2.35 V 76 80 76 80 dB

OUT

to T

74 74 dB

MAX

−0.5 to
+3.2

−0.2 to
+2.9

−0.5 to
+3.2

−0.2 to
+2.9

V

V

= 0 V to 1.55 V 58 74 58 74 dB

75 86 75 86 dB

Rev. D | Page 3 of 20

AD8031/AD8032

+5 V SUPPLY

= 25°C, VS = 5 V, RL = 1 k to 2.5 V, RF = 2.5 kΩ, unless otherwise noted.

@ T

A

Table 2.

AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth G = +1, VO < 0.4 V p-p 54 80 54 80 MHz
Slew Rate G = −1, VO = 2 V step 27 32 27 32 V/µs
Settling Time to 0.1% G = −1, VO = 2 V step, CL = 10 pF 125 125 ns

DISTORTION/NOISE PERFORMANCE

Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
f
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 2.4 2.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Differential Gain RL = 1 kΩ 0.17 0.17 %
Differential Phase RL = 1 kΩ 0.11 0.11 Degrees
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB

DC PERFORMANCE

Input Offset Voltage VCM = VCC/2; V
T
Offset Drift VCM = VCC/2; V
Input Bias Current VCM = VCC/2; V
T
Input Offset Current 50 350 50 250 nA

Open-Loop Gain VCM = VCC/2; V
T
INPUT CHARACTERISTICS

Common-Mode Input Resistance 40 40 MΩ

Differential Input Resistance 280 280 kΩ

Input Capacitance 1.6 1.6 pF

Input Voltage Range

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio VCM = 0 V to 5 V 56 70 56 70 dB

V

Differential Input Voltage 3.4 3.4 V
OUTPUT CHARACTERISTICS

Output Voltage Swing Low RL = 10 kΩ 0.05 0.02 0.05 0.02 V

Output Voltage Swing High 4.95 4.98 4.95 4.98 V

Output Voltage Swing Low RL = 1 kΩ 0.2 0.1 0.2 0.1 V

Output Voltage Swing High 4.8 4.9 4.8 4.9 V

Output Current 15 15 mA

Short Circuit Current Sourcing 28 28 mA

Sinking −46 −46 mA

Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF
POWER SUPPLY

Operating Range 2.7 12 2.7 12 V

Quiescent Current per Amplifier 800 1400 800 1400 µA

Power Supply Rejection Ratio

= 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc

C

= 2.5 V ±1 ±6 ±0.5 ±1.5 mV

OUT

to T

MIN

MIN

MIN

CM

− = 0 V to −1 V or

V

S

+ = +5 V to +6 V

V

S

±6 ±10 ±1.6 ±2.5 mV

MAX

= 2.5 V 5 5 µV/°C

OUT

= 2.5 V 0.45 1.2 0.45 1.2 µA

OUT

to T

2.0 2.0 µA

MAX

= 1.5 V to 3.5 V 76 82 76 82 dB

OUT

to T

74 74 dB

MAX

−0.5 to
+5.5

−0.2 to
+5.2

−0.5 to
+5.5

−0.2 to
+5.2

V

V

= 0 V to 3.8 V 66 80 66 80 dB

75 86 75 86 dB

Rev. D | Page 4 of 20

AD8031/AD8032

±5 V SUPPLY

= 25°C, VS = ±5 V, RL = 1 kΩ to 0 V, RF = 2.5 kΩ, unless otherwise noted.

@ T

A

Table 3.

AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth G = +1, VO < 0.4 V p-p 54 80 54 80 MHz
Slew Rate G = −1, VO = 2 V step 30 35 30 35 V/µs
Settling Time to 0.1% G = −1, VO = 2 V step, CL = 10 pF 125 125 ns

DISTORTION/NOISE PERFORMANCE

Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
f
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 2.4 2.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Differential Gain RL = 1 kΩ 0.15 0.15 %
Differential Phase RL = 1 kΩ 0.15 0.15 Degrees
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB

DC PERFORMANCE

Input Offset Voltage VCM = 0 V; V
T
Offset Drift VCM = 0 V; V
Input Bias Current VCM = 0 V; V
T
Input Offset Current 50 350 50 250 nA
Open-Loop Gain VCM = 0 V; V
T

INPUT CHARACTERISTICS

Common-Mode Input Resistance 40 40 MΩ
Differential Input Resistance 280 280 kΩ
Input Capacitance 1.6 1.6 pF
Input Voltage Range

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio VCM = −5 V to +5 V 60 80 60 80 dB
V
Differential/Input Voltage 3.4 3.4 V

OUTPUT CHARACTERISTICS

Output Voltage Swing Low RL = 10 kΩ −4.94 −4.98 −4.94 −4.98 V
Output Voltage Swing High +4.94 +4.98 +4.94 +4.98 V
Output Voltage Swing Low RL = 1 kΩ −4.7 −4.85 −4.7 −4.85 V
Output Voltage Swing High +4.7 +4.75 +4.7 +4.75 V
Output Current 15 15 mA
Short Circuit Current Sourcing 35 35 mA
Sinking −50 −50 mA
Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF

POWER SUPPLY

Operating Range ±1.35 ±6 ±1.35 ±6 V
Quiescent Current per Amplifier 900 1600 900 1600 µA
Power Supply Rejection Ratio

= 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc

C

= 0 V ±1 ±6 ±0.5 ±1.5 mV

OUT

to T

MIN

MIN

MIN

CM

− = −5 V to −6 V or

V

S

+ = +5 V to +6 V

V

S

±6 ±10 ±1.6 ±2.5 mV

MAX

= 0 V 5 5 µV/°C

OUT

= 0 V 0.45 1.2 0.45 1.2 µA

OUT

to T

2.0 2.0 µA

MAX

= ±2 V 76 80 76 80 dB

OUT

to T

74 74 dB

MAX

−5.5 to
+5.5

−5.2 to
+5.2

−5.5 to
+5.5

−5.2 to
+5.2

V

V

= −5 V to +3.5 V 66 90 66 90 dB

76 86 76 86 dB

Rev. D | Page 5 of 20

AD8031/AD8032

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

Supply Voltage 12.6 V
Internal Power Dissipation1

8-Lead PDIP (N) 1.3 W

8-Lead SOIC_N (R) 0.8 W

8-Lead MSOP (RM) 0.6 W

5-Lead SOT-23 (RJ) 0.5 W
Input Voltage (Common Mode) ±VS ± 0.5 V
Differential Input Voltage ±3.4 V
Output Short-Circuit Duration

Observe Power

Derating Curves
Storage Temperature Range (N, R, RM, RJ) −65°C to +125°C
Lead Temperature (Soldering 10 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
AD8031/AD8032 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.

While the AD8031/AD8032 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 7.

2.0

1.5

8-LEAD PDIP

8-LEAD SOIC

TJ = +150°C

1

Specification is for the device in free air:

8-Lead PDIP: θJA = 90°C/W.
8-Lead SOIC_N: θJA = 155°C/W.
8-Lead MSOP: θJA = 200°C/W.
5-Lead SOT-23: θJA = 240°C/W.

MAXIMUM POW ER DISSIPAT ION (W)

8-LEAD MSOP

1.0

0.5

0

–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90

Figure 7. Maximum Power Dissipation vs. Temperature

5-LEAD SOT-23

AMBIENT TEMPERATURE (°C)

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

01056-007

Rev. D | Page 6 of 20

AD8031/AD8032

TYPICAL PERFORMANCE CHARACTERISTICS

90

80

70

60

50

40

30

NUMBER OF PARTS IN BIN

20

10

0

–5–4–3–2–1012345

V

(mV)

OS

N = 250

Figure 8. Typical VOS Distribution @ VS = 5 V

2.5

2.3

01056-008

800

600

400

200

0

–200

–400

INPUT BIAS CURRENT (nA)

–600

–800

012345678910

VS=2.7V

VS=5V

COMMON-MO DE VOLT AGE (V)

=10V

V

S

Figure 11. Input Bias Current vs. Common-Mode Voltage

0

–0.1

VS=5V

01056-011

2.1

1.9

OFFSET VOLTAGE (mV)

1.7

1.5
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90

=+5V

V

S

VS=±5V

TEMPERATURE (°C)

Figure 9. Input Offset Voltage vs. Temperature

1.00

0.95

0.90

0.85

0.80

0.75

0.70

INPUT BIAS (µ A)

0.65

0.60

0.55

0.50
–30

–40 –20–100 1020304050607080 90

TEMPERATURE (°C)

VS=5V

Figure 10. Input Bias Current vs. Temperature

–0.2

–0.3

–0.4

OFFSET VO LTAGE (mV)

–0.5

–0.6

01056-009

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

COMMON-MODE VOLTAGE (V)

01056-012

Figure 12. VOS vs. Common-Mode Voltage

1000

±I

=±5V

950

900

850

800

750

700

SUPPLY CURRENT/AMPLIFIER (µA)

650

600

01056-010

–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90

S,VS

=+5V

+I

S,VS

= +2.7V

+I

S,VS

TEMPERATURE (°C)

01056-013

Figure 13. Supply Current vs. Temperature

Rev. D | Page 7 of 20

AD8031/AD8032

0

VCC=2.7V

–0.5

(V)

CC

–1.0

–1.5

V

CC

DIFFERENCE F ROM V

–2.0

–2.5

100 1k 10k

Figure 14. +Output Saturation Voltage vs. R

= 10V

=5V

V

CC

V

CC

V

IN

V

EE

V

CC

2

R

(Ω)

LOAD

LOAD

0

VCC=2.7V

–0.5

(V)

CC

–1.0

–1.5

DIFFERENCE F ROM V

–2.0

–2.5

100 1k 10k

Figure 15. +Output Saturation Voltage vs. R

VCC=5V

VCC=10V

R

LOAD

V

CC

V

IN

V

EE

V

CC

2

(Ω)

LOAD

0

VCC=2.7V

–0.5

(V)

CC

VCC= 10V

VCC=5V

R

LOAD

V

CC

V

IN

V

EE

V

CC

2

(Ω)

LOAD

–1.0

–1.5

DIFFERENCE F ROM V

–2.0

–2.5

100 1k 10k

Figure 16. +Output Saturation Voltage vs. R

V

OUT

R

LOAD

@ +85°C

V

OUT

R

LOAD

@ +25°C

V

OUT

R

LOAD

@ −40°C

01056-014

01056-015

01056-016

1.2

1.0

(V)

EE

VCC=10V

0.8

V

IN

0.6

VCC=5V

0.4

DIFFERENCE F ROM V

0.2

VCC=2.7V

0
100 10k1k

R

LOAD

(Ω)

Figure 17. −Output Saturation Voltage vs. R

1.2

1.0

(V)

VCC= 10V

EE

0.8

V

IN

0.6

VCC=5V

0.4

DIFFERENCE F ROM V

0.2

VCC=2.7V

0
100 10k1k

R

LOAD

(Ω)

Figure 18. −Output Saturation Voltage vs. R

1.2

1.0

(V)

VCC= 10V

EE

0.8

V

IN

0.6

VCC=5V

0.4

DIFFERENCE F ROM V

0.2

VCC=2.7V
0
100 10k1k

R

LOAD

(Ω)

Figure 19. −Output Saturation Voltage vs. R

V

CC

V

OUT

R

V

V

V

V

V

LOAD

EE

V

CC

2

01056-017

@ +85°C

LOAD

CC

V

OUT

R

LOAD

EE

V

CC

2

01056-018

@ +25°C

LOAD

CC

V

OUT

R

LOAD

EE

V

CC

2

01056-019

@ −40°C

LOAD

Rev. D | Page 8 of 20

AD8031/AD8032

110

105

100

95

90

85

GAIN (dB)

80

75

70

65

60

0 2k4k6k8k10k

–A

OL

R

LOAD

Figure 20. Open-Loop Gain (AOL) vs. R

86

84

82

GAIN (dB)

80

78

76

–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90

TEMPERATURE (°C)

Figure 21. Open Loop Gain vs. (AOL) Temperature

110

R

= 10kΩ

100

90

(dB)

80

OL

A

70

60

LOAD

R

LOAD

=1kΩ

V

=5V

S

100

90

10

+A

OL

(Ω)

LOAD

01056-020

0

10

–10

INPUT BIAS CURRENT (mA)

0%

–1.5 0.5 2.5 4.5 6.5

Figure 23. Differential Input Overvoltage I-V Characteristics

VS=5V

=1kΩ

R

L

–A

OL

+A

OL

01056-021

0.05

0

–0.05

–0.10

DIFF GAIN (%)

–0.15

1ST 2ND 3RD 4TH 5TH 6T H 7TH 8T H 9TH 10TH 11TH

0.10

0.05

0

–0.05

–0.10

DIFF PHASE (Degrees)

1ST 2ND 3RD 4TH 5TH 6T H 7TH 8T H 9TH 10TH 11TH

Figure 24. Differential Gain and Phase @ V

100

VS=5V

30

10

3

1

INPUT VOLTAGE NOISE (nV/ Hz)

500mV 1V

500mV

INPUT VOLTAGE (V)

VOLTAGE NOISE

CURRENT NOISE

VS=5V

= ±5 V; RL = 1 kΩ

S

VS=5V

100

10

1

0.1

01056-023

01056-024

INPUT CURRENT NOI SE (pA/ Hz)

50

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

V

(V)

OUT

Figure 22. Open-Loop Gain (AOL) vs. V

OUT

01056-022

Rev. D | Page 9 of 20

0.3
10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 25. Input Voltage Noise vs. Frequency

1056-025

AD8031/AD8032

–

–

5

1001010.3

=2.7V

S

1V p-p

40

30

20

10

0

–10

–20

10M

OPEN-LOOPGAIN (dB)

01056-029

01056-030

1056-031

4

3

2

1

0

–1

–2

NORMALIZE D GAIN (dB)

–3

–4

–5

0.1 1 10 100

FREQUENCY (MHz)

VS=5V
G=+1

=1kΩ

R

L

Figure 26. Unity Gain, −3 dB Bandwidth

3

2

1

0

–1

–2

NORMALIZE D GAIN (dB)

–3

–4

–5

VS = 5V

= –16dBm

V

IN

V

S

2kΩ

V

IN

0.1 1 10 100

50Ω

FREQUENCY (MHz )

+85°C

+25°C

V

OUT

–40°C

Figure 27. Closed-Loop Gain vs. Temperature

2

1

0

–1

–2

–3

–4

–5

CLOSED-LOOP GAIN (dB)

–6

–7

–8

100k 10M 100M

VS= +2.7V

R

L+CL

G=+1

=5pF

C

L

=1kΩ

R

L

1M

FREQUE NCY ( Hz)

TO 1.35V

VS=±5V

Figure 28. Closed-Loop Gain vs. Supply Voltage

VS=+5V
R

L+CL

TO 2. 5V

GAIN

–90

–135

–180

–225

PHASE (Degrees)

01056-026

PHASE

FREQUENCY ( MHz)

Figure 29. Open-Loop Frequency Response

20

–30

G=+1,RL=2kΩ TO

–40

–50

–60

–70

TOTAL HARMONIC DIST ORTION ( dBc)

–80

1k 10k 100k 1M

01056-027

V

CC

2

1.3V p- p
=2.7V

V

2.5V p- p
=2.7V

V

S

FUNDAMENTAL FREQUENCY (Hz)

S

4.8V p- p
=5V

V

S

2V p-p
V

Figure 30. Total Harmonic Distortion vs. Frequency; G = +1

20

–30

G=+2

=5V

V

–40

–50

–60

–70

–80

–90

TOTAL HARMO NIC DISTO RTION (d Bc)

–100

01056-028

S

R

L

1k 10k 100k 1M 10M

V

=1kΩ TO

CC

2

4.8V p- p

4.6V p- p

FUNDAMENTAL FREQUENCY (Hz)

4V p-p

Figure 31. Total Harmonic Distortion vs. Frequency; G +2

Rev. D | Page 10 of 20

AD8031/AD8032

10

8

6

4

OUTPUT (V p-p)

2

0

1k 10k 100k 1M 10M

V

=±5V

S

V

=+5V

S

=+2.7V

V

S

FREQUENCY (Hz)

Figure 32. Large Signal Response

100

(Ω)

R

50

10

OUT

1

0.1

RBT=50Ω

RBT=0Ω

RB

T

1056-032

V

OUT

0

–20

–40

–60

–80

–100

POWER SUPPL Y REJECTIO N RATIO (d B)

–120

100 1k 10k 100k 1M 10M 100M

V

=5V

S

FREQUENCY (Hz)

Figure 35. PSRR vs. Frequency

VS=5V

= 10kΩ TO 2.5V

R

L

=6Vp-p

V

IN

G=+1

1V/DIV

5.5

4.5

3.5

2.5

1.5

0.5

–0.5

1056-035

0.1 1 10 100 200

FREQUENCY (MHz)

Figure 33. R

vs. Frequency

OUT

0

–20

–40

–60

–80

COMMON-MO DE REJECTION RATIO (dB)

–100

100 1k 10k 100k 1M 10M

V

=5V

S

FREQUENCY (Hz)

Figure 34. CMRR vs. Frequency

1056-033

10µs/DIV

01056-036

Figure 36. Output Voltage

=5V

V

10µs/DIV

S

G=+1
INPUT = 650mV
BEYOND RAILS

01056-037

INPUT

5.5

4.5

3.5

2.5

1V/DIV

1.5

0.5

–0.5

1056-034

Figure 37. Output Voltage Phase Reversal Behavior

Rev. D | Page 11 of 20

AD8031/AD8032

V

V

V

d

50ns/DIV

1kΩ

G=+1
R

=0Ω

F

R

=2kΩ TO 2.5V

L

C

= 5pF TO 2. 5V

L

V

=5V

S

VS=±2.5V
V

=+10dBm

IN

2.5kΩ 2.5kΩ

50Ω

01056-041

V

OUT

200

0011.0

01056-042

R

TO

L

+2.5V

500mV/DIV

VS=+5V
R

=1kΩ

L

RLTO GND

0

10µs/DIV

G=–1

01056-038

Figure 38. Output Swing

2.56

2.54

2.52

2.50

20mV/DI

2.48

2.46

2.44

Figure 41. 100 mV Step Response

B)

CROSSTALK(

–50

–60

–70

–80

–90

–100

2.5kΩ

2.5kΩ

V

IN

50Ω

TRANSMITT ER RECEIVER

0.1 1 10 100 200

110

FREQUENCY ( MHz)

Figure 42. Crosstalk vs. Frequency

G=+2

=2.5kΩ

R

F=RG

=2kΩ

R

3.1

2.9

2.7

2.5

200mV/DI

2.3

2.1

1.9

50ns/DIV

C
V

L

=5pF

L

=5V

S

1056-039

Figure 39. 1 V Step Response

VS = 2.7V
R

= 1kΩ

L

10µs/DIV

G = –1

1056-040

2.85

2.35

1.85

1.35

500mV/DI

0.85

0.35

RL TO

1.35V

R

TO GND

L

Figure 40. Output Swing

Rev. D | Page 12 of 20

AD8031/AD8032

V

THEORY OF OPERATION

The AD8031/AD8032 are single and dual versions of high
speed, low power, voltage feedback amplifiers featuring an
innovative architecture that maximizes the dynamic range
capability on the inputs and outputs. The linear input common­mode range exceeds either supply voltage by 200 mV, and the
amplifiers show no phase reversal up to 500 mV beyond supply.
The output swings to within 20 mV of either supply when
driving a light load; 300 mV when driving up to 5 mA.

Fabricated on Analog Devices, Inc. eXtra Fast Complementary
Bipolar (XFCB) process, the amplifier provides an impressive
80 Hz bandwidth when used as a follower and a 30 V/µs slew
rate at only 800 µA supply current. Careful design allows the
amplifier to operate with a supply voltage as low as 2.7 V.

INPUT STAGE OPERATION

A simplified schematic of the input stage appears in Figure 43.
For common-mode voltages up to 1.1 V within the positive
supply (0 V to 3.9 V on a single 5 V supply), tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair, Q2 and Q3. As the common-mode voltage is driven within

1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the input current of the amplifier changes
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance, which
determines the gain and bandwidth of the amplifier, in both
regions of operation.

Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the amplifier
to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage also changes to reflect the offset of the
input pair in control. The transition region is small, approximately
180 mV. These sudden changes in the dc parameters of the
input stage can produce glitches that adversely affect distortion.

OVERDRIVING THE INPUT STAGE

Sustained input differential voltages greater than 3.4 V should
be avoided as the input transistors can be damaged. Input clamp
diodes are recommended if the possibility of this condition
exists.

The voltages at the collectors of the input pairs are set to
200 mV from the power supply rails. This allows the amplifier
to remain in linear operation for input voltages up to 500 mV
beyond the supply voltages. Driving the input common-mode
voltage beyond that point will forward bias the collector junction of
the input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided because it is
easy to exceed the maximum allowed input differential voltage
when the amplifier is in phase reversal.

CC

1.1V

R5

50kΩ

Q9

I1
5µA

Q5

I2
90µA

V

IN

V

IP

R6

850ΩR7850Ω

Q13 Q17

V

EE

Q18

Q3 Q2

R8

850ΩR9850Ω

Q4

R1
2kΩ

Q8

4

Q14

4

R3
2kΩ

I3
25µA

Q6

Q15

Q10

Q16

I4
25µA

1

1

R2
2kΩ

1

Q7

4

OUTPUT STAGE,
COMMON-MO DE
FEEDBACK

Q11

4

1

R4
2kΩ

01056-043

Figure 43. Simplified Schematic of AD8031 Input Stage

Rev. D | Page 13 of 20

AD8031/AD8032

OUTPUT STAGE, OPEN-LOOP GAIN AND DISTORTION vs. CLEARANCE FROM POWER SUPPLY

The AD8031 features a rail-to-rail output stage. The output
transistors operate as common-emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier’s
open-loop gain.

Q27

Q68

I2
25µA

1.5pF

Q47

C9

5pF

+

V

C5

+

OUT

Q49

DIFFERENTIAL

DRIVE

FROM

INPUT STAGE

Q20

I1
25µA

25µA

Q42

Q21

I4

Q50

Q37

Q43

R29

300Ω

Q38

Q48

Q51

Q44

25µA

I5

Figure 44. Output Stage Simplified Schematic

The output voltage limit depends on how much current the
output transistors are required to source or sink. For applications
with low drive requirements (for instance, a unity gain follower
driving another amplifier input), the AD8031 typically swings
within 20 mV of either voltage supply. As the required current
load increases, the saturation output voltage increases linearly as

I

× RC

LOAD

where:

I

is the required load current.

LOAD

R

is the output transistor collector resistance.

C

01056-044

The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and depends on the output voltage.
Open-loop gain stays constant to within 250 mV of the positive
power supply, 150 mV of the negative power supply, and then
decreases as the output transistors are driven further into
saturation.

The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically, the distortion
performance of the amplifier degrades as the output voltage
amplitude increases.

Used as a unity gain follower, the output of the AD8031/
AD8032 exhibits more distortion in the peak output voltage
region around V

− 0.7 V. This unusual distortion characteristic is

CC

caused by the input stage architecture and is discussed in detail
in the Input Stage Operation section,

OUTPUT OVERDRIVE RECOVERY

Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 45, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.

R

R

G

50Ω

F

V

OUT

R

L

RF=RG=2kΩ

V

IN

For the AD8031, the collector resistances for both output
transistors are typically 25 . As the current load exceeds the
rated output current of 15 mA, the amount of base drive current
required to drive the output transistor into saturation reaches its
limit, and the amplifier’s output swing rapidly decreases.

Rev. D | Page 14 of 20

VS=±2.5V

=±2.5V

V

IN

=1kΩ TO GND

R

L

Figure 45. Overdrive Recovery

100ns1V

01056-045

AD8031/AD8032

DRIVING CAPACITIVE LOADS

Capacitive loads interact with an op amp’s output impedance to
create an extra delay in the feedback path. This reduces circuit
stability and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.

The capacitive load drive of the AD8031/AD8032 can be
increased by adding a low valued resistor in series with the
capacitive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby diminishing its
influence. Figure 46 shows the effects of a series resistor on the
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger
capacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier is
dominated by the roll-off of the series resistor and capacitive load.

1000

100

CAPACITIVE L OAD (pF)

=5V

V

S

200mV STEP
WITH 30% OVERSHOOT

R

R

=20Ω

R

S

S

=0Ω,5Ω

CLOSED-LOOP GAIN (V/V)

R

G

10

1

012345

S

R

=20Ω

F

R

=5Ω

S

=0Ω

R

S

R

V

S

OUT

C

L

01056-046

Figure 46. Capacitive Load Drive vs. Closed-Loop Gain

Rev. D | Page 15 of 20

AD8031/AD8032

V

APPLICATIONS

A 2 MHz SINGLE-SUPPLY, BIQUAD BAND-PASS FILTER

Figure 47 shows a circuit for a single-supply, biquad band-pass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 k resistors
connected between 5 V and ground. This bias point is also
decoupled to ground with a 0.1 µF capacitor. The frequency
response of the filter is shown in Figure 48.

0

–10

–20

GAIN (dB)

–30

To maintain an accurate center frequency, it is essential that the
op amp have sufficient loop gain at 2 MHz. This requires the
choice of an op amp with a significantly higher unity gain,
crossover frequency. The unity gain, crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of
the individual op amp circuits, it can be seen that each op amp
has a loop gain of at least 21 dB. This level is high enough to
ensure that the center frequency of the filter is not affected by
the op amp’s bandwidth. If, for example, an op amp with a gain
bandwidth product of 10 MHz was chosen in this application,
the resulting center frequency would shift by 20% to 1.6 MHz.

R6

1kΩ

C1

50pF

R2

2kΩ

5V

1kΩ

0.1µF

AD8031

R3

2kΩ

V

OUT

R1

3kΩ

V

IN

1kΩ

0.1µF

Figure 47. A 2 MHz, Biquad Band-Pass Filter Using AD8031/AD8032

R4

2kΩ

5V

0.1µF

1/2

AD8032

R5

2kΩ

C2

50pF

1/2

AD8032

–40

–50

10k 100k 1M 10M 100M

FREQUENCY (Hz)

1056-048

Figure 48. Frequency Response of 2 MHz Band-Pass Filter

HIGH PERFORMANCE, SINGLE-SUPPLY LINE DRIVER

Even though the AD8031/AD8032 swing close to both rails, the
AD8031 has optimum distortion performance when the signal
has a common-mode level half way between the supplies and
when there is about 500 mV of headroom to each rail. If low
distortion is required in single-supply applications for signals
that swing close to ground, an emitter-follower circuit can be
used at the op amp output.

5

10µF

0.1µF

7

49.9Ω

2.49kΩ

3

2

AD8031

4

2.49kΩ

6

2N3904

200Ω

IN

49.9Ω

to V

is unity. In addition

OUT

49.9Ω

V

OUT

01056-049

V

IN

01056-047

Figure 49. Low Distortion Line Driver for Single-Supply, Ground Referenced Signals

Figure 49 shows the AD8031 configured as a single-supply, gain­of-2 line driver. With the output driving a back-terminated
50 Ω line, the overall gain from V
to minimizing reflections, the 50 Ω back termination resistor
protects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, low distortion is attainable
even when the output signal swings to within 50 mV of ground.
The circuit was tested at 500 kHz and 2 MHz.

Rev. D | Page 16 of 20

AD8031/AD8032

m

m

Figure 50 and Figure 51 show the output signal swing and
frequency spectrum at 500 kHz. At this frequency, the output
signal (at V

), which has a peak-to-peak swing of 1.95 V

OUT

(50 mV to 2 V), has a THD of −68 dB (SFDR = −77 dB).

100

90

2V

10

0%

50mV

0.5V

Figure 50. Output Signal Swing of Low Distortion Line Driver at 500 kHz

+9dB

1µs

01056-050

This circuit could also be used to drive the analog input of a
single-supply, high speed ADC whose input voltage range is
referenced to ground (for example, 0 V to 2 V or 0 V to 4 V). In
this case, a back termination resistor is not necessary (assuming
a short physical distance from transistor to ADC); therefore, the
emitter of the external transistor would be connected directly to
the ADC input. The available output voltage swing of the circuit
would therefore be doubled.

1.5V

100

90

10

0%

50mV

Figure 52. Output Signal Swing of Low Distortion Line Driver at 2 MHz

+7dB

0.2V 200ns

01056-052

VERTICAL SCAL E (10dB/DI V)

START 0Hz

STOP 5MHz

1056-051

Figure 51. THD of Low Distortion Line Driver at 500 kHz

Figure 52 and Figure 53 show the output signal swing and
frequency spectrum at 2 MHz. As expected, there is some
degradation in signal quality at the higher frequency. When the
output signal has a peak-to-peak swing of 1.45 V (swinging
from 50 mV to 1.5 V), the THD is −55 dB (SFDR = −60 dB).

VERTICAL SCAL E (10dB/DIV)

START 0Hz STOP 20M Hz

01056-053

Figure 53. THD of Low Distortion Line Driver at 2 MHz

Rev. D | Page 17 of 20

AD8031/AD8032

OUTLINE DIMENSIONS

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.210 (5.33)

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

MAX

8

1

0.100 (2.54)

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

BSC

5

4

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.015
(0.38)
MIN

SEATING
PLANE

0.005 (0.13)
MIN

0.060 (1.52)
MAX

0.015 (0.38)
GAUGE

PLANE

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.430 (10.92)
MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

CONTROLL ING DIMENS IONS ARE IN INCHES; MILLIMETER DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OF F INCH EQUI VALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOL E OR HALF LEADS.

COMPLIANT TO JEDEC STANDARDS MS-001

070606-A

Figure 54. 8-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body (N-8)

Dimensions shown in inches and (millimeters)

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.

85

1

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-A A

Figure 55. 8-Lead Standard Small Outline Package [SOIC_N]

Dimensions shown in millimeters and (inches)

6.20 (0.2441)

5.80 (0.2284)

4

BSC

0.51 (0.0201)

0.31 (0.0122)

Narrow Body (R-8)

1.75 (0.0688)

1.35 (0.0532)
8°

0°

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

0.40 (0.0157)

45°

012407-A

Rev. D | Page 18 of 20

AD8031/AD8032

0

0

0

2.90 BSC

1.60 BSC

1.30

1.15

0.90

0.15 MAX

5

123

PIN 1

COMPLIANT TO JEDEC STANDARDS MO-178-A A

1.90
BSC

0.50

0.30

4

2.80 BSC

0.95 BSC

1.45 MAX

SEATING
PLANE

0.22

0.08

10°

5°
0°

0.60

0.45

0.30

Figure 56. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

3.20

3.00

2.80

8

5

4

SEATING
PLANE

5.15

4.90

4.65

1.10 MAX

0.23

0.08

8°
0°

0.80

0.60

0.40

3.20

3.00

2.80

PIN 1

.95
.85
.75

0.15

0.00

COPLANARITY

0.10

1

0.65 BSC

0.38

0.22

COMPLIANT TO JEDEC STANDARDS MO -187-AA

Figure 57. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

Rev. D | Page 19 of 20

AD8031/AD8032

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

AD8031AN –40°C to +85°C 8-Lead PDIP N-8
AD8031ANZ1 –40°C to +85°C 8-Lead PDIP N-8
AD8031AR –40°C to +85°C 8-Lead SOIC_N R-8
AD8031AR-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031AR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8031ARZ1 –40°C to +85°C 8-Lead SOIC_N R-8
AD8031ARZ-REEL1 –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031ARZ-REEL71 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8031ART-R2 –40°C to +85°C 5-Lead SOT-23 RJ-5 H0A
AD8031ART-REEL –40°C to +85°C 5-Lead SOT-23, 13" Tape and Reel RJ-5 H0A
AD8031ART-REEL7 –40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H0A
AD8031ARTZ-R21 –40°C to +85°C 5-Lead SOT-23 RJ-5 H04
AD8031ARTZ-REEL1 –40°C to +85°C 5-Lead SOT-23, 13" Tape and Reel RJ-5 H04
AD8031ARTZ-REEL71 –40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H04
AD8031BN –40°C to +85°C 8-Lead PDIP N-8
AD8031BNZ1 –40°C to +85°C 8-Lead PDIP N-8
AD8031BR –40°C to +85°C 8-Lead SOIC_N R-8
AD8031BR-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031BR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8031BRZ1 –40°C to +85°C 8-Lead SOIC_N R-8
AD8031BRZ-REEL1 –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031BRZ-REEL71 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032AN –40°C to +85°C 8-Lead PDIP N-8
AD8032ANZ1 –40°C to +85°C 8-Lead PDIP N-8

AD8032AR –40°C to +85°C 8-Lead SOIC_N R-8
AD8032AR-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032AR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032ARZ1 –40°C to +85°C 8-Lead SOIC_N R-8
AD8032ARZ-REEL1 –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032ARZ-REEL71 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032ARM –40°C to +85°C 8-Lead MSOP RM-8 H9A
AD8032ARM-REEL –40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 H9A
AD8032ARM-REEL7 –40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 H9A
AD8032ARMZ1 –40°C to +85°C 8-Lead MSOP RM-8 H9A#
AD8032ARMZ-REEL1 –40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 H9A#
AD8032ARMZ-REEL71 –40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 H9A#
AD8032BN –40°C to +85°C 8-Lead PDIP N-8
AD8032BNZ1 –40°C to +85°C 8-Lead PDIP N-8
AD8032BR –40°C to +85°C 8-Lead SOIC_N R-8
AD8032BR-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032BR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032BRZ1 –40°C to +85°C 8-Lead SOIC_N R-8
AD8032BRZ-REEL1 –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032BRZ-REEL71 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8

1

Z = RoHS Compliant Part, # denotes lead-free product may be top or bottom marked.

©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01056-0-11/08(D)

Rev. D | Page 20 of 20