Analog Devices AD8021 e Datasheet

Low Noise, High Speed Amplifier

FEATURES

Low noise
2.1 nV/√Hz input voltage noise
2.1 pA/√Hz input current noise
Custom compensation
Constant bandwidth from G = −1 to G = −10
High speed
200 MHz (G = −1) 190 MHz (G = −10)
Low power
34 mW or 6.7 mA typical for 5 V supply Output disable feature, 1.3 mA Low distortion
−93 dBc second harmonic, f
−108 dBc third harmonic, f
DC precision
1 mV maximum input offset voltage
0.5 µV/°C input offset voltage drift Wide supply range, 5 V to 24 V Low price Small packaging
Available in SOIC-8 and MSOP-8

APPLICATIONS

ADC preamp and driver Instrumentation preamp
Active filters Portable instrumentation Line receivers Precision instruments
Ultrasound signal processing
High gain circuits

PRODUCT DESCRIPTION

The AD8021 is an exceptionally high performance, high speed voltage feedback amplifier that can be used in 16-bit resolution systems. It is designed to have both low voltage and low current noise (2.1 nV/√Hz typical and 2.1 pA/√Hz typical) while operating at the lowest quiescent supply current (7 mA @ ±5 V) among today’s high speed, low noise op amps. The AD8021 operates over a wide range of supply voltages from 2.5 V to 12 V, as well as from single 5 V supplies, making it ideal for high speed, low power instruments. An output disable pin allows further reduction of the quiescent supply current to 1.3 mA.
= 1 MHz
C
= 1 MHz
C
for 16-Bit Systems
AD8021

CONNECTION DIAGRAM

LOGIC
REFERENCE
–IN +IN
–V
Figure 1. SOIC-8 (R-8) and MSOP-8 (RM-8)
The AD8021 allows the user to choose the gain bandwidth product that best suits the application. With a single capacitor, the user can compensate the AD8021 for the desired gain with little trade-off in bandwidth. The AD8021 is a very well behaved amplifier that settles to 0.01% in 23 ns for a 1 V step. It has a fast overload recovery of 50 ns.
The AD8021 is stable over temperature with low input offset voltage drift and input bias current drift, 0.5 µV/°C and 10 nA/°C, respectively. The AD8021 is also capable of driving a 75 Ω line with ±3 V video signals.
The AD8021 is both technically superior and priced considerably less than comparable amps drawing much higher quiescent current. The AD8021 is a high speed, general-purpose amplifier, ideal for a wide variety of gain configurations, and can be used throughout a signal processing chain and in control loops. The AD8021 is available in both standard 8-lead SOIC and MSOP packages in the industrial temperature range of −40°C to +85°C.
24
= 50mV p-p
V
OUT
21
G = –10, R
18
15
12
9
6
3
CLOSED-LOOP GAIN (dB)
0
–3 –6
0.1M 1G1M 10M 100M
F
R
= 100, CC = 0pF
IN
G = –5, RF = 1k, RG = 200, R
= 66.5, CC = 1.5pF
IN
= 499, RG = 249,
G = –2, R
F
R
= 63.4, CC = 4pF
IN
G = –1, R
= 499, RG = 499,
F
= 56.2, CC = 7pF
R
IN
Figure 2. Small Signal Frequency Respon se
AD8021
1
2
3
4
S
= 1k, RG = 100,
FREQUENCY (Hz)
8
7
6
5
DISABLE +V
S
V
OUT
C
COMP
01888-001
01888-002
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
www.analog.com
AD8021
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 7
Maximum Power Dissipation .....................................................7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics............................................. 9
Test C irc uits .................................................................................17
Applications..................................................................................... 19
Using the Disable Feature ..........................................................20
REVISION HISTORY
3/05—Rev. D to Rev. E
Updated Format..................................................................Universal
Change to Figure 19 ....................................................................... 11
Change to Figure 25 ....................................................................... 12
Change to Table 7 and Table 8 ...................................................... 22
Change to Driving 16-Bit ADCs Section .................................... 22
10/03—Data Sheet Changed from Rev. C to Rev. D.
Updated format...................................................................Universal
Theory of Operation ...................................................................... 21
PCB Layout Considerations...................................................... 21
Driving 16-Bit ADCs................................................................. 22
Differential Driver...................................................................... 22
Using the AD8021 in Active Filters .........................................23
Driving Capacitive Loads.......................................................... 23
Outline Dimensions .......................................................................25
Ordering Guide .......................................................................... 25
7/03—Data Sheet Changed from Rev. B to Rev. C.
Deleted all references to evaluation board...................... Universal
Replaced Figure 2 ..............................................................................5
Updated OUTLINE DIMENSIONS ........................................... 20
2/03—Data Sheet Changed from Rev. A to Rev. B.
Edits to Evaluation Board Applications....................................... 20
Edits to Figure 17 ........................................................................... 20
6/02—Data Sheet Changed from Rev. 0 to Rev. A.
Edits to SPECIFICATIONS..............................................................2
Rev. E | Page 2 of 28
AD8021

SPECIFICATIONS

VS = ±5 V, @ TA = 25°C, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1.
AD8021AR/AD8021ARM
Parameter Conditions
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, CC = 10 pF, VO = 0.05 V p-p 355 490 MHz G = +2, CC = 7 pF, VO = 0.05 V p-p 160 205 MHz G = +5, CC = 2 pF, VO = 0.05 V p-p 150 185 MHz G = +10, CC = 0 pF, VO = 0.05 V p-p 110 150 MHz Slew Rate, 1 V Step G = +1, CC = 10 pF 95 120 V/µs G = +2, CC = 7 pF 120 150 V/µs G = +5, CC = 2 pF 250 300 V/µs G = +10, CC = 0 pF 380 420 V/µs Settling Time to 0.01% VO = 1 V step, RL = 500 Ω 23 ns Overload Recovery (50%) ±2.5 V input step, G = +2 50 ns
DISTORTION/NOISE PERFORMANCE
f = 1 MHz
HD2 VO = 2 V p-p −93 dBc HD3 VO = 2 V p-p −108 dBc
f = 5 MHz
HD2 VO = 2 V p-p −70 dBc
HD3 VO = 2 V p-p −80 dBc Input Voltage Noise f = 50 kHz 2.1 2.6 nV/√Hz Input Current Noise f = 50 kHz 2.1 pA/√Hz Differential Gain Error NTSC, RL = 150 Ω 0.03 % Differential Phase Error NTSC, RL = 150 Ω 0.04 Degrees
DC PERFORMANCE
Input Offset Voltage 0.4 1.0 mV Input Offset Voltage Drift T Input Bias Current +Input or −input 7.5 10.5 µA Input Bias Current Drift 10 nA/°C Input Offset Current 0.1 0.5 ±µA Open-Loop Gain 82 86 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ Common-Mode Input Capacitance 1 pF Input Common-Mode Voltage Range −4.1 to +4.6 V Common-Mode Rejection Ratio VCM = ±4 V −86 −98 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing −3.5 to +3.2 −3.8 to +3.4 V Linear Output Current 60 mA Short-Circuit Current 75 mA Capacitive Load Drive for 30% Overshoot VO = 50 mV p-p/1 V p-p 15/120 pF
DISABLE CHARACTERISTICS
Off Isolation f = 10 MHz −40 dB Turn-On Time VO = 0 V to 2 V, 50% logic to 50% output 45 ns Turn-Off Time VO = 0 V to 2 V, 50% logic to 50% output 50 ns DISABLE Voltage—Off/On Enabled Leakage Current LOGIC REFERENCE = 0.4 V 70 µA
Disabled Leakage Current LOGIC REFERENCE = 0.4 V 30 µA
POWER SUPPLY
Operating Range ±2.25 ±5 ±12.0 V Quiescent Current Output enabled 7.0 7.7 mA Output disabled 1.3 1.6 mA +Power Supply Rejection Ratio VCC = +4 V to +6 V, VEE = −5 V −86 −95 dB
−Power Supply Rejection Ratio VCC = +5 V, VEE = −6 V to −4 V −86 −95 dB
to T
MIN
V
DISABLE
DISABLE = 4.0 V
DISABLE = 0.4 V
0.5 µV/°C
MAX
− V
LOGIC REFERENCE
1.75/1.90 V
Min Typ Max
2 µA
33 µA
Unit
Rev. E | Page 3 of 28
AD8021
VS = ±12 V, @ TA = 25°C, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 2.
AD8021AR/AD8021ARM
Parameter Conditions
Min Typ Max
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, CC = 10 pF, VO = 0.05 V p-p 520 560 MHz G = +2, CC = 7 pF, VO = 0.05 V p-p 175 220 MHz G = +5, CC = 2 pF, VO = 0.05 V p-p 170 200 MHz G = +10, CC = 0 pF, VO = 0.05 V p-p 125 165 MHz Slew Rate, 1 V Step G = +1, CC = 10 pF 105 130 V/µs G = +2, CC = 7 pF 140 170 V/µs G = +5, CC = 2 pF 265 340 V/µs G = +10, CC = 0 pF 400 460 V/µs Settling Time to 0.01% VO = 1 V step, RL = 500 Ω 21 ns Overload Recovery (50%) ±6 V input step, G = +2 90 ns
DISTORTION/NOISE PERFORMANCE
f = 1 MHz
HD2 VO = 2 V p-p −95 dBc HD3 VO = 2 V p-p −116 dBc
f = 5 MHz
HD2 VO = 2 V p-p −71 dBc
HD3 VO = 2 V p-p −83 dBc Input Voltage Noise f = 50 kHz 2.1 2.6 nV/√Hz Input Current Noise f = 50 kHz 2.1 pA/√Hz Differential Gain Error NTSC, RL = 150 Ω 0.03 % Differential Phase Error NTSC, RL = 150 Ω 0.04 Degrees
DC PERFORMANCE
Input Offset Voltage 0.4 1.0 mV Input Offset Voltage Drift T
MIN
to T
0.2 µV/°C
MAX
Input Bias Current +Input or −input 8 11.3 µA Input Bias Current Drift 10 nA/°C Input Offset Current 0.1 0.5 ±µA Open-Loop Gain 84 88 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ Common-Mode Input Capacitance 1 pF Input Common-Mode Voltage Range −11.1 to +11.6 V Common-Mode Rejection Ratio VCM = ±10 V −86 −96 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing −10.2 to +9.8 −10.6 to +10.2 V Linear Output Current 70 mA Short-Circuit Current 115 mA
V
Capacitive Load Drive for 30%
= 50 mV p-p/1 V p-p 15/120 pF
O
Overshoot
DISABLE CHARACTERISTICS
Off Isolation f = 10 MHz −40 dB Turn-On Time VO = 0 V to 2 V, 50% logic to 50% output 45 ns Turn-Off Time VO = 0 V to 2 V, 50% logic to 50% output 50 ns DISABLE Voltage—Off/On
DISABLE
− V
LOGIC REFERENCE
1.80/1.95 V
V
Enabled Leakage Current LOGIC REFERENCE = 0.4 V 70 µA
DISABLE = 4.0 V
2 µA
Disabled Leakage Current LOGIC REFERENCE = 0.4 V 30 µA
DISABLE = 0.4 V
33 µA
Unit
Rev. E | Page 4 of 28
AD8021
AD8021AR/AD8021ARM
Parameter Conditions
Min Typ Max
POWER SUPPLY
Operating Range ±2.25 ±5 ±12.0 V Quiescent Current Output enabled 7.8 8.6 mA Output disabled 1.7 2.0 mA +Power Supply Rejection Ratio VCC = +11 V to +13 V, VEE = −12 V −86 −96 dB
−Power Supply Rejection Ratio VCC = +12 V, VEE = −13 V to −11 V −86 −100 dB
= 5 V, @ TA = 25°C, RL = 1 kΩ, gain = +2, unless otherwise noted.
V
S
Table 3.
AD8021AR/AD8021ARM
Parameter Conditions
Min Typ Max
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, CC = 10 pF, VO = 0.05 V p-p 270 305 MHz G = +2, CC = 7 pF, VO = 0.05 V p-p 155 190 MHz G = +5, CC = 2 pF, VO = 0.05 V p-p 135 165 MHz G = +10, CC = 0 pF, VO = 0.05 V p-p 95 130 MHz Slew Rate, 1 V Step G = +1, CC = 10 pF 80 110 V/µs G = +2, CC = 7 pF 110 140 V/µs G = +5, CC = 2 pF 210 280 V/µs G = +10, CC = 0 pF 290 390 V/µs Settling Time to 0.01% VO = 1 V step, RL = 500 Ω 28 ns Overload Recovery (50%) 0 V to 2.5 V input step, G = +2 40 ns
DISTORTION/NOISE PERFORMANCE
f = 1 MHz
HD2 VO = 2 V p-p −84 dBc HD3 VO = 2 V p-p −91 dBc
f = 5 MHz
HD2 VO = 2 V p-p −68 dBc
HD3 VO = 2 V p-p −81 dBc Input Voltage Noise f = 50 kHz 2.1 2.6 nV/√Hz Input Current Noise f = 50 kHz 2.1 pA/√Hz
DC PERFORMANCE
Input Offset Voltage 0.4 1.0 mV Input Offset Voltage Drift T
MIN
to T
0.8 µV/°C
MAX
Input Bias Current +Input or −input 7.5 10.3 µA Input Bias Current Drift 10 nA/°C Input Offset Current 0.1 0.5 ±µA Open-Loop Gain 72 76 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ Common-Mode Input Capacitance 1 pF Input Common-Mode Voltage Range 0.9 to 4.6 V Common-Mode Rejection Ratio 1.5 V to 3.5 V −84 −98 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing 1.25 to 3.38 1.10 to 3.60 V Linear Output Current 30 mA Short-Circuit Current 50 mA Capacitive Load Drive for 30% Overshoot VO = 50 mV p-p/1 V p-p 10/120 pF
Unit
Unit
Rev. E | Page 5 of 28
AD8021
AD8021AR/AD8021ARM
Parameter Conditions
DISABLE CHARACTERISTICS
Off Isolation f = 10 MHz −40 dB Turn-On Time VO = 0 V to 1 V, 50% logic to 50% output 45 ns Turn-Off Time VO = 0 V to 1 V, 50% logic to 50% output 50 ns
V
DISABLE Voltage—Off/On
DISABLE
− V
LOGIC REFERENCE
Enabled Leakage Current LOGIC REFERENCE = 0.4 V 70 µA
DISABLE = 4.0 V
Disabled Leakage Current LOGIC REFERENCE = 0.4 V 30 µA
DISABLE = 0.4 V
POWER SUPPLY
Operating Range ±2.25 ±5 ±12.0 V Quiescent Current Output enabled 6.7 7.5 mA Output disabled 1.2 1.5 mA +Power Supply Rejection Ratio VCC = 4.5 V to 5.5 V, VEE = 0 V −74 −82 dB
−Power Supply Rejection Ratio VCC = +5 V, VEE = −0.5 V to +0.5 V −76 −84 dB
Min Typ Max
1.55/1.70 V
2 µA
33 µA
Unit
Rev. E | Page 6 of 28
AD8021

ABSOLUTE MAXIMUM RATINGS

Table 4.
Parameter Rating
Supply Voltage 26.4 V Power Dissipation
Observed power derating
curves Input Voltage (Common-Mode) ±VS ± 1 V Differential Input Voltage
1
±0.8 V Differential Input Current ±10 mA Output Short-Circuit Duration
Observed power derating
curves Storage Temperature −65°C to +125°C Operating Temperature Range −40°C to +85°C Lead Temperature Range
(Soldering, 10 sec) 300°C
1
The AD8021 inputs are protected by diodes. Current-limiting resistors are
not used in order to preserve the low noise. If a differential input exceeds ±0.8 V, the input current should be limited to ±10 mA.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

MAXIMUM POWER DISSIPATION

2.0
The maximum power that can be safely dissipated by the AD8021 is limited by the associated rise in junction tempera­ture. The maximum safe junction temperature for plastic
1.5
encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure.
1.0
8-LEAD MSOP
0.5
MAXIMUM POWER DISSIPATION (mW)
While the AD8021 is internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction tem­perature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum
0.01 –55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65
Figure 3. Maximum Power Dissipation vs. Temperature
AMBIENT TEMPERATURE (°C)
power derating curves.
1
Specification is for device in free air: 8-lead SOIC: θJA = 125°C/W; 8-lead
MSOP: θ
= 145°C/W
JA

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
8-LEAD SOIC
01888-004
5
8
75
1
Rev. E | Page 7 of 28
AD8021

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LOGIC
REFERENCE
–IN +IN
–V
AD8021
1
2
3
4
S
8
7
6
5
DISABLE +V
S
V
OUT
C
COMP
01888-003
Figure 4. Pin Configuration
Table 5. Function Descriptions
Pin No. Mnemonic Description
1 LOGIC REFERENCE Reference for Pin 81 Voltage Level. Connect to logic low supply. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −V 5 C 6 V
S
Compensation Capacitor. Tie to −VS. (See the Applications section for value.)
COMP
Output.
OUT
Negative Supply Voltage.
7 +VS Positive Supply Voltage. 8
1
When Pin 8 (
Pin 1, the part is disabled. (See the tables for exact disable and enable voltage levels.) If the disable feature is not going to be used, Pin 8 can be tied to
or a logic high source, and Pin 1 can be tied to ground or logic low. Alternatively, if Pin 1 and Pin 8 are not connected, the part will be in an enabled state.
+V
S
DISABLE
) is higher than Pin 1 (LOGIC REFERENCE) by approximately 2 V or more, the part is enabled. When Pin 8 is brought down to within about 1.5 V of
DISABLE
Specifications
Disable, Active Low
1
.
Rev. E | Page 8 of 28
AD8021

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VS = ±5 V, RL = 1 kΩ, G = +2, RF = RG = 499 Ω, RS = 49.9 Ω, RO = 976 Ω, RD = 53.6 Ω, CC = 7 pF, CL = 0, CF = 0, V frequency = 1 MHz, unless otherwise noted.
24
G = 10, R
21
18
15
12
9
6
3
CLOSED-LOOP GAIN (dB)
0
–3 –6
0.1M 1G1M 10M 100M
= 1k, RG = 110, CC = 0pF
F
= 1k, RG = 249, CC = 2pF
G = 5, R
F
= RG = 499, CC = 7pF
G = 2, R
F
G = 1, RF = 75, CC = 10pF
FREQUENCY (Hz)
Figure 5. Small Signal Frequency Respon se vs. Frequenc y and Gain,
= 50 mV p-p, Noninverting. See Figure 48.
V
OUT
01888-005
9
G = 2
8
7
6
5
4
GAIN (dB)
3
2
1
0
–1
10M 100M
FREQUENCY (Hz)
VS = ±2.5V
±5V
VS = ±2.5V
Figure 8. Small Signal Frequency Respon se vs. Frequenc y and Sup ply,
= 50 mV p-p, Noninverting. See Figure 48.
V
OUT
= 2 V p-p,
OUT
±12V
1G1M
01888-008
24
21
G = –10, RF = 1k, RG = 100,
18
R
= 100, CC = 0pF
IN
15
G = –5, R
= 1k, RG = 200,
12
9
GAIN (dB)
6
3
0
–3 –6
0.1M 1G1M 10M 100M
F
R
= 66.5, CC = 1.5pF
IN
= 499, RG = 249,
G = –2, R
F
R
= 63.4, CC = 4pF
IN
= 499, RG = 499,
G = –1, R
F
R
= 56.2, CC = 7pF
IN
FREQUENCY (Hz)
01888-006
Figure 6. Small Signal Frequency Respon se vs. Frequenc y and
Gain, V
9
G = 2
8
7
6
5
4
GAIN (dB)
3
2
1
0
–1
0.1M 1G1M
= 50 mV p-p Inverting. See Figure 48.
OUT
7pF
9pF
7pF
9pF
10M 100M
FREQUENCY (Hz)
C
= 5pF
C
01888-007
Figure 7. Small Signal Frequency Response vs. Frequency and Compensation
Capacitor, V
= 50 mV p-p. See Figure 48.
OUT
3
G = –1
2
1
0
–1
–2
GAIN (dB)
–3
–4
–5
–6 –7
10M 100M
FREQUENCY (Hz)
VS = ±2.5V
VS = ±12V
VS = ±2.5V
±5V
01888-009
1G1M
Figure 9. Small Signal Frequency Respon se vs. Frequenc y and Sup ply,
V
= 50 mV p-p, Inverting. See Figure 50.
OUT
9
G = 2
8
7
6
5
4
GAIN (dB)
3
2
1
0
–1
V
= 4V p-p
OUT
10M 100M
Figure 10. Frequency Response vs. Fre quency and V
V
= 0.1V AND 50mV p-p
OUT
1V p-p
FREQUENCY (Hz)
, Noninverting.
OUT
01888-010
1G1M
See Figure 48.
Rev. E | Page 9 of 28
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