ANALOG DEVICES AD 622 ANZ Datasheet

Low Cost Instrumentation Amplifier
AD622
Rev. E
of third parties that may result from its use. Specifications subject to change without notice. No
Trademarks and registered trademarks are the prop erty of their respective owner s.
Fax: 781.461.3113 ©1996–2012 Analog Devices, Inc. All rights reserved.
R
G
1
–IN
2
+IN
3
–V
S
4
R
G
8
+V
S
7
OUTPUT
6
REF
5
AD622
00777-001
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Data Sheet

FEATURES

Easy to use Low cost solution Higher performance than two or three op amp design Unity gain with no external resistor Optional gains with one external resistor
(Gain range: 2 to 1000) Wide power supply range: ±2.6 V to ±15 V Available in 8-lead PDIP and 8-lead SOIC_N packages Low power, 1.5 mA maximum supply current DC performance
0.15% gain accuracy: G = 1
125 µV maximum input offset voltage
1.0 µV/°C maximum input offset drift
5 nA maximum input bias current
66 dB minimum common-mode rejection ratio: G = 1 Noise
12 nV/√Hz @ 1 kHz input voltage noise
0.60 µV p-p noise: 0.1 Hz to 10 Hz, G = 10
AC characteristics
800 kHz bandwidth: G = 10
10 µs settling time to 0.1% @ G = 1 to 100
1.2 V/µs slew rate

APPLICATIONS

Transducer interface Low cost thermocouple amplifier Industrial process controls Difference amplifier Low cost data acquisition

PIN CONFIGURATION

Figure 1. 8-Lead PDIP and 8-Lead SOIC_N
(N and R Suffixes)

GENERAL DESCRIPTION

The AD622 is a low cost, moderately accurate instrumentation amplifier in the traditional pin configuration that requires only one external resistor to set any gain between 2 and 1000. For a gain of 1, no external resistor is required. The AD622 is a complete difference or subtractor amplifier system that also provides superior linearity and common-mode rejection by incorporating precision laser-trimmed resistors.
The AD622 replaces low cost, discrete, two or three op amp instrumentation amplifier designs and offers good common­mode rejection, superior linearity, temperature stability, reliability, power, and board area consumption. The low cost of the AD622 eliminates the need to design discrete instrumentation amplifiers to meet stringent cost targets. While providing a lower cost solution, it also provides performance and space improvements.
Table 1. Next Generation Upgrades for AD622
Part Comment
AD8221
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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AD622 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6

REVISION HISTORY

6/12—Rev. D to Rev. E
Changes to General Description Section; Added Tab le 1 ........... 1
Changes to Theory of Operation Section and Figure 16 ............. 9
Changes to Table 5 .......................................................................... 10
Changes to Input Selection Section; Deleted Large Input Voltages at Large Gains Section; Added Figure 18, Renumbered
Sequentially ..................................................................................... 11
Changes to Ordering Guide .......................................................... 14
8/07—Rev. C to Re v. D
Updated Format .................................................................. Universal
Added Thermal Resistance Section ............................................... 5
Added Figure 16 ................................................................................ 9
Theory of Operation .........................................................................9
Make vs. Buy: A Typical Application Error Budget ..................9
Gain Selection ................................................................................. 11
Input and Output Offset Voltage .............................................. 11
Reference Terminal .................................................................... 11
Input Protection ......................................................................... 11
RF Interference ........................................................................... 12
Ground Returns for Input Bias Currents ................................ 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
Added Large Input Voltages at Large Gains Section ................. 11
Replaced RF Interference Section ................................................ 11
Deleted Grounding Section .......................................................... 10
Deleted Figure 16 ............................................................................ 10
Changes to Ground Returns for Input Bias Currents Section .. 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
4/99—Rev. B to Re v. C
8/98—Rev. A to Rev. B
2/97—Rev. 0 to Re v. A
1/96—Revision 0: Initial Version
Rev. E | Page 2 of 16
Data Sheet AD622
Gain Range
1 1000
G = 1000
0.2
0.50
%
Output Offset, V
VS = ±5 V to ±15 V
600
1500
µV
G = 100
110
140 dB
Input Bias Current
2.0
5.0
nA
Input Voltage Range2
VS = ±2.6 V to ±5 V
−VS + 1.9
+VS – 1.2
V
G = 1
66
78 dB

SPECIFICATIONS

TA = 25°C, VS = ±15 V, and RL = 2 kΩ typical, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
GAIN G = 1 + (50.5 k/RG)
Gain Error1 V
= ±10 V
OUT
G = 1 0.05 0.15 % G = 10 0.2 0.50 % G = 100 0.2 0.50 %
Nonlinearity V
= ±10 V
OUT
G = 1 to 1000 RL = 10 kΩ 10 ppm
G = 1 to 100 RL = 2 kΩ 10 ppm Gain vs. Temperature Gain = 1 10 ppm/°C Gain > 11 −50 ppm/°C
VOLTAGE OFFSET Total RTI Error = V
Input Offset, V
VS = ±5 V to ±15 V 60 125 µV
OSI
+ V
OSI
/G
OSO
Average Temperature Coefficient VS = ±5 V to ±15 V 1.0 µV/°C
OSO
Average Temperature Coefficient VS = ±5 V to ±15 V 15 µV/°C Offset Referred to Input vs. Supply (PSR) VS = ±5 V to ±15 V
G = 1 80 100 dB
G = 10 95 120 dB
G = 1000 110 140 dB
INPUT CURRENT
Average Temperature Coefficient 3.0 pA/°C Input Offset Current 0.7 2.5 nA
Average Temperature Coefficient 2.0 pA/°C
INPUT
Input Impedance
Differential 10||2 G Ω||pF
Common Mode 10||2 GΩ||pF
Common-Mode Rejection Ratio
OUTPUT
Output Swing RL = 10 kΩ VS = ±2.6 V to ±5 V −VS + 1.1 +VS – 1.2 V
Short Current Circuit ±18 mA
Over Temperature −VS + 2.1 +VS – 1.3 V
VS = ±5 V to ±18 V −VS + 1.9 +VS – 1.4 V
Over Temperature −VS + 2.1 +VS – 1.4 V
= 0 V to ±10 V
V
CM
DC to 60 Hz with 1 kΩ Source Imbalance
G = 10 86 98 dB G = 100 103 118 dB G = 1000 103 118 dB
Over Temperature −VS + 1.4 +VS – 1.3 V
VS = ±5 V to ±18 V −VS + 1.2 +VS – 1.4 V
Over Temperature −VS + 1.6 +VS – 1.5 V
Rev. E | Page 3 of 16
AD622 Data Sheet
G = 100
120 kHz
RTI, 0.1 Hz to 10 Hz
0.1 Hz to 10 Hz
10 pA p-p
IIN
V
, V
= 0
50
60
µA
POWER SUPPLY
Parameter Conditions Min Typ Max Unit
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth
G = 1 1000 kHz G = 10 800 kHz
G = 1000 12 kHz Slew Rate 1.2 V/µs Settling Time to 0.1% 10 V step
G = 1 to 100 10 µs
NOISE
Voltage Noise, 1 kHz Total RTI Noise = √(e
Input Voltage Noise, eni 12 nV/√Hz
Output Voltage Noise, eno 72 nV/√Hz
G = 1 4.0 µV p-p
G = 10 0.6 µV p-p
G = 100 0.3 µV p-p Current Noise f = 1 kHz 100 fA/√Hz
REFERENCE INPUT
RIN 20 kΩ
IN+
REF
Voltage Range −VS + 1.6 +VS – 1.6 V
Gain to Output 1 ± 0.0015
2
) + (eno∕G)2
ni
Operating Range3 ±2.6 ±18 V
Quiescent Current VS = ±2.6 V to ±18 V 0.9 1.3 mA
Over Temperature 1.1 1.5 mA
TEMPERATURE RANGE
For Specified Performance −40 to +85 °C
1
Does not include effects of External Resistor RG.
2
One input grounded, G = 1.
3
Defined as the same supply range that is used to specify PSR.
Rev. E | Page 4 of 16
Data Sheet AD622
Lead Temperature (Soldering, 10 sec)
300°C

ABSOLUTE MAXIMUM RATINGS

Table 3.
Parameter Rating
Supply Voltage ±18 V Internal Power Dissipation1 650 mW Input Voltage (Common Mode) ±VS Differential Input Voltage2 ±25 V Output Short Circuit Duration Indefinite Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +85°C
1
Specification is for device in free air; see Table 4.
2
May be further restricted for gains greater than 14. See the Input Protection
section for more information.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the device in free air.
Table 4. Thermal Resistance
Package Type θJA Unit
8-Lead PDIP (N-8) 95 °C/W 8-Lead SOIC_N (R-8) 155 °C/W

ESD CAUTION

Rev. E | Page 5 of 16
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