Analog Devices AD20MSP410 Datasheet

GSM
ALGORITHM
SIGNAL
PROCESSOR
ASP
PHYSICAL
LAYER
PROCESSOR
PLP
µC
BASEBAND
CONVERTER
BBC
RADIO
SUBSYSTEM
512K x 16
ROM
128K x 8
RAM
DISPLAY
2K x 8
EEPROM
KEYPAD SIM
AD20msp410
GSM CHIPSET
a
FEATURES Passed European GSM Phase I Type Approval Complete Baseband Processing Chipset Performs:
Speech Coding/Decoding, According to GSM 06.XX DTMF and Call Progress Tone Generation Equalization with 16-State Viterbi, Soft Decision Channel Coding/Decoding According to GSM 05.03 All ADC and DAC Interface Functions Includes all Radio, Auxiliary and Voice Interfaces
Support for GSM Data Services Embedded 16-Bit Microcontroller Layer 1 Software Provided with Chipset Full Phase 2 Protocol Stack Software Available Integrated SIM- and Keyboard Interface Ultralow Power Design
2.7 V Operating Voltage
Intelligent Power Management Features
Up to 70 Hours Standby Time Achievable JTAG-Boundary Scan Full Reference Design Available Three TQFP Devices, Occupying Less than 12 cm
APPLICATIONS GSM/DCS1800 Mobile Radios and PCMCIA Cards
Baseband Processing Chipset
AD20msp410
SYSTEM ARCHITECTURE
2
GENERAL DESCRIPTION
The Analog Devices GSM baseband processing chipset provides a competitive solution for GSM based mobile radio systems. It is designed to be fully integrated, easy to use, and compatible with a wide range of product solutions. GSM phones using this chipset and its accompanying Layer 1, 2, 3 software have passed the European GSM full type approval process.
The chipset consists of three highly integrated, sub-micron, low power CMOS components that form the core baseband signal processing of the GSM handset. The system architecture is designed to be easily integrated into current designs and form the basis of next generation of designs.
The chipset uses an operating voltage of 2.7V to 3.6 V, which coupled with the extensive power management features, significantly reduces the drain on battery power and extends the handset’s talktime and standby time.
CHIPSET COMPONENTS Algorithm Signal Processor (ASP)
The ASP is an application specific variant of the ADSP-2171 standard DSP from Analog Devices. It has been optimized to meet the cost, size and power consumption requirements of GSM mobile applications. All necessary memory to run the GSM specific programs is provided on-chip and with its
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
preprogrammed ROM, no user programming is required. The ASP implements full rate speech transcoding according to GSM specifications, including Discontinuous Transmission (DTX) and Comfort Noise Insertion (CNI). A high performance soft­decision Viterbi equalizer is also implemented in software, embedded in the ROM.
Physical Layer Processor (PLP)
The PLP combines application specific hardware and an embedded 16-bit microcontroller (Hitachi H8/300H) to perform channel coding and decoding and execute the protocol stack and user software. The embedded processor executes the Layer 1, 2, 3 and user MMI software. The PLP can control all powerdown functions of the other chips and memory support components to achieve maximum power savings.
Baseband Converter (BBC)
The BBC performs the voiceband and baseband analog-to­digital and digital-to-analog conversions, interfacing the digital sections of the chipset to the microphone, loudspeaker and radio section. In addition, the BBC contains all the auxiliary convert­ers for burst-ramping, AFC, AGC, battery and temperature monitoring. The chipset interfaces directly with a variety of industry standard radio architectures and supplies all the synthesizer and timing control signals.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD20msp410
Software
The required Layer 1 software is supplied with the chipset. In addition, an object code license for Layers 2 and 3 of the protocol stack is available. This exact package of Layers 1,2,3 of software, coupled with the AD20msp410 chipset, is today in phones that have passed European GSM Final Type Approval.
Architecture Overview
A standard GSM Handset can be divided into five functional areas:
• Analog and Digital Baseband Processing Subsystem
(Voice to Radio)
• Layer 1 Software (Physical Layer)
• Protocol Stack Software (Layers 2 and 3)
• Radio Subsystem
• User Interface Software (MMI) Analog Devices and The Technology Partnership (TTP)
provide a cost effective and proven method of attaining the baseband processing subsystem and protocol stack software. This data sheet includes functional descriptions of the baseband processing subsystem and the Layer 1 software. The Technol­ogy Partnership can provide licenses to software and reference designs in all the other areas of a GSM hand-portable terminal.
For detailed information about the individual chipset compo­nents, please refer to the ADSP-2178 (ASP), AD7015 (BBC) and ADPLP01 (PLP) data sheets for electrical characteristics and timing information.
FUNCTIONAL DESCRIPTION
Figure 1 is a functional block diagram of the GSM baseband processing chipset. The chipset can be viewed as a functional block that contains a number of discrete functional units. The electrical and functional interfaces to the rest of the system are briefly described at the end of this section and described in detail in the individual data sheets for each component.
BBC
ASP
VOICE
ADC
VOICE
DAC
SPEECH ENCODE
SPEECH
SPEECH
DECODE
ENCODE
CHANNEL
ENCODE
CHANNEL
DEINTER-
DECODE
CONTROL + MMI + I/O
INTER­LEAVE
LEAVE
PLP
ENCRYPT
DECRYPT
EQUALIZER
BASE­BAND
DAC
BASE­BAND
ADC
Figure 1. Functional Description
UPLINK
The uplink baseband processing functions include the following operations:
Analog-to-Digital Voice Conversion (BBC)
A conventional microphone, connected directly to the BBC, provides an analog input signal to the ADC. The voice ADC function uses a sigma-delta converter to convert and noise shape the input signal, achieving a Signal-to-Noise Ratio plus Total Harmonic Distortion (SNR+THD) of greater than 62.5 dB.
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The analog voice signal is sampled at 8 kHz, producing 13-bit linear values corresponding to the magnitude of the input. The resulting data is passed to the ASP through a dedicated serial port.
Speech Encoding (ASP)
The ASP receives the voice data stream from the BBC and encodes the data from 104 kb/s to 13 kb/s. The algorithm used is Regular Pulse Excitation, with Long Term Prediction (RPE­LTP) as specified in the 06-series of GSM recommendations. The algorithm is tested and proven to be bit-exact against the GSM test vectors including all VAD/DTX functions. After encoding the data is transferred to the PLP through a parallel port in discrete blocks of 260 bits at 20 ms intervals.
Channel Coding (PLP)
The information received from the ASP contains data values and filter coefficients that have different levels of priority. These are subsequently protected to different levels within the channel coding. The encode protection process incorporates block coding and convolutional encoding. In addition to the normal speech traffic channels, the channel coding function also supports data transmission at full rate and half rate. After the interleave process, if necessary, the data is encrypted using the required A5/1 or A5/2 encryption algorithm. Data is then formatted into bursts, with the required timing and training sequences and sent to the BBC through a dedicated serial port.
GMSK Modulation and D/A Conversion (BBC)
The BBC receives data at 270 kb/s. The on-chip lookup-table ROM modulates and spectrally shapes the data being sent. A pair of 10-bit matched differential DACs convert the modulated data from the digital domain to the analog domain and pass I and Q data to the transmit section of the radio subsystem.
DOWNLINK
The downlink baseband processing functions include the following operations:
Analog-to-Digital Conversion (BBC)
The receiver I and Q signals are sampled by a pair of ADCs at 270 kHz. The resulting digital words are transferred to the ASP through a dedicated receive path serial link and DMA control.
Equalization (ASP)
The equalizer recovers and demodulates the received signal and establishes local timing and frequency references for the mobile unit. The equalization algorithm is a version of the Maximum Likelihood Sequence Estimation (MLSE) using the Viterbi algorithm. Two confidence bits per symbol provide additional information about the accuracy of each decision to the channel codec’s convolutional decoder. The equalizer outputs a sequence of bits including the confidence bits. This data is transferred to the PLP through a dedicated parallel port on the ASP. At this point, the training sequence and trailing bits, contained within the burst, are discarded.
Channel Decoding (PLP)
The A5/1 or A5/2 decryption algorithm is used, as required, to recover the data that is ready for the deinterleave process. The deinterleave process is an exact inversion of the interleave process used by the transmit section. Data can pass directly to this function, without the A5/1 or the A5/2 decryption, con­trolled by the Layer 1 processing. The decode function then performs convolutional decoding and parity decoding. The convolutional decoder uses a Viterbi algorithm, with two soft
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AD20msp410
decision confidence bits supplied by the equalizer. Once these decoding functions are complete, digitized voice data is trans­ferred to the ASP through a parallel port. Error control mecha­nisms are used to ensure adequate bad frame indication.
Speech Decoding (ASP)
Encoded speech data is transferred at 20 ms intervals from the PLP to the ASP in blocks of 260 bits plus the Bad Frame Indicator (BFI). The speech decoder supports a Comfort Noise Insertion (CNI) function that inserts a predefined silence descriptor into the decoding process. The ASP also implements control of talker side-tone and short term echo cancellation. The resulting data, at 104 kb/s, is transferred to the BBC through a dedicated serial path.
Voice Digital-to-Analog Conversion
The Voice DAC function of the BBC uses a sigma-delta con­verter to convert and noise shape the signal. The 13-bit linear values are converted to the analog domain and filtered to avoid any images. The resulting differential signals can be controlled in volume and drive directly a small earpiece as well as a separate auxiliary output.
AUXILIARY SYSTEM FUNCTIONS
The ASP, the PLP and the BBC perform a number of auxiliary functions which are essential to build a complete mobile radio.
A general radio section constitutes the three functions of transmitter, receiver and synthesizer. Figure 2 shows how the baseband chipset interfaces to a typical radio architecture. The transmitter is fed with baseband analog I and Q signals from the
BBC and upconverted to 900 MHz for GSM applications and 1800 MHz for PCN applications.
A dedicated power amplifier increases the RF-signal to the required level. The receiver amplifies the antenna signal, down­converts it to an intermediate frequency (IF) and amplifies it there again. After second conversion to baseband, the I and Q components of the signal are fed into the BBC.
The BBC, ASP and PLP provide three auxiliary functions for interfacing to the radio subsystem. These auxiliary functions include AGC, AFC and Power Ramping.
Power Ramp Envelope (BBC)
To meet the spectral and time-domain specifications of the transmitted output signal, the burst has to follow a specified power envelope. The envelope for the power profile originates in the PLP as a set of coefficients, down-loaded and stored in the BBC. This envelope profile is sent to one of the auxiliary DACs on the BBC with each burst. The analog output is fed into the RF power amplifier, controlling the power profile and absolute level of the transmitted data.
Automatic Gain Control (AGC)
The mobile radio has to cope with a wide range of input signal levels. The major part of the overall gain is provided in the IF amplifier. The incoming signal level is analyzed in the ASP and the PLP and a digital gain control signal is sent to the BBC. A 10-bit auxiliary DAC generates the appropriate analog control signal for the IF amplifier. Additionally gain control can be implemented by using two output flags of the ASP.
BASEBAND/AUXILIARY SECTION OF AD7015
TX DAC
TX DAC
RX DAC
RX DAC
10-BIT DAC
10-BIT DAC
FLAGS
BASEBAND
SERIAL
INTERFACE
AUXILIARY
SERIAL
INTERFACE
BURST STORE
DIGITAL FIR FILTER
DIGITAL FIR FILTER
DIGITAL FIR FILTER
DIGITAL FIR FILTER
DIGITAL FIR FILTER
8-BIT DAC
RAMPING RAM
MODULATOR
ASP
GSMSK
10-BIT DAC
PLP
SYNTHESIZER
CONTROL SIGNALS
I
Q
I
Q
AFC
LOCK
PA
IF
AGC
13 MHz VCTCXO
RAMP CONTROL
AGC
PAERROR
13 MHz VCTCXO
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Figure 2. Control of RF Section
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