ANALOG DEVICES ADCMP608, ACMP609 Service Manual

Rail-to-Rail, Fast, Low Power, 2.5 V to 5.5 V,
Single-Supply TTL/CMOS Comparators
Preliminary Technical Data

FEATURES

10 mV sensitivity rail to rail at VCC = 2.5 V Input common-mode voltage from −0.2 V to V Low glitch CMOS-/TTL-compatible output stage 30 ns propagation delay 1 mW at 2.5 V Shutdown pin Single-pin control for programmable hysteresis and latch Power supply rejection >60 dB
−40C° to +125C° operation

APPLICATIONS

High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators
+ 0.2 V
CC
ADCMP608/ACMP609

FUNCTIONAL BLOCK DIAGRAMS

NONINVERTI NG
INPUT
INVERTING
INPUT
NONINVERTI NG
INPUT
INVERTING
INPUT
+
ADCMP608
S
DN
+
ADCMP609
S
LE/HYS
Figure 1.
Q OUTPUT
Q OUTPUT
Q OUTPUT
DN
05918-001

GENERAL DESCRIPTION

The ADCMP608 and ADCMP609 are fast comparators fabricated on Analog Devices’ proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from V low noise, TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.
The devices offer 30 ns propagation delays driving a 15 pF load with 5 mV overdrive on 350/400 A typical supply current. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a −0.5 V to +3.0 V input signal range up to a +5.5 V positive supply with a −0.5 V to +6V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP609, support a wide input signal range while allowing independent output swing control.
− 0.5 V to VCC + 0.5 V,
EE
The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option.
The ADCMP608 is available in a tiny 6-lead SC70 package with single-ended output and a shutdown pin.
The ADCMP609, available in an 8-lead MSOP package, features a shutdown pin, single pin latch, and hysteresis control.
+
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADCMP608/ADCMP609
TABLE OF CONTENTS
Features.............................................................................................. 1
Preliminary Technical Data
Application Information...................................................................9
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7

REVISION HISTORY

2/06—Revision PrA: Preliminary Version
Power/Ground Layout and Bypassing........................................9
TTL-/CMOS-Compatible Output Stage.........................................9
Using/Disabling the Latch Feature..............................................9
Optimizing Performance..............................................................9
Comparator Propagation Delay Dispersion ........................... 10
Comparator Hysteresis .............................................................. 10
Crossover Bias Point .................................................................. 11
Minimum Input Slew Rate Requirement ................................ 11
Typical Application Circuits ......................................................... 12
Timing Information....................................................................... 13
Rev. PrA | Page 2 of 16
Preliminary Technical Data
ADCMP608/ADCMP609

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

V
= V
CCI
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
DC INPUT CHARACTERISTICS
Voltage Range VP, VN VCC = 2.5 V to 5.5 V −0.5 VCC + 0.5 V V Common-Mode Range VCC = 2.5 V to 5.5 V −0.2 VCC + 0.2 V V Differential Voltage VCC = 2.5 V to 5.5 V VCC V Offset Voltage VOS −5.0 +5.0 mV Bias Current IP, IN −2.0 ±1 +2.0 µA Offset Current −0.5 +0.5 µA Capacitance CP, CN TBD pF Resistance, Differential Mode 0.1 V to VCC 150 kΩ Resistance, Common Mode −0.5 V to VCC + 0.5 V 100 kΩ Active Gain AV 80 dB Common-Mode Rejection CMRR
Hysteresis
LATCH ENABLE PIN CHARACTERISTICS
ADCMP609 only VIH Hysteresis is shut off 2.0 V VIL Latch mode guaranteed −0.2 0.4 0.8 V LIH V IOL V
HYSTERESIS MODE AND TIMING
Hysteresis Mode Bias Voltage Current sink 0 A 1.08 1.25 1.35 V Minimum Resistor Value Hysteresis = 60 mV 60 kΩ Latch Setup Time tS V Latch Hold Time tH V Latch to Output Delay t Latch Minimum Pulse Width tPL V
SHUTDOWN PIN CHARACTERISTICS
VIH Comparator is operating 2.0 VCC V VIL Shutdown guaranteed −0.2 0.4 0.6 V IIH V IOL V Sleep Time tSD I Wake-Up Time tH V
DC OUTPUT CHARACTERISTICS V
Output Voltage High Level VOH I Output Voltage Low Level VOL I
= 3.3 V, TA = 25°C, unless otherwise noted.
CCO
V
PLOH, tPLOL
= 2.5 V, V
CCI
V
= −0.2 V to 2.7 V
CM
= 5.5 V, V
V
CCI
V
= −0.2 V to 5.7 V
CM
= ∞
R
HYS
= V
IH
CCO
= 0.4 V −0.1 mA
IL
= 100 mV 15 ns
OD
= 100 mV 20 ns
OD
VOD = 100 mV 20 ns
= 100 mV 20 ns
OD
= VCC 0.05 mA
IH
= 0 V −0.05 mA
IL
< 100 A 0.6 ns
CC
= 10 mV, output valid 3 ns
OD
= 2.5 V to 6 V
CCO
= 1.6 mA V
OH
= 1.6 mA V
OL
= 2.5 V,
CCO
= 5.5 V,
CCO
50 dB
60 dB
0.1 mV
+ 0.2 V
CCO
+ 0.2 V 0.1 mA
= 2.5 V VCC − 0.4 V
CCO
= 2.5 V 0.4 V
CCO
Rev. PrA | Page 3 of 16
ADCMP608/ADCMP609
Preliminary Technical Data
Parameter Symbol Conditions Min Typ Max Unit
AC PERFORMANCE V
Propagation Delay, CL = 15 pF tPD
Propagation Delay Skew—Rising to
V
= V
CCI
V
CCO
V
OD
V
CCO
V
OD
OD
= 2.5 V to 5.5 V
CCO
= 5.5 V to 2.5 V,
30 ns
= 10 mV
= 2.5 V/5.5 V,
25/30 ns
= 200 mV = 10 mV 2 ns
Falling Transition Overdrive Dispersion 10 mV < VOD < 500 mV 4 ns Slew Rate Dispersion
Small Signal 10% − 90% Duty Cycle Dispersion
Common-Mode Dispersion
10 V/s to 0.1 V/ns 200 mV p-p single ended
1.25 V, 50 V/s,
V
OD
V
= 1.25 V
CM
= 0 V to VCC
V
CM
1 ns
1 ns
0.5 ns
200 m p-p single ended
Toggle Rate
>50% output swing
= 15 pF V
C
L
CCI
= 5 V RMS Random Jitter RJ VOD = 200 mV, 5 V/ns Minimum Pulse Width PW Rise Time tR
Fall Time tF
∆tPD/∆PW < 500 ps 35 ns
MIN
10% to 90% C V
= 2.5 V to 5 V
CCI
10% to 90% C
= 2.5 V to 5 V
V
CCI
= 15 pF,
LOAD
= 15 pF,
LOAD
TBD Mbps
TBD
25 to 40
ns
ns
25 to 40
ns
POWER SUPPLY
Input Supply Voltage Range V Output Supply Voltage Range V Positive Supply Differential
2.5 5.5 V
CCI
2.5 5.5 V
CCO
− V
V
CCI
Operating −3 +3 V
CCO
(ADCMP609)
Positive Supply Differential
V
− V
CCI
Nonoperating −5.5 +5.5 V
CCO
(ADCMP609) Positive Supply Current I Positive Supply Current I Input Section Supply Current
V
VCC
V
VCC
V
I
VCCi
CC
CC
CCI
= 2.5 V 400 A = 5.5 V 500 A
= 2.5 V 270 mA
(ADCMP609) Output Stage Supply Current
V
VCCO
= 2.5 V 130 mA
CCO
I
(ADCMP609) Power Dissipation PD V Shutdown Current ISD V Power Supply Rejection PSRR V
= 2.5 V 1 mW
CC
=2.5 V to 5.5 V 50 A
CC
= 2.5 V to 5 V >50 dB dB
CCI
Rev. PrA | Page 4 of 16
Preliminary Technical Data

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
Supply Voltages
Input Supply Voltage (V Output Supply Voltage
(V
to GND)
CCO
Positive Supply Differential
− V
CCO
)
(V
CCI
to GND) −0.5 V to +6.0 V
CCI
−0.5 V to +6.0 V
−6.0 V to +6.0 V
Input Voltages
Input Voltage −0.5 V to V Differential Input Voltage
Maximum Input/Output Current
±(V
CCI
±50mA
CCI
+ 0.5 V)
+ 0.5 V
Shutdown Control Pin
Applied Voltage (HYS to GND) −0.5 V to Vcco + 0.5 V Maximum Input/Output Current
±50 mA
Latch/Hysteresis Control Pin
Applied Voltage (HYS to GND) −0.5 V to V Maximum Input/Output Current
Output Current
±50 mA ±50 mA
+ 0.5 V
CCO
Temperature
Operating Temperature, Ambient −40°C to +125°C Operating Temperature, Junction 150°C Storage Temperature Range −65°C to +150°C
Stress above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θ
ADCMP608 SC70 6-lead 426 °C/W ADCMP609 MSOP 8-lead 130 °C/W
1
Measurement in still air.
ADCMP608/ADCMP609
1
JA
Unit

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrA | Page 5 of 16
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