Page 1
5
hexainf@hotmail.com
D D
4
3
2
1
Nvidia G72M/G73M Graphic Card
C C
For M515
Version : B
Drawing by : XiongWei
B B
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
Cover
Cover
Name
Name
Name
Cover
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
of
of
of
114Thursday, September 28, 2006
114Thursday, September 28, 2006
114Thursday, September 28, 2006
Rev
Rev
Rev
A
A
A
Page 2
5
4
3
2
1
RST may be driven weakly high during VDD33 ramp, so islate it
+VG3.3S
C666
C666
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
PEX_REFCLK13
PEX_REFCLK*13
POP = NA
R873 0
R873 0
D D
C C
B B
A A
PEX_RST13
C_PEX_TXP013
C_PEX_TXN013
C_PEX_TXP113
C_PEX_TXN113
C_PEX_TXP213
C_PEX_TXN213
C_PEX_TXP313
C_PEX_TXN313
C_PEX_TXP413
C_PEX_TXN413
C_PEX_TXP513
C_PEX_TXN513
C_PEX_TXP613
C_PEX_TXN613
C_PEX_TXP713
C_PEX_TXN713
C_PEX_TXP813
C_PEX_TXN813
C_PEX_TXP913
C_PEX_TXN913
C_PEX_TXP1013
C_PEX_TXN1013
C_PEX_TXP1113
C_PEX_TXN1113
C_PEX_TXP1213
C_PEX_TXN1213
C_PEX_TXP1313
C_PEX_TXN1313
C_PEX_TXP1413
C_PEX_TXN1413
C_PEX_TXP1513
C_PEX_TXN1513
5
1
2
R0402
R0402
PEX_RXP013
PEX_RXN013
PEX_RXP113
PEX_RXN113
PEX_RXP213
PEX_RXN213
PEX_RXP313
PEX_RXN313
PEX_RXP413
PEX_RXN413
PEX_RXP513
PEX_RXN513
PEX_RXP613
PEX_RXN613
PEX_RXP713
PEX_RXN713
PEX_RXP813
PEX_RXN813
PEX_RXP913
PEX_RXN913
PEX_RXP1013
PEX_RXN1013
PEX_RXP1113
PEX_RXN1113
PEX_RXP1213
PEX_RXN1213
PEX_RXP1313
PEX_RXN1313
PEX_RXP1413
PEX_RXN1413
PEX_RXP1513
PEX_RXN1513
U46
U46
Do Not Stuff
Do Not Stuff
53
sot65p190-5
sot65p190-5
POP = NA
POP = NA
4
C29 0.1u C0402C29 0.1u C0402
C32 0.1u C0402C32 0.1u C0402
C10 0.1u C0402C10 0.1u C0402
C35 0.1u C0402C35 0.1u C0402
C13 0.1u C0402C13 0.1u C0402
C39 0.1u C0402C39 0.1u C0402
C43 0.1u C0402C43 0.1u C0402
C15 0.1u C0402C15 0.1u C0402
C16 0.1u C0402C16 0.1u C0402
C48 0.1u C0402C48 0.1u C0402
C49 0.1u C0402C49 0.1u C0402
C17 0.1u C0402C17 0.1u C0402
C20 0.1u C0402C20 0.1u C0402
C51 0.1u C0402C51 0.1u C0402
C52 0.1u C0402C52 0.1u C0402
C53 0.1u C0402C53 0.1u C0402
C57 0.1u C0402C57 0.1u C0402
C56 0.1u C0402C56 0.1u C0402
C65 0.1u C0402C65 0.1u C0402
C58 0.1u C0402C58 0.1u C0402
C59 0.1u C0402C59 0.1u C0402
C61 0.1u C0402C61 0.1u C0402
C67 0.1u C0402C67 0.1u C0402
C66 0.1u C0402C66 0.1u C0402
C68 0.1u C0402C68 0.1u C0402
C69 0.1u C0402C69 0.1u C0402
C74 0.1u C0402C74 0.1u C0402
C75 0.1u C0402C75 0.1u C0402
C77 0.1u C0402C77 0.1u C0402
C76 0.1u C0402C76 0.1u C0402
C79 0.1u C0402C79 0.1u C0402
C78 0.1u C0402C78 0.1u C0402
R893 Do Not Stuff
R893 Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R894
R894
Do Not Stuff
Do Not Stuff
R0402
R0402
POP = NA
POP = NA
PEX_TXP0
PEX_TXN0
PEX_TXP1
PEX_TXN1
PEX_TXP2
PEX_TXN2
PEX_TXP3
PEX_TXN3
PEX_TXP4
PEX_TXN4
PEX_TXP5
PEX_TXN5
PEX_TXP6
PEX_TXN6
PEX_TXP7
PEX_TXN7
PEX_TXP8
PEX_TXN8
PEX_TXP9
PEX_TXN9
PEX_TXP10
PEX_TXN10
PEX_TXP11
PEX_TXN11
PEX_TXP12
PEX_TXN12
PEX_TXP13
PEX_TXN13
PEX_TXP14
PEX_TXN14
PEX_TXP15
PEX_TXN15
U5A
U5A
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
1/14 PCI_EXPRESS
1/14 PCI_EXPRESS
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
AH15
PEX_RST*
AG12
RFU0
AH13
RFU1
AM12
PEX_TSTCLK_OUT
AM11
PEX_TSTCLK_OUT*
AH14
PEX_REFCLK
AJ14
PEX_REFCLK*
AJ15
PEX_TX0
AK15
PEX_TX0*
AK13
PEX_RX0
AK14
PEX_RX0*
AH16
PEX_TX1
AG16
PEX_TX1*
AM14
PEX_RX1
AM15
PEX_RX1*
AG17
PEX_TX2
AH17
PEX_TX2*
AL15
PEX_RX2
AL16
PEX_RX2*
AG18
PEX_TX3
AH18
PEX_TX3*
AK16
PEX_RX3
AK17
PEX_RX3*
AK18
PEX_TX4
AJ18
PEX_TX4*
AL17
PEX_RX4
AL18
PEX_RX4*
AJ19
PEX_TX5
AH19
PEX_TX5*
AM18
PEX_RX5
AM19
PEX_RX5*
AG20
PEX_TX6
AH20
PEX_TX6*
AK19
PEX_RX6
AK20
PEX_RX6*
AG21
PEX_TX7
AH21
PEX_TX7*
AL20
PEX_RX7
AL21
PEX_RX7*
AK21
PEX_TX8
AJ21
PEX_TX8*
AM21
PEX_RX8
AM22
PEX_RX8*
AJ22
PEX_TX9
AH22
PEX_TX9*
AK22
PEX_RX9
AK23
PEX_RX9*
AG23
PEX_TX10
AH23
PEX_TX10*
AL23
PEX_RX10
AL24
PEX_RX10*
AK24
PEX_TX11
AJ24
PEX_TX11*
AM24
PEX_RX11
AM25
PEX_RX11*
AJ25
PEX_TX12
AH25
PEX_TX12*
AK25
PEX_RX12
AK26
PEX_RX12*
AH26
PEX_TX13
AG26
PEX_TX13*
AL26
PEX_RX13
AL27
PEX_RX13*
AK27
PEX_TX14
AJ27
PEX_TX14*
AM27
PEX_RX14
AM28
PEX_RX14*
AJ28
PEX_TX15
AH27
PEX_TX15*
AL28
PEX_RX15
AL29
PEX_RX15*
4
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_LP_0
VDD_LP_1
VDD_LP_2
VDD_LP_3
VDD_LP_4
VDD_LP_5
VDD_SENSE
GND_SENSE
VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_12
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
NC_0
NC_1
NC_2
NC_3
AD23
AF23
AF24
AF25
AG24
AG25
AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AF21
AF22
K16
K17
N13
N14
N16
N17
N19
P13
P14
P16
P17
P19
R16
R17
T13
T14
T15
T18
T19
U13
U14
U15
U18
U19
V16
V17
W13
W14
W16
W17
W19
Y13
Y14
Y16
Y17
Y19
Y20
P20
T20
T23
U20
U23
W20
N20
M21
AC11
AC12
AC24
AD24
AE11
AE12
H7
J7
K7
L10
L7
L8
M10
AF15
AE15
AE16
AM8
AM9
B32
J6
Near Ball Near BGA
C21
C21
C2
C2
C1
C1
0.1u
0.1u
C0402
C0402
0.1u
0.1u
C0402
C0402
1u
1u
C0603
C0603
C22
C22
1u
1u
C0603
C0603
250mA
1500mA
C24
C24
C25
C25
C6
C6
C7
C18
C18
1u
1u
C0603
C0603
1u
1u
C0603
C0603
C9
C9
0.1u
0.1u
C0402
C0402
C37
C37
0.1u
0.1u
C0402
C0402
C41
C41
0.47u
0.47u
C0603
C0603
C46
C46
0.47u
0.47u
C0603
C0603
C19
C19
1u
1u
C0603
C0603
C7
1u
1u
C0603
C0603
C33
C33
C34
C34
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
C12
C12
0.1u
0.1u
C0402
C0402
C42
C42
0.47u
0.47u
C0603
C0603
C47
C47
0.47u
0.47u
C0603
C0603
Near BGA
NV_PLLAVDD
<<Place on bottom north of GPU
C38
C38
0.1u
0.1u
<<Place on the bottom east of GPU
C0402
C0402
<<Place on the bottom south of GPU
<<Place on the bottom west of GPU
NVVDD
0.1u
0.1u
C0402
C0402
Near Ball
C30
C30
0.1u
0.1u
C0402
C0402
C11
C11
0.1u
0.1u
C0402
C0402
C40
C40
0.47u
0.47u
C0603
C0603
C44
C44
0.47u
0.47u
C0603
C0603
C50
C50
1u
1u
C0603
C0603
0.1u
0.1u
C0402
C0402
C31
C31
0.1u
0.1u
C0402
C0402
C36
C36
0.1u
0.1u
C0402
C0402
C14
C14
0.47u
0.47u
C0603
C0603
C45
C45
0.47u
0.47u
C0603
C0603
Near Ball
C251
C250
C250
0.1u
0.1u
C0402
C0402
C251
0.1u
0.1u
C0402
C0402
C54
C54
0.1u
0.1u
C0402
C0402
C252
C252
0.47u
0.47u
C0603
C0603
C253
C253
0.47u
0.47u
C0603
C0603
C254
C254
0.47u
0.47u
C0603
C0603
Near ball
PEX_PLLAVDD
GND
C62
C62
0.1u
0.1u
C0402
C0402
C60
C60
0.01u
0.01u
C0402
C0402
180mA
C63
C63
1u
1u
C0603
C0603
though a narrower plane, 12 mils wide and at least 500mils long
PEX_PLLDVDD
3
C70
C70
0.1u
0.1u
C0402
C0402
C71
C71
0.01u
0.01u
C0402
C0402
20mA
C72
C72
1u
1u
C0603
C0603
+VG3.3S
C55
C55
1u
1u
C0603
C0603
Near BGA
C73
C73
4.7u
4.7u
C0805
C0805
C64
C64
4.7u
4.7u
C0805
C0805
2
C3
C3
4.7u
4.7u
C0805
C0805
C8
C8
4.7u
4.7u
C0805
C0805
Near BGA
FB9 180R
FB9 180R
FB10 180R
FB10 180R
Within 10mm of package edge
more caps than design guide...
C27
C27
C28
C28
0.1u
0.1u
4.7u
4.7u
C0402
C0402
C0805
C0805
+VG1.2S
FB0603
FB0603
+VG1.2S
FB0603
FB0603
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
ENGINEER:
GPU
GPU
GPU
FB0603
FB0603
+VG1.2S
PCIE Interface
PCIE Interface
PCIE Interface
1
FB1 180R
FB1 180R
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
C
C
C
Name
Name
Name
Date: Sheet
Date: Sheet
Date: Sheet
+VG1.2S
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
214Wednesday, December 13, 2006
214Wednesday, December 13, 2006
214Wednesday, December 13, 2006
of
of
of
Rev
Rev
Rev
A
A
A
Page 3
5
hexainf@hotmail.com
4
3
2
1
D D
FBAD[63..0]4
C C
FBADQM[7..0]4
FBA_WDQS[7..0]4
B B
Not populate for G73
C114
C114
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = G73_NA
POP = G73_NA
FBVDDQ
R4
R4
Do Not Stuff
Do Not Stuff
R0402
R0402
POP = G73_NA
POP = G73_NA
R6
R6
Do Not Stuff
Do Not Stuff
R0603
R0603
POP = G73_NA
POP = G73_NA
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBA_WDQS0
FBA_WDQS1
FBA_WDQS2
FBA_WDQS3
FBA_WDQS4
FBA_WDQS5
FBA_WDQS6
FBA_WDQS7
FBA_RDQS0
FBA_RDQS1
FBA_RDQS2
FBA_RDQS3
FBA_RDQS4
FBA_RDQS5
FBA_RDQS6
FBA_RDQS7
FB_VREF1
VREF=0.7*FBVDDQ
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
N27
M27
N28
L29
K27
K28
J29
J28
P30
N31
N30
N32
L31
L30
J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29
J27
F27
E27
E28
F28
AD29
AE29
AD28
AC28
AB29
AA30
Y28
AB30
AM30
AF30
AJ31
AJ30
AJ32
AK29
AM31
AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29
AD27
AF27
AE28
M29
M30
G30
F29
AA29
AK30
AC30
AG30
L28
K31
G32
G28
AB28
AL32
AF32
AH30
M28
K32
G31
G27
AA28
AL31
AF31
AH29
E32
U5B
U5B
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
2/14 FBA
2/14 FBA
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
FB_VREF1
FBVDD_0
FBVDD_1
FBVDD_2
FBVDD_3
FBVDD_4
FBVDD_5
FBVDD_6
FBVDD_7
FBVDD_8
FBVDD_9
FBVDD_10
FBVDD_11
FBVDD_12
FBVDD_13
FBVDD_14
FBVDD_15
FBVDD_16
FBVDD_17
FBVDD_18
FBVDD_19
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DEBUG
FBA_REFCLK
FBA_REFCLK*
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
U5C
U5C
G73M
FBVDDQ
A12
A15
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32
V32
Near Ball Near BGA
AA25
AA26
C100
C100
C85
C85
C86
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
C90
C90
M25
0.47u
0.47u
M26
C0603
C0603
R25
R26
V25
V26
FBAA4
P32
U27
FBAA5
P31
U30
FBA_H32_A2
Y31
FBA_H32_A4
W32
FBA_H32_A3
W31
T32
V27
FBAA11
T28
T31
U32
W29
FBA_H32_A5
W30
NTP_FBAA12
T27
V28
FBAA7
V30
FBAA10
U31
R27
FBAA0
V29
FBAA9
T30
FBAA6
W28
FBAA2
R29
FBAA8
R30
FBAA3
P29
FBAA1
U28
NTP_FBAA13
Y32
P28
R28
Y27
AA27
Y30
RFU2
AC26
RFU3
AC27
D32
D31
G23
FBA_PLLAVDD
G25
G24
C86
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
C0402
C0402
C88
C88
C103
C103
C104
C104
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
C0402
C0402
C106
C106
C248
C248
0.47u
0.47u
0.47u
0.47u
C0603
C0603
C0603
C0603
FBAA[11..0] 4
FBA_H32_A[5..2] 4
FBARAS* 4
FBABA1 4
FBABA2 4
FBACS0* 4
FBACAS* 4
FBAWE* 4
FBABA0 4
TP1TP1
TP3TP3
FBACLK0 4
FBACLK0* 4
FBACLK1 4
FBACLK1* 4FBA_RDQS[7..0]4
C108
C108
C109
C109
C110
470p
470p
C0402
C0402
C110
4700p
4700p
4.7u
4.7u
C0402
C0402
C0805
C0805
R122
R122
10K
10K
R0402
R0402
FB2 180R
FB2 180R
C87
C87
4.7u
4.7u
C0805
C0805
FBA_RST 4
FBACKE 4
R1
R1
10K
10K
R0402
R0402
FB0603
FB0603
+VG1.2S
FBVDDQ
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
H32
L32
A4
RAS#
A5
BA1
A2
A4
A3
BA2
CS0#
A11
CAS#
WE#
BA0
A5
A12
RST
A7
A10
CKE
A0
A9
A6
A2
A8
A3
A1
A13
FBCD[63..0]5
FBCDQM[7..0]5
FBC_WDQS[7..0]5
FBC_RDQS[7..0]5
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBC_WDQS0
FBC_WDQS1
FBC_WDQS2
FBC_WDQS3
FBC_WDQS4
FBC_WDQS5
FBC_WDQS6
FBC_WDQS7
FBC_RDQS0
FBC_RDQS1
FBC_RDQS2
FBC_RDQS3
FBC_RDQS4
FBC_RDQS5
FBC_RDQS6
FBC_RDQS7
G73M
bga_100p_33x33_820
bga_100p_33x33_820
3/14 FBC
3/14 FBC
B7
FBCD0
A7
FBCD1
C7
FBCD2
A2
FBCD3
B2
FBCD4
C4
FBCD5
A5
FBCD6
B5
FBCD7
F9
FBCD8
F10
FBCD9
D12
FBCD10
D9
FBCD11
E12
FBCD12
D11
FBCD13
E8
FBCD14
D8
FBCD15
E7
FBCD16
F7
FBCD17
D6
FBCD18
D5
FBCD19
D3
FBCD20
E4
FBCD21
C3
FBCD22
B4
FBCD23
C10
FBCD24
B10
FBCD25
C8
FBCD26
A10
FBCD27
C11
FBCD28
C12
FBCD29
A11
FBCD30
B11
FBCD31
B28
FBCD32
C27
FBCD33
C26
FBCD34
B26
FBCD35
C30
FBCD36
B31
FBCD37
C29
FBCD38
A31
FBCD39
D28
FBCD40
D27
FBCD41
F26
FBCD42
D24
FBCD43
E23
FBCD44
E26
FBCD45
E24
FBCD46
F23
FBCD47
B23
FBCD48
A23
FBCD49
C25
FBCD50
C23
FBCD51
A22
FBCD52
C22
FBCD53
C21
FBCD54
B22
FBCD55
E22
FBCD56
D22
FBCD57
D21
FBCD58
E21
FBCD59
E18
FBCD60
D19
FBCD61
D18
FBCD62
E19
FBCD63
A4
FBCDQM0
E11
FBCDQM1
F5
FBCDQM2
C9
FBCDQM3
C28
FBCDQM4
F24
FBCDQM5
C24
FBCDQM6
E20
FBCDQM7
C5
FBCDQS_WP0
E10
FBCDQS_WP1
E5
FBCDQS_WP2
B8
FBCDQS_WP3
A29
FBCDQS_WP4
D25
FBCDQS_WP5
B25
FBCDQS_WP6
F20
FBCDQS_WP7
C6
FBCDQS_RN0
E9
FBCDQS_RN1
E6
FBCDQS_RN2
A8
FBCDQS_RN3
B29
FBCDQS_RN4
E25
FBCDQS_RN5
A25
FBCDQS_RN6
F21
FBCDQS_RN7
A28
FB_VREF2
FBVTT_0
FBVTT_1
FBVTT_2
FBVTT_3
FBVTT_4
FBVTT_5
FBVTT_6
FBVTT_7
FBVTT_8
FBVTT_9
FBVTT_10
FBVTT_11
FBVTT_12
FBVTT_13
FBVTT_14
FBVTT_15
FBVTT_16
FBVTT_17
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DEBUG
FBC_REFCLK
FBC_REFCLK*
FBC_PLLVDD
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
AB23
H16
H17
J10
J23
J24
J9
K11
K12
K21
K22
K24
K9
L23
M23
T25
U25
FBCA4
C13
A16
FBCA5
A13
B17
FBC_H32_A2
B20
FBC_H32_A4
A19
FBC_H32_A3
B19
B14
E16
FBCA11
A14
C15
B16
F17
FBC_H32_A5
C19
NTP_FBCA12
D15
C17
FBCA7
A17
FBCA10
C16
D14
FBCA0
F16
FBCA9
C14
FBCA6
C18
FBCA2
E14
FBCA8
B13
FBCA3
E15
FBCA1
F15
NTP_FBCA13
A20
E13
F13
F18
E17
C20
RFU4
D1
RFU5
F12
B1
C1
G8
G10
G9
FBCAL_PD_VDDQ
K26
FBCAL_PU_GND
H26
FBCAL_TERM_GND
J26
R7
R7
40.2_1%
40.2_1%
R0402
R0402
C80
C80
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C94
C94
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C82
C82
Do Not Stuff
Do Not Stuff
C0603
C0603
POP = NA
POP = NA
TP2TP2
TP4TP4
R5 49.9_1%
R5 49.9_1%
R0603
R0603
R8
R8
30
30
R0402
R0402
See G73M Application Note
C91
C91
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C81
C81
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C97
C97
Do Not Stuff
Do Not Stuff
C0603
C0603
POP = NA
POP = NA
FBCA[11..0] 5
FBC_H32_A[5..2] 5
FBCRAS* 5
FBCBA1 5
FBCBA2 5
FBCCS0* 5
FBCCAS* 5
FBCWE* 5
FBCBA0 5
FBCCLK0 5
FBCCLK0* 5
FBCCLK1 5
FBCCLK1* 5
FBVDDQ
C92
C92
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C95
C95
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C83
C83
Do Not Stuff
Do Not Stuff
C0603
C0603
POP = NA
POP = NA
R2
R2
10K
10K
R0402
R0402
C84
C84
Do Not Stuff
Do Not Stuff
C0805
C0805
POP = NA
POP = NA
R3
R3
10K
10K
R0402
R0402
FBC_RST 5
FBCCKE 5
Populate for G73
C111
C111
470p
470p
C0402
C0402
POP = G72_NA
POP = G72_NA
C112
C112
4700p
4700p
C0402
C0402
POP = G72_NA
POP = G72_NA
FB3 180R
FB3 180R
C113
C113
4.7u
4.7u
C0805
C0805
POP = G72_NA
POP = G72_NA
+VG1.2S
FB0603
FB0603
POP = G72_NA
POP = G72_NA
Not populate for G73
FBVDDQ
AA23
A A
G73 256M
G73 256M
G73 256M
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
Title
Title
Title
Size
Size
Size
D
D
D
XiongWei
XiongWei
XiongWei
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
GPU
GPU
GPU
Sheet
Sheet
Sheet
Memory Interface
Memory Interface
Memory Interface
Name
Name
Name
1
Rev
Rev
Rev
A
A
A
of
of
of
314Monday, March 19, 2007
314Monday, March 19, 2007
314Monday, March 19, 2007
Page 4
5
4
3
2
1
USE TWO 8M/16Mx32 GDDR3, CHANNEL A
U1E
U1E
HY5RS123235FP-2
HY5RS123235FP-2
BGA80P12X17-136N
BGA80P12X17-136N
FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBABA0
FBABA1
FBABA2
FBA_RST
R9
R9
240_1%
240_1%
R0603
R0603
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
U4
U9
A9
A4
FBARAS*3
FBACAS*3
FBAWE*3
D D
FBAA[11..0]3
FBACS0*3
FBABA03
FBABA13
FBABA23
FBACKE3
FBACLK03
FBACLK0*3 FBACLK13
FBA_RST3
DDR3: ZQ=6x desired output Impedence of DQ drivers
Impedence=240/6 =40 ohm
C C
CKE determines the ODT value for cmd pins
CKE=0 => ODT=ZQ/2
CKE=1 => ODT=ZQ
See AN.
FBACLK1
R11
R11
121_1%
121_1%
R0402
R0402
close to (less than 400mils) and
after memory clock input pins
FBACLK1*
FBACLK0
R14
R14
121_1%
121_1%
R0402
R0402
FBACLK0*
B B
FBVDDQ
C123
C123
0.068u
0.068u
C0402
C0402
K1
K12
J1
J12
CLK
CLK
NC/RFU
NC/RFU
NC/RFU
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
BA2RAS
VDD
CSCAS
VDD
CKEWE
VDD
CASCS
VDD
VDD
A4A0
VDD
A5A1
VDD
A6A2
VDD
A9A3
A0A4
VDDQ
A1A5
VDDQ
A2A6
VDDQ
A11A7
VDDQ
A10A8/AP
VDDQ
A3A9
VDDQ
A8/APA10
VDDQ
A7A11
VDDQ
VDDQ
VDDQ
BA1BA0
VDDQ
BA0BA1
VDDQ
RASBA2
VDDQ
VDDQ
WECKE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MIRRORNONMIRROR
MIRRORNONMIRROR
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREF
VREF
FBVDDQ
F1
M1
A2
U2
A11
U11
F12
FBVDDQ
M12
A1
C1
E1
N1
R1
U1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
U12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
VSS
L1
VSS
A3
VSS
U3
VSS
A10
VSS
U10
VSS
G12
VSS
L12
VSS
H1
H12
C126
C126
0.1u
0.1u
C0402
C0402
DDR3: ZQ=6x desired output Impedence of DQ drivers
Impedence=240/6 =40 ohm
CKE determines the ODT value for cmd pins
CKE=0 => ODT=ZQ/2
CKE=1 => ODT=ZQ
FBVDDQ
FBAREF1
C124
C124
0.1u
0.1u
C0402
C0402
FBVDDQ
R151
R151
1.07K_1%
1.07K_1%
R0402
R0402
R152
R152
2.49K_1%
2.49K_1%
R0603
R0603
R12
R12
1.07K_1%
1.07K_1%
R0402
R0402
R13
R13
2.49K_1%
2.49K_1%
R0603
R0603
FBA_H32_A[5..2]3
FBACLK1*3
FBA_H32_A2
FBA_H32_A3
FBA_H32_A4
FBA_H32_A5
FBACKE
FBARAS*
FBACAS*
FBAWE*
FBACS0*
FBAA0
FBAA1
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBABA0
FBABA1
FBABA2
FBA_RST
FBVDDQ
R10
R10
240_1%
240_1%
R0603
R0603
C125
C125
0.068u
0.068u
C0402
C0402
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
U4
U9
A9
A4
K1
K12
J1
J12
U2E
U2E
HY5RS123235FP-2
HY5RS123235FP-2
BGA80P12X17-136N
BGA80P12X17-136N
CLK
CLK
NC/RFU
NC/RFU
NC/RFU
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
FBVDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREF
VREF
F1
VDD
M1
VDD
A2
VDD
U2
VDD
A11
VDD
U11
VDD
F12
VDD
VDD
FBVDDQ
M12
A1
C1
E1
N1
R1
U1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
U12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
VSS
L1
VSS
A3
VSS
U3
VSS
A10
VSS
U10
VSS
G12
VSS
L12
VSS
H1
H12
C127
C127
0.1u
0.1u
C0402
C0402
FBVDDQ
C128
C128
0.1u
0.1u
C0402
C0402
R155
R155
1.07K_1%
1.07K_1%
R0402
R0402
R158
R158
2.49K_1%
2.49K_1%
R0603
R0603
FBVDDQ
FBVDDQ
R159
R159
1.07K_1%
1.07K_1%
R0402
R0402
R160
R160
2.49K_1%
2.49K_1%
R0603
R0603
FBVDDQ
C116
C116
0.1u
0.1u
C0402
C0402
C134
C134
0.1u
0.1u
C0402
C0402
C135
C135
1u
1u
C0603
C0603
FBVDDQ
C119
C119
0.1u
0.1u
C0402
C0402
C256
C256
0.1u
0.1u
C0402
C0402
C136
C136
1u
1u
C0603
C0603
C140
C140
0.1u
0.1u
C0402
C0402
C120
C120
0.1u
0.1u
C0402
C0402
C257
C257
0.1u
0.1u
C0402
C0402
C137
C137
1u
1u
C0603
C0603
C141
C141
0.1u
0.1u
C0402
C0402
C121
C121
0.1u
0.1u
C0402
C0402
C258
C258
0.1u
0.1u
C0402
C0402
C138
C138
1u
1u
C0603
C0603
C142
C142
0.1u
0.1u
C0402
C0402
C122
C122
0.1u
0.1u
C0402
C0402
C259
C259
0.1u
0.1u
C0402
C0402
C139
C139
1u
1u
C0603
C0603
C143
C143
0.1u
0.1u
C0402
C0402
C129
C129
0.1u
0.1u
C0402
C0402
C260
C260
0.1u
0.1u
C0402
C0402
C117
C117
1u
1u
C0603
C0603
C144
C144
0.1u
0.1u
C0402
C0402
C130
C130
0.1u
0.1u
C0402
C0402
C261
C261
0.1u
0.1u
C0402
C0402
C118
C118
1u
1u
C0603
C0603
C145
C145
0.1u
0.1u
C0402
C0402
C131
C131
0.1u
0.1u
C0402
C0402
C146
C146
0.1u
0.1u
C0402
C0402
C132
C132
0.1u
0.1u
C0402
C0402
FBVDDQ
C147
C147
0.1u
0.1u
C0402
C0402
C115
C115
4.7u
4.7u
C0805
C0805
C133
C133
0.1u
0.1u
C0402
C0402
C148
C148
0.1u
0.1u
C0402
C0402
C149
C149
0.1u
0.1u
C0402
C0402
BA2RAS
CSCAS
CKEWE
CASCS
A4A0
A5A1
A6A2
A9A3
A0A4
A1A5
A2A6
A11A7
A10A8/AP
A3A9
A8/APA10
A7A11
BA1BA0
BA0BA1
RASBA2
WECKE
MIRRORNONMIRROR
MIRRORNONMIRROR
C150
C150
C262
FBVDDQ
0.1u
0.1u
C0402
C0402
C151
C151
1u
1u
C0603
C0603
XiongWei
XiongWei
XiongWei
C262
0.1u
0.1u
C0402
C0402
C152
C152
1u
1u
C0603
C0603
FBAD[63..0]3
U1B
U1A
U1A
BGA80P12X17-136N
FBADQM[7..0]3
FBA_RDQS[7..0]3
A A
FBA_WDQS[7..0]3
5
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBA_RDQS0
FBA_RDQS1
FBA_RDQS2
FBA_RDQS3
FBA_RDQS4
FBA_RDQS5
FBA_RDQS6
FBA_RDQS7
FBA_WDQS0
FBA_WDQS1
FBA_WDQS2
FBA_WDQS3
FBA_WDQS4
FBA_WDQS5
FBA_WDQS6
FBA_WDQS7
FBAD22
FBAD23
FBAD21
FBAD19
FBAD16
FBAD20
FBAD18
FBAD17
FBADQM2
FBA_RDQS2
FBA_WDQS2
FBAD4
FBAD7
FBAD5
FBAD6
FBAD1
FBAD0
FBAD2
FBAD3
FBA_RDQS0
FBA_WDQS0
BGA80P12X17-136N
B2
B3
C2
C3
E2
F3
F2
G3
E3
D3
D2
U1C
U1C
BGA80P12X17-136N
BGA80P12X17-136N
M11
L10
N11
M10
R11
R10
T11
T10
N10
P10
P11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
FBAD30
FBAD29
FBAD31
FBAD26
FBAD28
FBAD24
FBAD25
FBAD27
FBADQM3
FBA_RDQS3
FBA_WDQS3
FBAD9
FBAD8
FBAD11
FBAD10
FBAD14
FBAD12
FBAD13
FBAD15
FBADQM1
FBA_RDQS1
FBA_WDQS1
4
U1B
BGA80P12X17-136N
BGA80P12X17-136N
B11
B10
C11
C10
E11
F10
F11
G10
E10
D10
D11
U1D
U1D
BGA80P12X17-136N
BGA80P12X17-136N
M2
L3
N2
M3
R2
R3
T2
T3
N3
P3
P2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
FBAD56
FBAD57
FBAD58
FBAD62
FBAD59
FBAD61
FBAD60
FBAD63
FBADQM7
FBA_RDQS7
FBA_WDQS7
FBAD55
FBAD54
FBAD53
FBAD52
FBAD49
FBAD48
FBAD50
FBAD51
FBADQM6
FBA_RDQS6
FBA_WDQS6
3
B2
B3
C2
C3
E2
F3
F2
G3
E3
D3
D2
M11
L10
N11
M10
R11
R10
T11
T10
N10
P10
P11
U2A
U2A
BGA80P12X17-136N
BGA80P12X17-136N
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
U2C
U2C
BGA80P12X17-136N
BGA80P12X17-136N
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
FBAD40
FBAD45
FBAD47
FBAD46
FBAD43
FBAD44
FBAD42
FBAD41
FBADQM5
FBA_RDQS5
FBA_WDQS5
FBAD39
FBAD38
FBAD36
FBAD37
FBAD33
FBAD34
FBAD35
FBAD32
FBADQM4FBADQM0
FBA_RDQS4
FBA_WDQS4
U2B
U2B
BGA80P12X17-136N
BGA80P12X17-136N
B11
B10
C11
C10
E11
F10
F11
G10
E10
D10
D11
U2D
U2D
BGA80P12X17-136N
BGA80P12X17-136N
M2
L3
N2
M3
R2
R3
T2
T3
N3
P3
P2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
RDQS
WDQS
G73 256M
G73 256M
G73 256M
ENGINEER:
ENGINEER:
2
ENGINEER:
C264
C264
C263
C263
0.1u
0.1u
C0402
C0402
C153
C153
1u
1u
C0603
C0603
C265
C265
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
C155
C155
C154
C154
1u
1u
1u
1u
C0603
C0603
C0603
C0603
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
C
C
C
Name
Name
Name
Date: Sheet
Date: Sheet
Date: Sheet
C267
C267
C266
C266
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
C269
C269
C270
C270
1u
1u
1u
1u
C0603
C0603
C0603
C0603
Frame Buffer A
Frame Buffer A
Frame Buffer A
1
FBVDDQ
C268
C268
4.7u
4.7u
C0805
C0805
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
414Monday, March 19, 2007
414Monday, March 19, 2007
414Monday, March 19, 2007
Rev
Rev
Rev
A
A
A
of
of
of
Page 5
5
hexainf@hotmail.com
4
3
2
1
USE TWO 8M/16Mx32 GDDR3, CHANNEL C
U3E
U3E
HY5RS123235FP-2
HY5RS123235FP-2
BGA80P12X17-136N
BGA80P12X17-136N
FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBCBA0
FBCBA1
FBCBA2
FBC_RST
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
U4
U9
A9
A4
R15
R15
240_1%
240_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
FBCRAS*3
FBCCAS*3
FBCWE*3
D D
FBCA[11..0]3
DDR3: ZQ=6x desired output Impedence of DQ drivers
Impedence=240/6 =40 ohm
CKE determines the ODT value for cmd pins
CKE=0 => ODT=ZQ/2
CKE=1 => ODT=ZQ
C C
FBCCS0*3
FBCBA03
FBCBA13
FBCBA23
FBCCKE3
FBCCLK03
FBCCLK0*3
See AN.
FBCCLK1
R17
R17
121_1%
121_1%
R0402
R0402
FBCCLK1*
close to (less than 400mils) and
after memory clock input pins
FBCCLK0
R20
R20
121_1%
121_1%
R0402
R0402
FBCCLK0*
B B
FBVDDQ
K1
K12
C284
C284
0.068u
0.068u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
J1
J12
CLK
CLK
NC/RFU
NC/RFU
NC/RFU
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
BA2RAS
VDD
CSCAS
VDD
CKEWE
VDD
CASCS
VDD
VDD
A4A0
VDD
A5A1
VDD
A6A2
VDD
A9A3
A0A4
VDDQ
A1A5
VDDQ
A2A6
VDDQ
A11A7
VDDQ
A10A8/AP
VDDQ
A3A9
VDDQ
A8/APA10
VDDQ
A7A11
VDDQ
VDDQ
VDDQ
BA1BA0
VDDQ
BA0BA1
VDDQ
RASBA2
VDDQ
VDDQ
WECKE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MIRRORNONMIRROR
MIRRORNONMIRROR
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREF
VREF
FBVDDQ
F1
M1
A2
U2
A11
U11
F12
FBVDDQ
M12
A1
C1
E1
N1
R1
U1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
U12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
VSS
L1
VSS
A3
VSS
U3
VSS
A10
VSS
U10
VSS
G12
VSS
L12
VSS
H1
H12
DDR3: ZQ=6x desired output Impedence of DQ drivers
Impedence=240/6 =40 ohm
CKE determines the ODT value for cmd pins
CKE=0 => ODT=ZQ/2
CKE=1 => ODT=ZQ
FBVDDQ
FBCREF1
C285
C285
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
C167
C167
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
R18
R18
1.07K_1%
1.07K_1%
R0402
R0402
POP = (X2=NA)
POP = (X2=NA)
R19
R19
2.49K_1%
2.49K_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
R161
R161
1.07K_1%
1.07K_1%
R0402
R0402
POP = (X2=NA)
POP = (X2=NA)
R162
R162
2.49K_1%
2.49K_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
FBC_H32_A[5..2]3
FBCCLK13
FBCCLK1*3
FBC_H32_A2
FBC_H32_A3
FBC_H32_A4
FBC_H32_A5
FBC_RST3
FBCCKE
FBCRAS*
FBCCAS*
FBCWE*
FBCCS0*
FBCA0
FBCA1
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBCBA0
FBCBA1
FBCBA2
FBVDDQ
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
U4
U9
A9
A4
R16
R16
240_1%
240_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
K1
K12
C166
C166
0.068u
0.068u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
J1
J12
U4E
U4E
HY5RS123235FP-2
HY5RS123235FP-2
BGA80P12X17-136N
BGA80P12X17-136N
CLK
CLK
NC/RFU
NC/RFU
NC/RFU
RESET
MIRROR
ZQ
VDDA
VDDA
VSSA
VSSA
FBVDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREF
VREF
F1
VDD
M1
VDD
A2
VDD
U2
VDD
A11
VDD
U11
VDD
F12
VDD
VDD
FBVDDQ
M12
A1
C1
E1
N1
R1
U1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
U12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
VSS
L1
VSS
A3
VSS
U3
VSS
A10
VSS
U10
VSS
G12
VSS
L12
VSS
H1
H12
C286
C286
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
C169
C169
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
R163
R163
1.07K_1%
1.07K_1%
R0402
R0402
POP = (X2=NA)
POP = (X2=NA)
R164
R164
2.49K_1%
2.49K_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
FBVDDQ
C157
C157
C156
C156
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C175
C175
C280
C280
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C281
C281
C168
C168
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
R165
R165
1.07K_1%
1.07K_1%
R0402
R0402
POP = (X2=NA)
POP = (X2=NA)
R166
R166
2.49K_1%
2.49K_1%
R0603
R0603
POP = (X2=NA)
POP = (X2=NA)
C158
C158
C159
C159
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C177
C177
C176
C176
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C282
C282
C170
C170
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C160
C160
C161
C161
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C179
C179
C178
C178
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C171
C171
C172
C172
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C162
C162
C163
C163
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C180
C180
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
C173
C173
1u
1u
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
C164
C164
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
C174
C174
4.7u
4.7u
C0805
C0805
POP = (X2=NA)
POP = (X2=NA)
C165
C165
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
BA2RAS
CSCAS
CKEWE
CASCS
A4A0
A5A1
A6A2
A9A3
A0A4
A1A5
A2A6
A11A7
A10A8/AP
A3A9
A8/APA10
A7A11
BA1BA0
BA0BA1
RASBA2
WECKE
MIRRORNONMIRROR
MIRRORNONMIRROR
FBVDDQ
C187
C187
C283
C182
C182
C181
C181
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C183
C183
C184
C184
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C283
C185
C185
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C188
C188
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C190
C190
C189
C189
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C191
C191
C271
C271
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
FBVDDQ
ENGINEER:
ENGINEER:
ENGINEER:
POP = (X2=NA)
C192
C192
C193
C193
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
XiongWei
XiongWei
XiongWei
FBCD[63..0]3
FBCD22
FBCDQM[7..0]3
FBC_RDQS[7..0]3
A A
FBC_WDQS[7..0]3
5
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBC_RDQS0
FBC_RDQS1
FBC_RDQS2
FBC_RDQS3
FBC_RDQS4
FBC_RDQS5
FBC_RDQS6
FBC_RDQS7
FBC_WDQS0
FBC_WDQS1
FBC_WDQS2
FBC_WDQS3
FBC_WDQS4
FBC_WDQS5
FBC_WDQS6
FBC_WDQS7
FBCD20
FBCD21
FBCD23
FBCD17
FBCD18
FBCD19
FBCD16
FBCDQM2
FBC_RDQS2
FBC_WDQS2
FBCD25
FBCD26
FBCD29
FBCD24
FBCD27
FBCD28
FBCD30
FBCD31
FBCDQM3
FBC_RDQS3
FBC_WDQS3
U3AU3A
B2
DQ0
B3
DQ1
C2
DQ2
C3
DQ3
E2
DQ4
F3
DQ5
F2
DQ6
G3
DQ7
E3
DM
D3
RDQS
D2
WDQS
U3CU3C
M11
DQ0
L10
DQ1
N11
DQ2
M10
DQ3
R11
DQ4
R10
DQ5
T11
DQ6
T10
DQ7
N10
DM
P10
RDQS
P11
WDQS
FBCD4
FBCD3
FBCD5
FBCD7
FBCD1
FBCD6
FBCD2
FBCD0
FBCDQM0
FBC_RDQS0
FBC_WDQS0
FBCD14
FBCD10
FBCD11
FBCD15
FBCD13
FBCD9
FBCD8
FBCD12
FBCDQM1
FBC_RDQS1
FBC_WDQS1
4
U3BU3B
B11
DQ0
B10
DQ1
C11
DQ2
C10
DQ3
E11
DQ4
F10
DQ5
F11
DQ6
G10
DQ7
E10
DM
D10
RDQS
D11
WDQS
U3DU3D
M2
DQ0
L3
DQ1
N2
DQ2
M3
DQ3
R2
DQ4
R3
DQ5
T2
DQ6
T3
DQ7
N3
DM
P3
RDQS
P2
WDQS
FBCD37
FBCD36
FBCD39
FBCD38
FBCD32
FBCD34
FBCD33
FBCD35
FBCDQM4
FBC_RDQS4
FBC_WDQS4
FBCD63
FBCD60
FBCD61
FBCD62
FBCD58
FBCD57
FBCD59
FBCD56
FBCDQM7
FBC_RDQS7
FBC_WDQS7
3
U4AU4A
B2
DQ0
B3
DQ1
C2
DQ2
C3
DQ3
E2
DQ4
F3
DQ5
F2
DQ6
G3
DQ7
E3
DM
D3
RDQS
D2
WDQS
U4CU4C
M11
DQ0
L10
DQ1
N11
DQ2
M10
DQ3
R11
DQ4
R10
DQ5
T11
DQ6
T10
DQ7
N10
DM
P10
RDQS
P11
WDQS
FBCD42
FBCD40
FBCD45
FBCD41
FBCD46
FBCD47
FBCD43
FBCD44
FBCDQM5
FBC_RDQS5
FBC_WDQS5
FBCD54
FBCD50
FBCD52
FBCD51
FBCD55
FBCD53
FBCD49
FBCD48
FBCDQM6
FBC_RDQS6
FBC_WDQS6
U4BU4B
B11
DQ0
B10
DQ1
C11
DQ2
C10
DQ3
E11
DQ4
F10
DQ5
F11
DQ6
G10
DQ7
E10
DM
D10
RDQS
D11
WDQS
U4DU4D
M2
DQ0
L3
DQ1
N2
DQ2
M3
DQ3
R2
DQ4
R3
DQ5
T2
DQ6
T3
DQ7
N3
DM
P3
RDQS
P2
WDQS
2
G73 256M
G73 256M
G73 256M
C273
C273
C272
C272
0.1u
0.1u
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
C194
C194
1u
1u
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
C274
C274
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C196
C196
C195
C195
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
C
C
C
Name
Name
Name
Date: Sheet
Date: Sheet
Date: Sheet
C276
C276
C275
C275
0.1u
0.1u
0.1u
0.1u
C0402
C0402
C0402
C0402
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
C278
C278
C279
C279
1u
1u
1u
1u
C0603
C0603
C0603
C0603
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
POP = (X2=NA)
Frame Buffer C
Frame Buffer C
Frame Buffer C
1
FBVDDQ
C277
C277
4.7u
4.7u
C0805
C0805
POP = (X2=NA)
POP = (X2=NA)
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
Rev
Rev
Rev
A
A
A
of
of
of
514Monday, March 19, 2007
514Monday, March 19, 2007
514Monday, March 19, 2007
Page 6
5
+VG3.3S
FB4 180R
FB4 180R
D D
FB0603
FB0603
120mA
C200
C200
4.7u
4.7u
C0805
C0805
C197
C197
4700p
4700p
C0402
C0402
10MIL
C198
C198
470p
470p
C0402
C0402
C199
C199
0.01u
0.01u
C0402
C0402
DACA_VDD
DACA_VREF
DACA_RSET
R25
R25
124_1%
124_1%
R0402
R0402
AD10
AH10
AH9
4
U5D
U5D
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
4/14 DACA
4/14 DACA
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
K2
J3
AF10
AK10
AH11
AJ12
AH12
AG9
70mA
3
I2CA_SCL
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
R26
R26
150
150
R0402
R0402
+VG3.3S
R21
R21
2.2K
2.2K
R0402
R0402
R22
R22
2.2K
2.2K
R0402
R0402
R27
R27
150
150
R0402
R0402
R23 33
R23 33
R28
R28
150
150
R0402
R0402
R0402
R0402
R24 33
R24 33
R0402
R0402
2
I2CA_SCL_R
I2CA_SDA_RI2CA_SDA
I2CA_SCL_R 13
I2CA_SDA_R 13
DACA_HSYNC 13
DACA_VSYNC 13
1
DACA_RED 13
DACA_GREEN 13
DACA_BLUE 13
C C
DACB_VDD
R127
R127
10K
10K
R0402
R0402
V8
R5
R7
U5G
U5G
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
5/14 DACB(TV)
5/14 DACB(TV)
DACB_VDD
DACB_VREF
DACB_RSET
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
R6
T5
T6
V7
100mA
B B
U5F
U5F
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
6/14 DACC
AD7
AH4
AF5
6/14 DACC
DACC_VDD
DACC_VREF
DACC_RSET
I2CB_SCL
I2CB_SDA
DACC_HSYNC
DACC_VSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_IDUMP
H4
J4
AG7
AG5
AF6
AG6
AE5
AG4
R35
R35
10K
10K
R0402
R0402
DACC_VDD
+VG3.3S
R33
R33
2.2K
2.2K
R0402
R0402
R34
R34
2.2K
2.2K
R0402
R0402
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
DAC
DAC
Name
Name
Name
DAC
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
614Wednesday, December 13, 2006
614Wednesday, December 13, 2006
614Wednesday, December 13, 2006
of
of
of
Rev
Rev
Rev
A
A
A
Page 7
5
hexainf@hotmail.com
4
3
2
1
D D
+VG2.5S
FBVDDQ
C C
B B
C208
C208
4.7u
4.7u
C0805
C0805
FB7 180R
FB7 180R
FB6 180R
FB6 180R
FB0603
FB0603
Imax=40mA
FB0603
FB0603
Imax=240mA
C209
C209
4.7u
4.7u
C0805
C0805
C206
C206
4.7u
4.7u
C0805
C0805
IFPAIOVDD
IFPABPLLVDD
C205
C205
4700p
4700p
C0402
C0402
C212
C212
4700p
4700p
C0402
C0402
C210
C210
4700p
4700p
C0402
C0402
C213
C213
470p
470p
C0402
C0402
C211
C211
470p
470p
C0402
C0402
C207
C207
470p
470p
C0402
C0402
AA10
AB10
AM4
AL5
AC9
AD9
AF9
AF8
AK3
AH3
U5I
U5I
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
7/14 IFPAB
7/14 IFPAB
IFPAB_VPROBE
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPB_IOVDD
U5H
U5H
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
8/14 IFPCD
8/14 IFPCD
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
IFPCD_PLLGND
IFPA_TXC*
IFPA_TXC
IFPA_TXD0*
IFPA_TXD0
IFPA_TXD1*
IFPA_TXD1
IFPA_TXD2*
IFPA_TXD2
IFPA_TXD3*
IFPA_TXD3
IFPB_TXC*
IFPB_TXC
IFPB_TXD4*
IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6
IFPB_TXD7*
IFPB_TXD7
IFPC_TXC*
IFPC_TXC
IFPC_TXD0*
IFPC_TXD0
IFPC_TXD1*
IFPC_TXD1
IFPC_TXD2*
IFPC_TXD2
AJ9
AK9
AJ6
AH6
AH7
AH8
AK8
AJ8
AH5
AJ5
AL4
AK4
AM5
AM6
AL7
AM7
AK5
AK6
AL8
AK7
AM3
AM2
AE1
AE2
AF2
AF1
AH1
AG1
IFPATXC* 13
IFPATXC 13
IFPATXD0* 13
IFPATXD0 13
IFPATXD1* 13
IFPATXD1 13
IFPATXD2* 13
IFPATXD2 13
AH2
IFPD_TXC*
AG3
AD6
IFPC_IOVDD
AE7
R38
R37
R36
R36
10K
10K
R0402
R0402
A A
5
R37
10K
10K
R0402
R0402
4
R38
10K
10K
R0402
R0402
IFPD_IOVDD
IFPD_TXC
AJ1
IFPD_TXD4*
AK1
IFPD_TXD4
AL1
IFPD_TXD5*
AL2
IFPD_TXD5
AJ3
IFPD_TXD6*
AJ2
IFPD_TXD6
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
LVDS & DVI(TMDS) interface
LVDS & DVI(TMDS) interface
Name
Name
Name
LVDS & DVI(TMDS) interface
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
of
of
of
714Wednesday, December 13, 2006
714Wednesday, December 13, 2006
714Wednesday, December 13, 2006
Rev
Rev
Rev
A
A
A
Page 8
5
D D
4
3
+VG3.3S
R39
R39
2.2K
2.2K
R0402
R0402
2
1
R0402
R0402
+VG3.3S +VG3.3S
R40
R40
2.2K
2.2K
R0402
R0402
I2CC_SCL_R
I2CC_SDA_R
R120
R120
2.2K
2.2K
R0402
R0402
R42
R42
2.2K
2.2K
R0402
R0402
I2CC_SCL_R
I2CC_SDA_R
R895
R895
2.2K
2.2K
R0402
R0402
I2CC_SCL_R 13
I2CC_SDA_R 13
GPIO3_PPEN 13
GPIO4_BLEN 13
GPIO5_NVVDDCTL0 12
R896
R896
2.2K
2.2K
R0402
R0402
Isolate?
U5J
U5J
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
9/14 MISC1
9/14 MISC1
J1
THERMDN
K1
THERMDP
AJ11
JTAG_TCK
AK11
JTAG_TMS
AK12
JTAG_TDI
AL12
AL13
JTAG_TDO
JTAG_TRST*
C C
B B
JTAG_TRST
R49
R49
10K
10K
R0402
R0402
CLAMP
I2CC_SCL
I2CC_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
F6
G2
G1
R46 2.2K R0402R46 2.2K R0402
K3
R47 2.2K R0402R47 2.2K R0402
H1
K5
G5
E2
J5
G6
K6
E1
D2
H5
F4
E3
R50
R50
2.2K
2.2K
R0402
R0402
I2CC_SCL
I2CC_SDA
GPIO8_THERM_ALERT*
R44 33
R44 33
R0402
R0402
R45 33
R45 33
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
GPU Thermal Control
GPU Thermal Control
Name
Name
Name
GPU Thermal Control
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
814Wednesday, December 13, 2006
814Wednesday, December 13, 2006
814Wednesday, December 13, 2006
of
of
of
Rev
Rev
Rev
A
A
A
Page 9
5
hexainf@hotmail.com
U5L
U5L
G73M
G73M
bga_100p_33x33_820
+VG3.3S
C214
C214
0.1u
0.1u
C0402
C0402
D D
C C
U5K
U5K
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
10/14 MISC2
10/14 MISC2
F1
STRAP
AE26
MEMSTRAPSEL0
AD26
MEMSTRAPSEL1
AH31
MEMSTRAPSEL2
AH32
MEMSTRAPSEL3
U3
RFU6
V3
RFU7
B B
U6
RFU8
U5
RFU9
U4
RFU10
V4
RFU11
V6
RFU12
bga_100p_33x33_820
12/14 MIOB
12/14 MIOB
AA8
MIOB_VDDQ_0
AB7
MIOB_VDDQ_1
AB8
MIOB_VDDQ_2
AC6
MIOB_VDDQ_3
AC7
MIOB_VDDQ_4
Y1
MIOBCAL_PD_VDDQ
Y3
MIOBCAL_PU_GND
Y2
MIOB_VREF
ROMCS*
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
BUFRST*
STEREO
SWAPRDY_A
TESTMEMCLK
TESTMODE
4
AA4
W2
AA6
AA7
G3
H3
F3
T3
M6
A26
H2
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
RFU13
RFU14
RFU15
RFU16
RFU17
RFU18
RFU19
RFU20
MIOB_VSYNC
MIOB_HSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT*
MIOB_CLKIN
R53 10K R0402R53 10K R0402
R52 10K R0402R52 10K R0402
TESTMCLK
TESTMODE
AC3
AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5
W3
V1
Y5
W1
W4
W5
V5
Y6
AE3
AF3
AD1
AD3
AD4
AD5
AE4
R54
R54
10K
10K
R0402
R0402
MIOB_CLKIN
R55
R55
10K
10K
R0402
R0402
+VG3.3S
R51
R51
10K
10K
R0402
R0402
3
MIOBD0 11
MIOBD1 11
MIOBD3 11
MIOBD4 11
MIOBD5 11
MIOBD8 11
MIOBD9 11
MIOBD11 11
2
U5M
U5M
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
14/14 _GND_
14/14 _GND_
AA12
GND_0
AA2
GND_1
AA21
GND_2
AA31
GND_3
AB27
GND_4
AB6
GND_5
AC10
GND_6
AC23
GND_7
AC29
GND_8
AC4
GND_9
AD16
GND_10
AD17
GND_11
AD2
GND_12
AD31
GND_13
AE17
GND_14
AE27
GND_15
AE6
GND_16
AF11
GND_17
AF26
GND_18
AF29
GND_19
AF4
GND_20
AF7
GND_21
AG10
GND_22
AG11
GND_23
AG14
GND_24
AG15
GND_25
AG19
GND_26
AG2
GND_27
AG22
GND_28
AG31
GND_29
AG8
GND_30
AH24
GND_31
AJ10
GND_32
AJ13
GND_33
AJ16
GND_34
AJ17
GND_35
AJ20
GND_36
AJ23
GND_37
AJ26
GND_38
AJ29
GND_39
AJ4
GND_40
AJ7
GND_41
AK2
GND_42
AK28
GND_43
AK31
GND_44
AL11
GND_45
AL14
GND_46
AL19
GND_47
AL22
GND_48
AL25
GND_49
AL3
GND_50
AL6
GND_51
AL9
GND_52
AM13
GND_53
AM16
GND_54
AM17
GND_55
AM20
GND_56
AM23
GND_57
AM26
GND_58
AM29
GND_59
B12
GND_60
B15
GND_61
B18
GND_62
B21
GND_63
B24
GND_64
B27
GND_65
B3
GND_66
B30
GND_67
B6
GND_68
B9
GND_69
C2
GND_70
C31
GND_71
D10
GND_72
D13
GND_73
D16
GND_74
D17
GND_75
D20
GND_76
D23
GND_77
D26
GND_78
D29
GND_79
D4
GND_80
D7
GND_81
F11
GND_82
F14
GND_83
F19
GND_84
F2
GND_85
F22
GND_86
F25
GND_87
F31
GND_88
F8
GND_89
G26
GND_90
G29
GND_91
G4
GND_92
G7
GND_93
H27
GND_94
H6
GND_95
J16
GND_96
J17
GND_97
J2
GND_98
J31
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
K10
K23
K29
K4
L27
L6
M12
M2
M31
N15
N18
N29
N4
P15
P18
P27
P6
R13
R14
R15
R18
R19
R2
R20
R31
T16
T17
T24
T29
T4
U16
U17
U24
U29
U8
V13
V14
V15
V18
V19
V2
V20
V31
W15
W18
W27
W6
Y15
Y18
Y29
Y4
AL10
AM10
AG13
1
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
MIOB, VBIOS ROM, HDCP, GPU
MIOB, VBIOS ROM, HDCP, GPU
Name
Name
Name
MIOB, VBIOS ROM, HDCP, GPU
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
of
of
of
914Wednesday, December 13, 2006
914Wednesday, December 13, 2006
914Wednesday, December 13, 2006
Rev
Rev
Rev
A
A
A
Page 10
5
D D
C C
+VG3.3S
C215
C215
0.1u
0.1u
C0402
C0402
4
U5N
U5N
G73M
G73M
bga_100p_33x33_820
bga_100p_33x33_820
11/14 MIOA
11/14 MIOA
M7
MIOA_VDDQ_0
M8
MIOA_VDDQ_1
R8
MIOA_VDDQ_2
T8
MIOA_VDDQ_3
U9
MIOA_VDDQ_4
L1
MIOACAL_PD_VDDQ
L3
MIOACAL_PU_GND
L2
MIOA_VREF
MIOA_CLKOUT
MIOA_CLKOUT*
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE
MIOA_CTL3
MIOA_CLKIN
3
P2
N2
N1
N3
M1
M3
P5
N6
N5
M4
L4
L5
R3
R1
P1
P3
R4
P4
MIOACLKIN
M5
R56
R56
10K
10K
R0402
R0402
MIOAD0 11
MIOAD1 11
MIOAD6 11
MIOAD8 11
MIOAD9 11
2
1
U5E
U5E
G73M
G73M
bga_100p_33x33_820
+VG2.5S
FB8 180R
FB8 180R
FB0603
FB0603
B B
A A
5
40mA+40mA
C217
C217
1u
1u
C0603
C0603
C218
C218
4700p
4700p
C0402
C0402
R57
R57
10K
10K
R0402
R0402
PLLVDD
C216
C216
470p
470p
C0402
C0402
XTALSSIN BXTALOUT
XTALIN_1
4
T9
T10
U10
T1
U1
PLLVDD
VID_PLLVDD
PLLGND
XTALSSIN
XTALIN
C219
C219
20p
20p
C0402
C0402
bga_100p_33x33_820
13/14 XTAL_PLL
13/14 XTAL_PLL
X1
X1
Do Not Stuff
Do Not Stuff
osc-b276x197mil-4
osc-b276x197mil-4
POP = NA
POP = NA
1
3
2
4
X2
X2
27MHz
27MHz
OSC250P350X600_4N
OSC250P350X600_4N
1
3
2
4
XTALOUTBUFF
XTALOUT
XTALOUTXTALIN XTALOUT
C220
C220
20p
20p
C0402
C0402
3
T2
U2
R58
R58
10K
10K
R0402
R0402
Delete external ss device
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
Spread Spectrum
Spread Spectrum
Name
Name
Name
Spread Spectrum
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
10 14Wednesday, December 13, 2006
10 14Wednesday, December 13, 2006
10 14Wednesday, December 13, 2006
of
of
of
Rev
Rev
Rev
A
A
A
Page 11
5
hexainf@hotmail.com
4
3
+VG3.3S
2
1
D D
MIOAD110
MIOBD09
MIOBD19
MIOBD89
MIOBD99
MIOBD49
MIOBD59
MIOBD39
C C
MIOBD119
MIOAD010
MIOAD610
MIOAD810
MIOAD910
MIOAD1 MIOAD1
MIOBD0 MIOBD0
MIOBD1
MIOBD8 MIOBD8
MIOBD9 MIOBD9
MIOBD4 MIOBD4
MIOBD5 MIOBD5
MIOBD3 MIOBD3
MIOBD11 MIOBD11
MIOAD0
MIOAD6
MIOAD8
MIOAD9
R136 10K
R136 10K
R0402
R0402
R63 10K
R63 10K
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R171 Do Not Stuff
R171 Do Not Stuff
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R172 10K
R172 10K
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R69 10K
R69 10K
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R79 2K
R79 2K
R0402
R0402
R81 2K
R81 2K
R0402
R0402
R83 2K
R83 2K
R0402
R0402
R135 Do Not Stuff
R135 Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R89 2K
R89 2K
R0402
R0402
R93 2K
R93 2K
R0402
R0402
R95 2K
R95 2K
R0402
R0402
PIN NAME FUNCTION DESCRIPTION
SUB_VENDOR
R170 Do Not Stuff
MIOAD0
MIOAD6
MIOAD8
MIOAD9
MIOBD1
R170 Do Not Stuff
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R66 10K
R66 10K
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R68 Do Not Stuff
R68 Do Not Stuff
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R173 Do Not Stuff
R173 Do Not Stuff
R0402
R0402
POP = MEMCFG
POP = MEMCFG
R132 Do Not Stuff
R132 Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R133 Do Not Stuff
R133 Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R134 Do Not Stuff
R134 Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R86 2K
R86 2K
R0402
R0402
R92 2K
R92 2K
R0402
R0402
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
PEX_PLL_EN_TERM100
3GIO_PADCFG0
3GIO_PADCFG1
3GIO_PADCFG2
VALUE
0
0010
1000
0
001
0: SYSTEM BIOS
1: ADAPTER BIOS
G73M-Hynix
8Mx32x4: 0110
16Mx32x4: 0010
8Mx32x2: 1110
16Mx32x2: 1010
决定Device ID后4位
G73M G3-128: 0x0398
G73M-U G3-128: 0x0399
G72M G3-128: 0x01D8
G72M-V G3-128: 0x01D7
0: Set the PCIE PLL termination enable
1: Set the PCIE PLL termination disable
Set to 001, See AN.
G72M-Hynix
8Mx32x2: 0110
16Mx32x2: 0010
G72M-Samsung
16Mx32x2: 0011
B B
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
Strap
Strap
Name
Name
Name
Strap
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
of
of
of
11 14Wednesday, January 31, 2007
11 14Wednesday, January 31, 2007
11 14Wednesday, January 31, 2007
Rev
Rev
Rev
A
A
A
Page 12
10
9
8
7
6
5
4
3
2
1
J J
AVDD_5V
R101
R101
0
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R108
R108
100K
100K
R0402
R0402
0
R0402
R0402
ILIM_88550
STBY#_88550
OVP_UVP
POK1_88550
POK21_88550
TON = AVDD (200kHz)
TON = OPEN (300kHz)
I I
TON = REF (450kHz)
TON = GND (600kHz)
OVP/UVP = AVDD
(
启用
OVP
及放电模式，启用
OVP/UVP = OPEN
(
启用
OVP
及放电模式，禁用
OVP/UVP = REF
(
禁用
OVP
H H
G G
及放电模式，启用
OVP/UVP = GND
(
禁用
OVP
及放电模式，禁用
ILIM
限流阀值：
Low Side
电流阀值：
1.67V
对应
MOSFET
167mV
ALL_SYS_VRPWRGD13
UVP)
UVP)
UVP)
UVP)
F F
R103 1K
R103 1K
REF_2V
R105 100K
R105 100K
R0402
R0402
C229
C229
0.22u
0.22u
C0603
C0603
+VG5S
R112 100K
R112 100K
R110 100K
R110 100K
R113 100K
R113 100K
Vo=(Rd+Ru)/Rd *REFIN/2=1.22V
C236
C236
0.1u
0.1u
C0402
C0402
R102 0
R102 0
RUNPWROK_1
1
TON
2
OVP/UVP
3
REF
4
ILIM
5
POK1
6
POK2
7
STBY#
29
EPAD
C233
C233
0.1u
0.1u
C0402
C0402
C228
C228
1u
1u
C0603
C0603
28
R99 Do Not Stuff
R99 Do Not Stuff
R100
R100
Do Not Stuff
Do Not Stuff
R0402
R0402
POP = NA
POP = NA
R0402
R0402
24
25
27
26
NC
SS8VTTS9VTTR10PGND211VTT12VTTI13REFIN
AVDD
SKIP#
SHDNA#
U6
U6
ISL88550A
ISL88550A
QFN50P500X500-28N
QFN50P500X500-28N
C235
C235
1u
1u
C0603
C0603
R117
R117
249
249
R0603
R0603
R118
R118
1K_1%
1K_1%
R0402
R0402
GND
E E
+VG5S
R0402
R0402
POP = NA
POP = NA
C221
C221
4.7u
4.7u
C0805
C0805
22
23
VDD
PGND1
21
LGATE
PHASE
UGATE
14
C238
C238
10u
10u
C0805
C0805
BOOT
C234
C234
0.1u
0.1u
C0402
C0402
C225 0.22u C0603C225 0.22u C0603
20
19
18
+V_DC_GPU
17
VIN
16
OUT
0.7V
15
FB
REF_2V
FBVDDQ
C237
C237
4.7u
4.7u
C0805
C0805
+VG1.2S
C239
C239
C240
C240
10u
10u
0.1u
0.1u
C0805
C0805
C0402
C0402
567
8
Q1
Q1
4
AO4422
AO4422
so63p400-8
so63p400-8
321
NVVDD_1
567
8
Q2
Q2
4
AO4430
AO4430
so63p400-8
so63p400-8
321
FB_88550
NP
D2
D2
RB161L-40
RB161L-40
sod5225n
sod5225n
+V_DC_GPU
C222
C222
10u
10u
C1210
C1210
R109
R109
Do Not Stuff
Do Not Stuff
R0603
R0603
POP = NA
POP = NA
C231
C231
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
Vout=0.7*(1+Ru/Rd)
GPIO5_NVVDDCTL08
C226
C226
C223
C223
10u
10u
10u
10u
C1210
C1210
C1210
C1210
L3 1.5uH
L3 1.5uH
l-ihlp-2525cz-01
l-ihlp-2525cz-01
GPU GPIO5 NVVDD
G72M 0 1.1V
G72M 1 1V
C227
C227
0.01u
0.01u
C0402
C0402
C232
C232
1000p
1000p
C0402
C0402
C224
C224
2200p
2200p
C0402
C0402
R111
R111
10.7K_1%
10.7K_1%
R0603
R0603
R114
R114
24.9K_1%
24.9K_1%
R0603
R0603
1 2
+V_DC
F1
F1
2A
2A
f1206
f1206
NVVDD
14.7A
12
CP1
CP1
+
+
330u
330u
C7343
C7343
+VG5S
R115
R115
10K
10K
R0402
R0402
DS
Q4
Q4
BSS138
BSS138
sot95p280-3n-gsd
sot95p280-3n-gsd
G
12
12
CP3
CP3
CP2
CP2
+
+
330u
330u
C7343
C7343
R116
R116
75K
75K
R0603
R0603
DS
G
+
+
Do Not Stuff
Do Not Stuff
C7343
C7343
POP = NA
POP = NA
Q3
Q3
BSS138
BSS138
sot95p280-3n-gsd
sot95p280-3n-gsd
C230
C230
0.1u
0.1u
C0402
C0402
FBVDDQ
+V1.8
567
C255
C255
0.1u
0.1u
C0402
C0402
POP = NA
POP = NA
4
XiongWei
XiongWei
XiongWei
8
Q6
Q6
AO4430
AO4430
FBVDDQ
so63p400-8
so63p400-8
321
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
C
C
C
Name
Name
Name
Date: Sheet
Date: Sheet
Date: Sheet
GPU Power
GPU Power
GPU Power
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
12 14Tuesday, January 09, 2007
12 14Tuesday, January 09, 2007
12 14Tuesday, January 09, 2007
of
of
of
Rev
Rev
Rev
A
A
A
D D
C C
LDO:+V2.5S
C287
C287
0.1u
0.1u
C0402
C0402
U9
U9
AAT3222IGV-2.5-T1
AAT3222IGV-2.5-T1
SOT95P280-5N
SOT95P280-5N
1
IN
OUT
2
GND
3
EN/EN#
+VG2.5S+VG3.3S
5
R167
NC
R0603
R0603
POP = NA
POP = NA
R168
R168
Do Not Stuff
Do Not Stuff
R0603
R0603
POP = NA
POP = NA
Vout=(39.2+36.5)/36.5*1.205=2.5V
R167
Do Not Stuff
Do Not Stuff
4
C288
C288
Do Not Stuff
Do Not Stuff
C0402
C0402
POP = NA
POP = NA
C289
C289
0.1u
0.1u
C0402
C0402
POK1_88550
R126 1K
R126 1K
R0402
R0402
+V_DC
R892 100K
R892 100K
R123
R123
100K
100K
R0402
R0402
DS
Q8
Q8
BSS138
BSS138
sot95p280-3n-gsd
sot95p280-3n-gsd
G
R0402
R0402
R128 1K
R128 1K
R0402
R0402
DS
Q7
Q7
BSS138
BSS138
sot95p280-3n-gsd
sot95p280-3n-gsd
G
B B
G73 256M
G73 256M
G73 256M
A A
ENGINEER:
ENGINEER:
ENGINEER:
Page 13
5
hexainf@hotmail.com
CN1
CN1
100 pin-male
100 pin-male
PEX_RST2
C_PEX_TXN02
D D
C C
C_PEX_TXP02
C_PEX_TXN12
C_PEX_TXP12
C_PEX_TXN22
C_PEX_TXP22
C_PEX_TXN32
C_PEX_TXP32
C_PEX_TXN42
C_PEX_TXP42
C_PEX_TXN52
C_PEX_TXP52
C_PEX_TXN62
C_PEX_TXP62
C_PEX_TXN72
C_PEX_TXP72
C_PEX_TXN82
C_PEX_TXP82
C_PEX_TXN92
C_PEX_TXP92
C_PEX_TXN102
C_PEX_TXP102
C_PEX_TXN112
C_PEX_TXP112
C_PEX_TXN122
C_PEX_TXP122
C_PEX_TXN132
C_PEX_TXP132
C_PEX_TXN142
C_PEX_TXP142
C_PEX_TXN152
C_PEX_TXP152
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
E1
E2
4
PEX_REFCLK 2
PEX_REFCLK* 2
PEX_RXN0 2
PEX_RXP0 2
PEX_RXN1 2
PEX_RXP1 2
PEX_RXN2 2
PEX_RXP2 2
PEX_RXN3 2
PEX_RXP3 2
PEX_RXN4 2
PEX_RXP4 2
PEX_RXN5 2
PEX_RXP5 2
PEX_RXN6 2
PEX_RXP6 2
PEX_RXN7 2
PEX_RXP7 2
PEX_RXN8 2
PEX_RXP8 2
PEX_RXN9 2
PEX_RXP9 2
PEX_RXN10 2
PEX_RXP10 2
PEX_RXP15 2
PEX_RXN15 2
PEX_RXP14 2
PEX_RXN14 2
PEX_RXP13 2
PEX_RXN13 2
PEX_RXP12 2
PEX_RXN12 2
PEX_RXP11 2
PEX_RXN11 2
+V3.3S
C186
C186
0.1u
0.1u
C0402
C0402
3
IFPATXC7
IFPATXC*7
IFPATXD2*7
IFPATXD27
IFPATXD1*7
IFPATXD17
IFPATXD0*7
IFPATXD07
ALL_SYS_VRPWRGD12
R1210
R1210
R0402
R0402
I2CC_SDA_R8
I2CC_SCL_R8
CLK_REQ
1A
+V5S
0.5A
C244
C244
0.1u
0.1u
C0402
C0402
+V_DC
C246
C246
0.1u
0.1u
C0402
C0402
2.5A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
CN2
CN2
60 pin-male
60 pin-male
E1
2
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
E2
DACA_RED 6
DACA_GREEN 6
DACA_BLUE 6
I2CA_SDA_R 6
I2CA_SCL_R 6
DACA_HSYNC 6
DACA_VSYNC 6
GPIO4_BLEN 8
GPIO3_PPEN 8
6.5A
+V1.8
C247
C247
0.1u
0.1u
C0402
C0402
1
If user choose not to use external graphic card to save power, then disable the power delivery
+V5S +VG5S+V3.3S +VG3.3S
B B
A A
G73 256M
G73 256M
G73 256M
XiongWei
XiongWei
XiongWei
ENGINEER:
ENGINEER:
5
4
3
2
ENGINEER:
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
Connector
Connector
Name
Name
Name
Connector
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
of
of
of
13 14Wednesday, December 13, 2006
13 14Wednesday, December 13, 2006
13 14Wednesday, December 13, 2006
Rev
Rev
Rev
A
A
A
Page 14
5
Date Page
2006/09/22 12 Change Q6 from 4422 to 4430 to minimize the voltage drop
2006/09/27 12 Change 2.5V LDO solution from TPS73201 to AAT3221
2006/09/28 12 GPIO9 is designed to control fan, not to indicate a thermal alert, so float the pin and delete the attach circuit
2006/10/12 10 Dual lay a crystal
D D
C C
Description
Populate 330uF cap from CP2 to CP3, to avoid mechnical inter2006/09/26 12
4
3
2
1
B B
AB
A A
MARK2MARK2 MARK7MARK7 MARK9MARK9 MARK10MARK10MARK6MARK6
5
MARK1MARK1
4
G73 256M
G73 256M
MARK11MARK11 MARK12MARK12MARK8MARK8 MARK5MARK5MARK4MARK4 MARK3MARK3
3
2
G73 256M
ENGINEER:
ENGINEER:
ENGINEER:
XiongWei
XiongWei
XiongWei
Amoi IT Division.
Amoi IT Division.
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203
Shanghai, China, 201203
Shanghai, China, 201203
GPU
GPU
GPU
Title
Title
Title
Size
Size
Size
Sheet
Sheet
Sheet
History
History
Name
Name
Name
History
1
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
www.amoi.com.cn
www.amoi.com.cn
www.amoi.com.cn
14 14Thursday, October 12, 2006
14 14Thursday, October 12, 2006
14 14Thursday, October 12, 2006
of
of
of
Rev
Rev
Rev
A
A
A
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